FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/jmphy.c
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
12 * disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32
33 /*
34 * Driver for the JMicron JMP211 10/100/1000, JMP202 10/100 PHY.
35 */
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/socket.h>
42 #include <sys/bus.h>
43
44 #include <net/if.h>
45 #include <net/if_var.h>
46 #include <net/if_media.h>
47
48 #include <dev/mii/mii.h>
49 #include <dev/mii/miivar.h>
50 #include "miidevs.h"
51
52 #include <dev/mii/jmphyreg.h>
53
54 #include "miibus_if.h"
55
56 static int jmphy_probe(device_t);
57 static int jmphy_attach(device_t);
58 static void jmphy_reset(struct mii_softc *);
59 static uint16_t jmphy_anar(struct ifmedia_entry *);
60 static int jmphy_setmedia(struct mii_softc *, struct ifmedia_entry *);
61
62 static device_method_t jmphy_methods[] = {
63 /* Device interface. */
64 DEVMETHOD(device_probe, jmphy_probe),
65 DEVMETHOD(device_attach, jmphy_attach),
66 DEVMETHOD(device_detach, mii_phy_detach),
67 DEVMETHOD(device_shutdown, bus_generic_shutdown),
68 DEVMETHOD_END
69 };
70
71 static devclass_t jmphy_devclass;
72 static driver_t jmphy_driver = {
73 "jmphy",
74 jmphy_methods,
75 sizeof(struct mii_softc)
76 };
77
78 DRIVER_MODULE(jmphy, miibus, jmphy_driver, jmphy_devclass, 0, 0);
79
80 static int jmphy_service(struct mii_softc *, struct mii_data *, int);
81 static void jmphy_status(struct mii_softc *);
82
83 static const struct mii_phydesc jmphys[] = {
84 MII_PHY_DESC(JMICRON, JMP202),
85 MII_PHY_DESC(JMICRON, JMP211),
86 MII_PHY_END
87 };
88
89 static const struct mii_phy_funcs jmphy_funcs = {
90 jmphy_service,
91 jmphy_status,
92 jmphy_reset
93 };
94
95 static int
96 jmphy_probe(device_t dev)
97 {
98
99 return (mii_phy_dev_probe(dev, jmphys, BUS_PROBE_DEFAULT));
100 }
101
102 static int
103 jmphy_attach(device_t dev)
104 {
105 u_int flags;
106
107 flags = 0;
108 if (mii_dev_mac_match(dev, "jme") &&
109 (miibus_get_flags(dev) & MIIF_MACPRIV0) != 0)
110 flags |= MIIF_PHYPRIV0;
111 mii_phy_dev_attach(dev, flags, &jmphy_funcs, 1);
112 return (0);
113 }
114
115 static int
116 jmphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
117 {
118 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
119
120 switch (cmd) {
121 case MII_POLLSTAT:
122 break;
123
124 case MII_MEDIACHG:
125 if (jmphy_setmedia(sc, ife) != EJUSTRETURN)
126 return (EINVAL);
127 break;
128
129 case MII_TICK:
130 /*
131 * Only used for autonegotiation.
132 */
133 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
134 sc->mii_ticks = 0;
135 break;
136 }
137
138 /* Check for link. */
139 if ((PHY_READ(sc, JMPHY_SSR) & JMPHY_SSR_LINK_UP) != 0) {
140 sc->mii_ticks = 0;
141 break;
142 }
143
144 /* Announce link loss right after it happens. */
145 if (sc->mii_ticks++ == 0)
146 break;
147 if (sc->mii_ticks <= sc->mii_anegticks)
148 return (0);
149
150 sc->mii_ticks = 0;
151 (void)jmphy_setmedia(sc, ife);
152 break;
153 }
154
155 /* Update the media status. */
156 PHY_STATUS(sc);
157
158 /* Callback if something changed. */
159 mii_phy_update(sc, cmd);
160 return (0);
161 }
162
163 static void
164 jmphy_status(struct mii_softc *sc)
165 {
166 struct mii_data *mii = sc->mii_pdata;
167 int bmcr, ssr;
168
169 mii->mii_media_status = IFM_AVALID;
170 mii->mii_media_active = IFM_ETHER;
171
172 ssr = PHY_READ(sc, JMPHY_SSR);
173 if ((ssr & JMPHY_SSR_LINK_UP) != 0)
174 mii->mii_media_status |= IFM_ACTIVE;
175
176 bmcr = PHY_READ(sc, MII_BMCR);
177 if ((bmcr & BMCR_ISO) != 0) {
178 mii->mii_media_active |= IFM_NONE;
179 mii->mii_media_status = 0;
180 return;
181 }
182
183 if ((bmcr & BMCR_LOOP) != 0)
184 mii->mii_media_active |= IFM_LOOP;
185
186 if ((ssr & JMPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
187 /* Erg, still trying, I guess... */
188 mii->mii_media_active |= IFM_NONE;
189 return;
190 }
191
192 switch ((ssr & JMPHY_SSR_SPEED_MASK)) {
193 case JMPHY_SSR_SPEED_1000:
194 mii->mii_media_active |= IFM_1000_T;
195 /*
196 * jmphy(4) got a valid link so reset mii_ticks.
197 * Resetting mii_ticks is needed in order to
198 * detect link loss after auto-negotiation.
199 */
200 sc->mii_ticks = 0;
201 break;
202 case JMPHY_SSR_SPEED_100:
203 mii->mii_media_active |= IFM_100_TX;
204 sc->mii_ticks = 0;
205 break;
206 case JMPHY_SSR_SPEED_10:
207 mii->mii_media_active |= IFM_10_T;
208 sc->mii_ticks = 0;
209 break;
210 default:
211 mii->mii_media_active |= IFM_NONE;
212 return;
213 }
214
215 if ((ssr & JMPHY_SSR_DUPLEX) != 0)
216 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
217 else
218 mii->mii_media_active |= IFM_HDX;
219
220 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
221 if ((PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0)
222 mii->mii_media_active |= IFM_ETH_MASTER;
223 }
224 }
225
226 static void
227 jmphy_reset(struct mii_softc *sc)
228 {
229 uint16_t t2cr, val;
230 int i;
231
232 /* Disable sleep mode. */
233 PHY_WRITE(sc, JMPHY_TMCTL,
234 PHY_READ(sc, JMPHY_TMCTL) & ~JMPHY_TMCTL_SLEEP_ENB);
235 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN);
236
237 for (i = 0; i < 1000; i++) {
238 DELAY(1);
239 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
240 break;
241 }
242 /* Perform vendor recommended PHY calibration. */
243 if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) {
244 /* Select PHY test mode 1. */
245 t2cr = PHY_READ(sc, MII_100T2CR);
246 t2cr &= ~GTCR_TEST_MASK;
247 t2cr |= 0x2000;
248 PHY_WRITE(sc, MII_100T2CR, t2cr);
249 /* Apply calibration patch. */
250 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_READ |
251 JMPHY_EXT_COMM_2);
252 val = PHY_READ(sc, JMPHY_SPEC_DATA);
253 val &= ~0x0002;
254 val |= 0x0010 | 0x0001;
255 PHY_WRITE(sc, JMPHY_SPEC_DATA, val);
256 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_WRITE |
257 JMPHY_EXT_COMM_2);
258
259 /* XXX 20ms to complete recalibration. */
260 DELAY(20 * 1000);
261
262 PHY_READ(sc, MII_100T2CR);
263 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_READ |
264 JMPHY_EXT_COMM_2);
265 val = PHY_READ(sc, JMPHY_SPEC_DATA);
266 val &= ~(0x0001 | 0x0002 | 0x0010);
267 PHY_WRITE(sc, JMPHY_SPEC_DATA, val);
268 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_WRITE |
269 JMPHY_EXT_COMM_2);
270 /* Disable PHY test mode. */
271 PHY_READ(sc, MII_100T2CR);
272 t2cr &= ~GTCR_TEST_MASK;
273 PHY_WRITE(sc, MII_100T2CR, t2cr);
274 }
275 }
276
277 static uint16_t
278 jmphy_anar(struct ifmedia_entry *ife)
279 {
280 uint16_t anar;
281
282 anar = 0;
283 switch (IFM_SUBTYPE(ife->ifm_media)) {
284 case IFM_AUTO:
285 anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
286 break;
287 case IFM_1000_T:
288 break;
289 case IFM_100_TX:
290 anar |= ANAR_TX | ANAR_TX_FD;
291 break;
292 case IFM_10_T:
293 anar |= ANAR_10 | ANAR_10_FD;
294 break;
295 default:
296 break;
297 }
298
299 return (anar);
300 }
301
302 static int
303 jmphy_setmedia(struct mii_softc *sc, struct ifmedia_entry *ife)
304 {
305 uint16_t anar, bmcr, gig;
306
307 gig = 0;
308 bmcr = PHY_READ(sc, MII_BMCR);
309 switch (IFM_SUBTYPE(ife->ifm_media)) {
310 case IFM_AUTO:
311 gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
312 break;
313 case IFM_1000_T:
314 gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
315 break;
316 case IFM_100_TX:
317 case IFM_10_T:
318 break;
319 case IFM_NONE:
320 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO | BMCR_PDOWN);
321 return (EJUSTRETURN);
322 default:
323 return (EINVAL);
324 }
325
326 anar = jmphy_anar(ife);
327 if ((IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO ||
328 (ife->ifm_media & IFM_FDX) != 0) &&
329 ((ife->ifm_media & IFM_FLOW) != 0 ||
330 (sc->mii_flags & MIIF_FORCEPAUSE) != 0))
331 anar |= ANAR_PAUSE_TOWARDS;
332
333 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) {
334 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
335 gig |= GTCR_MAN_MS;
336 if ((ife->ifm_media & IFM_ETH_MASTER) != 0)
337 gig |= GTCR_ADV_MS;
338 }
339 PHY_WRITE(sc, MII_100T2CR, gig);
340 }
341 PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
342 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
343
344 return (EJUSTRETURN);
345 }
Cache object: 03fe4472e552322c743f01f971d0e875
|