The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/lxtphyreg.h

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    1 /*      OpenBSD: lxtphyreg.h,v 1.1 1998/11/11 19:34:47 jason Exp        */
    2 /*      NetBSD: lxtphyreg.h,v 1.1 1998/10/24 00:33:17 thorpej Exp       */
    3 /*      $FreeBSD: releng/8.2/sys/dev/mii/lxtphyreg.h 213956 2010-10-17 12:11:42Z marius $       */
    4 
    5 /*-
    6  * Copyright (c) 1998 The NetBSD Foundation, Inc.
    7  * All rights reserved.
    8  *
    9  * This code is derived from software contributed to The NetBSD Foundation
   10  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   11  * NASA Ames Research Center.
   12  *
   13  * Redistribution and use in source and binary forms, with or without
   14  * modification, are permitted provided that the following conditions
   15  * are met:
   16  * 1. Redistributions of source code must retain the above copyright
   17  *    notice, this list of conditions and the following disclaimer.
   18  * 2. Redistributions in binary form must reproduce the above copyright
   19  *    notice, this list of conditions and the following disclaimer in the
   20  *    documentation and/or other materials provided with the distribution.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   23  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   24  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   25  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   32  * POSSIBILITY OF SUCH DAMAGE.
   33  */
   34 
   35 #ifndef _DEV_MII_LXTPHYREG_H_
   36 #define _DEV_MII_LXTPHYREG_H_
   37 
   38 /*
   39  * LXT970 registers.
   40  */
   41 
   42 #define MII_LXTPHY_MIRROR       0x10    /* Mirror register */
   43         /* All bits user-defined */
   44 
   45 #define MII_LXTPHY_IER          0x11    /* Interrupt Enable Register */
   46 #define IER_MIIDRVLVL           0x0008  /* Rediced MII driver levels */
   47 #define IER_LNK_CRITERIA        0x0004  /* Enhanced Link Loss Criteria */
   48 #define IER_INTEN               0x0002  /* Interrupt Enable */
   49 #define IER_TINT                0x0001  /* Force Interrupt */
   50 
   51 #define MII_LXTPHY_ISR          0x12    /* Interrupt Status Register */
   52 #define ISR_MINT                0x8000  /* MII Interrupt Pending */
   53 #define ISR_XTALOK              0x4000  /* Clocks OK */
   54 
   55 #define MII_LXTPHY_CONFIG       0x13    /* Configuration Register */
   56 #define CONFIG_TXMIT_TEST       0x4000  /* 100base-T Transmit Test */
   57 #define CONFIG_REPEATER         0x2000  /* Repeater Mode */
   58 #define CONFIG_MDIO_INT         0x1000  /* Enable intr signalling on MDIO */
   59 #define CONFIG_TPLOOP           0x0800  /* Disable 10base-T Loopback */
   60 #define CONFIG_SQE              0x0400  /* Enable SQE */
   61 #define CONFIG_DISJABBER        0x0200  /* Disable Jabber */
   62 #define CONFIG_DISLINKTEST      0x0100  /* Disable Link Test */
   63 #define CONFIG_LEDC1            0x0080  /* LEDC configuration */
   64 #define CONFIG_LEDC0            0x0040  /* ... */
   65                                         /* 0 0 LEDC indicates collision */
   66                                         /* 0 1 LEDC is off */
   67                                         /* 1 0 LEDC indicates activity */
   68                                         /* 1 1 LEDC is on */
   69 #define CONFIG_ADVTXCLK         0x0020  /* Advance TX clock */
   70 #define CONFIG_5BSYMBOL         0x0010  /* 5-bit Symbol mode */
   71 #define CONFIG_SCRAMBLER        0x0008  /* Bypass scrambler */
   72 #define CONFIG_100BASEFX        0x0004  /* 100base-FX */
   73 #define CONFIG_TXDISCON         0x0001  /* Disconnect TP transmitter */
   74 
   75 #define MII_LXTPHY_CSR          0x14    /* Chip Status Register */
   76 #define CSR_LINK                0x2000  /* Link is up */
   77 #define CSR_DUPLEX              0x1000  /* Full-duplex */
   78 #define CSR_SPEED               0x0800  /* 100Mbps */
   79 #define CSR_ACOMP               0x0400  /* Autonegotiation complete */
   80 #define CSR_PAGERCVD            0x0200  /* Link page received */
   81 #define CSR_LOWVCC              0x0004  /* Low Voltage Fault */
   82 
   83 #endif /* _DEV_MII_LXTPHYREG_H_ */

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