The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/lxtphyreg.h

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    1 /*      $NetBSD: lxtphyreg.h,v 1.1 1998/10/24 00:33:17 thorpej Exp $    */
    2 
    3 /*-
    4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
    9  * NASA Ames Research Center.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *      This product includes software developed by the NetBSD
   22  *      Foundation, Inc. and its contributors.
   23  * 4. Neither the name of The NetBSD Foundation nor the names of its
   24  *    contributors may be used to endorse or promote products derived
   25  *    from this software without specific prior written permission.
   26  *
   27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   37  * POSSIBILITY OF SUCH DAMAGE.
   38  */
   39 
   40 #ifndef _DEV_MII_LXTPHYREG_H_
   41 #define _DEV_MII_LXTPHYREG_H_
   42 
   43 /*
   44  * LXT970 registers.
   45  */
   46 
   47 #define MII_LXTPHY_MIRROR       0x10    /* Mirror register */
   48         /* All bits user-defined */
   49 
   50 #define MII_LXTPHY_IER          0x11    /* Interrupt Enable Register */
   51 #define IER_MIIDRVLVL           0x0008  /* Rediced MII driver levels */
   52 #define IER_LNK_CRITERIA        0x0004  /* Enhanced Link Loss Criteria */
   53 #define IER_INTEN               0x0002  /* Interrupt Enable */
   54 #define IER_TINT                0x0001  /* Force Interrupt */
   55 
   56 #define MII_LXTPHY_ISR          0x12    /* Interrupt Status Register */
   57 #define ISR_MINT                0x8000  /* MII Interrupt Pending */
   58 #define ISR_XTALOK              0x4000  /* Clocks OK */
   59 
   60 #define MII_LXTPHY_CONFIG       0x13    /* Configuration Register */
   61 #define CONFIG_TXMIT_TEST       0x4000  /* 100base-T Transmit Test */
   62 #define CONFIG_REPEATER         0x2000  /* Repeater Mode */
   63 #define CONFIG_MDIO_INT         0x1000  /* Enable intr signalling on MDIO */
   64 #define CONFIG_TPLOOP           0x0800  /* Disable 10base-T Loopback */
   65 #define CONFIG_SQE              0x0400  /* Enable SQE */
   66 #define CONFIG_DISJABBER        0x0200  /* Disable Jabber */
   67 #define CONFIG_DISLINKTEST      0x0100  /* Disable Link Test */
   68 #define CONFIG_LEDC1            0x0080  /* LEDC configuration */
   69 #define CONFIG_LEDC0            0x0040  /* ... */
   70                                         /* 0 0 LEDC indicates collision */
   71                                         /* 0 1 LEDC is off */
   72                                         /* 1 0 LEDC indicates activity */
   73                                         /* 1 1 LEDC is on */
   74 #define CONFIG_ADVTXCLK         0x0020  /* Advance TX clock */
   75 #define CONFIG_5BSYMBOL         0x0010  /* 5-bit Symbol mode */
   76 #define CONFIG_SCRAMBLER        0x0008  /* Bypass scrambler */
   77 #define CONFIG_100BASEFX        0x0004  /* 100base-FX */
   78 #define CONFIG_TXDISCON         0x0001  /* Disconnect TP transmitter */
   79 
   80 #define MII_LXTPHY_CSR          0x14    /* Chip Status Register */
   81 #define CSR_LINK                0x2000  /* Link is up */
   82 #define CSR_DUPLEX              0x1000  /* Full-duplex */
   83 #define CSR_SPEED               0x0800  /* 100Mbps */
   84 #define CSR_ACOMP               0x0400  /* Autonegotiation complete */
   85 #define CSR_PAGERCVD            0x0200  /* Link page received */
   86 #define CSR_LOWVCC              0x0004  /* Low Voltage Fault */
   87 
   88 #endif /* _DEV_MII_LXTPHYREG_H_ */

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