Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/mii/mii_physubr.c
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1 /* $NetBSD: mii_physubr.c,v 1.5 1999/08/03 19:41:49 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD: releng/8.4/sys/dev/mii/mii_physubr.c 225492 2011-09-11 20:38:33Z marius $"); 35 36 /* 37 * Subroutines common to all PHYs. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/socket.h> 44 #include <sys/errno.h> 45 #include <sys/module.h> 46 #include <sys/bus.h> 47 48 #include <net/if.h> 49 #include <net/if_media.h> 50 51 #include <dev/mii/mii.h> 52 #include <dev/mii/miivar.h> 53 54 #include "miibus_if.h" 55 56 /* 57 * Media to register setting conversion table. Order matters. 58 */ 59 const struct mii_media mii_media_table[MII_NMEDIA] = { 60 /* None */ 61 { BMCR_ISO, ANAR_CSMA, 62 0, }, 63 64 /* 10baseT */ 65 { BMCR_S10, ANAR_CSMA|ANAR_10, 66 0, }, 67 68 /* 10baseT-FDX */ 69 { BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD, 70 0, }, 71 72 /* 100baseT4 */ 73 { BMCR_S100, ANAR_CSMA|ANAR_T4, 74 0, }, 75 76 /* 100baseTX */ 77 { BMCR_S100, ANAR_CSMA|ANAR_TX, 78 0, }, 79 80 /* 100baseTX-FDX */ 81 { BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD, 82 0, }, 83 84 /* 1000baseX */ 85 { BMCR_S1000, ANAR_CSMA, 86 0, }, 87 88 /* 1000baseX-FDX */ 89 { BMCR_S1000|BMCR_FDX, ANAR_CSMA, 90 0, }, 91 92 /* 1000baseT */ 93 { BMCR_S1000, ANAR_CSMA, 94 GTCR_ADV_1000THDX }, 95 96 /* 1000baseT-FDX */ 97 { BMCR_S1000, ANAR_CSMA, 98 GTCR_ADV_1000TFDX }, 99 }; 100 101 void 102 mii_phy_setmedia(struct mii_softc *sc) 103 { 104 struct mii_data *mii = sc->mii_pdata; 105 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 106 int bmcr, anar, gtcr; 107 108 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 109 /* 110 * Force renegotiation if MIIF_DOPAUSE or MIIF_FORCEANEG. 111 * The former is necessary as we might switch from flow- 112 * control advertisement being off to on or vice versa. 113 */ 114 if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 || 115 (sc->mii_flags & (MIIF_DOPAUSE | MIIF_FORCEANEG)) != 0) 116 (void)mii_phy_auto(sc); 117 return; 118 } 119 120 /* 121 * Table index is stored in the media entry. 122 */ 123 124 KASSERT(ife->ifm_data >=0 && ife->ifm_data < MII_NMEDIA, 125 ("invalid ife->ifm_data (0x%x) in mii_phy_setmedia", 126 ife->ifm_data)); 127 128 anar = mii_media_table[ife->ifm_data].mm_anar; 129 bmcr = mii_media_table[ife->ifm_data].mm_bmcr; 130 gtcr = mii_media_table[ife->ifm_data].mm_gtcr; 131 132 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 133 gtcr |= GTCR_MAN_MS; 134 if ((ife->ifm_media & IFM_ETH_MASTER) != 0) 135 gtcr |= GTCR_ADV_MS; 136 } 137 138 if ((ife->ifm_media & IFM_FDX) != 0 && 139 ((ife->ifm_media & IFM_FLOW) != 0 || 140 (sc->mii_flags & MIIF_FORCEPAUSE) != 0)) { 141 if ((sc->mii_flags & MIIF_IS_1000X) != 0) 142 anar |= ANAR_X_PAUSE_TOWARDS; 143 else { 144 anar |= ANAR_FC; 145 /* XXX Only 1000BASE-T has PAUSE_ASYM? */ 146 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0 && 147 (sc->mii_extcapabilities & 148 (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0) 149 anar |= ANAR_X_PAUSE_ASYM; 150 } 151 } 152 153 if ((ife->ifm_media & IFM_LOOP) != 0) 154 bmcr |= BMCR_LOOP; 155 156 PHY_WRITE(sc, MII_ANAR, anar); 157 PHY_WRITE(sc, MII_BMCR, bmcr); 158 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) 159 PHY_WRITE(sc, MII_100T2CR, gtcr); 160 } 161 162 int 163 mii_phy_auto(struct mii_softc *sc) 164 { 165 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 166 int anar, gtcr; 167 168 /* 169 * Check for 1000BASE-X. Autonegotiation is a bit 170 * different on such devices. 171 */ 172 if ((sc->mii_flags & MIIF_IS_1000X) != 0) { 173 anar = 0; 174 if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) 175 anar |= ANAR_X_FD; 176 if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) 177 anar |= ANAR_X_HD; 178 179 if ((ife->ifm_media & IFM_FLOW) != 0 || 180 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) 181 anar |= ANAR_X_PAUSE_TOWARDS; 182 PHY_WRITE(sc, MII_ANAR, anar); 183 } else { 184 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | 185 ANAR_CSMA; 186 if ((ife->ifm_media & IFM_FLOW) != 0 || 187 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) { 188 if ((sc->mii_capabilities & 189 (BMSR_10TFDX | BMSR_100TXFDX)) != 0) 190 anar |= ANAR_FC; 191 /* XXX Only 1000BASE-T has PAUSE_ASYM? */ 192 if (((sc->mii_flags & MIIF_HAVE_GTCR) != 0) && 193 (sc->mii_extcapabilities & 194 (EXTSR_1000THDX | EXTSR_1000TFDX)) != 0) 195 anar |= ANAR_X_PAUSE_ASYM; 196 } 197 PHY_WRITE(sc, MII_ANAR, anar); 198 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) { 199 gtcr = 0; 200 if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) 201 gtcr |= GTCR_ADV_1000TFDX; 202 if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) 203 gtcr |= GTCR_ADV_1000THDX; 204 PHY_WRITE(sc, MII_100T2CR, gtcr); 205 } 206 } 207 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG); 208 return (EJUSTRETURN); 209 } 210 211 int 212 mii_phy_tick(struct mii_softc *sc) 213 { 214 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 215 struct ifnet *ifp = sc->mii_pdata->mii_ifp; 216 int reg; 217 218 /* Just bail now if the interface is down. */ 219 if ((ifp->if_flags & IFF_UP) == 0) 220 return (EJUSTRETURN); 221 222 /* 223 * If we're not doing autonegotiation, we don't need to do 224 * any extra work here. However, we need to check the link 225 * status so we can generate an announcement if the status 226 * changes. 227 */ 228 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 229 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 230 return (0); 231 } 232 233 /* Read the status register twice; BMSR_LINK is latch-low. */ 234 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 235 if ((reg & BMSR_LINK) != 0) { 236 sc->mii_ticks = 0; /* reset autonegotiation timer. */ 237 /* See above. */ 238 return (0); 239 } 240 241 /* Announce link loss right after it happens */ 242 if (sc->mii_ticks++ == 0) 243 return (0); 244 245 /* XXX: use default value if phy driver did not set mii_anegticks */ 246 if (sc->mii_anegticks == 0) 247 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 248 249 /* Only retry autonegotiation every mii_anegticks ticks. */ 250 if (sc->mii_ticks <= sc->mii_anegticks) 251 return (EJUSTRETURN); 252 253 sc->mii_ticks = 0; 254 mii_phy_reset(sc); 255 mii_phy_auto(sc); 256 return (0); 257 } 258 259 void 260 mii_phy_reset(struct mii_softc *sc) 261 { 262 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 263 int i, reg; 264 265 if ((sc->mii_flags & MIIF_NOISOLATE) != 0) 266 reg = BMCR_RESET; 267 else 268 reg = BMCR_RESET | BMCR_ISO; 269 PHY_WRITE(sc, MII_BMCR, reg); 270 271 /* Wait 100ms for it to complete. */ 272 for (i = 0; i < 100; i++) { 273 reg = PHY_READ(sc, MII_BMCR); 274 if ((reg & BMCR_RESET) == 0) 275 break; 276 DELAY(1000); 277 } 278 279 /* NB: a PHY may default to being powered down and/or isolated. */ 280 reg &= ~(BMCR_PDOWN | BMCR_ISO); 281 if ((sc->mii_flags & MIIF_NOISOLATE) == 0 && 282 ((ife == NULL && sc->mii_inst != 0) || 283 (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))) 284 reg |= BMCR_ISO; 285 if (PHY_READ(sc, MII_BMCR) != reg) 286 PHY_WRITE(sc, MII_BMCR, reg); 287 } 288 289 void 290 mii_phy_down(struct mii_softc *sc) 291 { 292 293 } 294 295 void 296 mii_phy_update(struct mii_softc *sc, int cmd) 297 { 298 struct mii_data *mii = sc->mii_pdata; 299 300 if (sc->mii_media_active != mii->mii_media_active || 301 cmd == MII_MEDIACHG) { 302 MIIBUS_STATCHG(sc->mii_dev); 303 sc->mii_media_active = mii->mii_media_active; 304 } 305 if (sc->mii_media_status != mii->mii_media_status) { 306 MIIBUS_LINKCHG(sc->mii_dev); 307 sc->mii_media_status = mii->mii_media_status; 308 } 309 } 310 311 /* 312 * Given an ifmedia word, return the corresponding ANAR value. 313 */ 314 int 315 mii_anar(int media) 316 { 317 int rv; 318 319 switch (media & (IFM_TMASK|IFM_NMASK|IFM_FDX)) { 320 case IFM_ETHER|IFM_10_T: 321 rv = ANAR_10|ANAR_CSMA; 322 break; 323 case IFM_ETHER|IFM_10_T|IFM_FDX: 324 rv = ANAR_10_FD|ANAR_CSMA; 325 break; 326 case IFM_ETHER|IFM_100_TX: 327 rv = ANAR_TX|ANAR_CSMA; 328 break; 329 case IFM_ETHER|IFM_100_TX|IFM_FDX: 330 rv = ANAR_TX_FD|ANAR_CSMA; 331 break; 332 case IFM_ETHER|IFM_100_T4: 333 rv = ANAR_T4|ANAR_CSMA; 334 break; 335 default: 336 rv = 0; 337 break; 338 } 339 340 return (rv); 341 } 342 343 /* 344 * Initialize generic PHY media based on BMSR, called when a PHY is 345 * attached. We expect to be set up to print a comma-separated list 346 * of media names. Does not print a newline. 347 */ 348 void 349 mii_add_media(struct mii_softc *sc) 350 { 351 struct mii_data *mii = sc->mii_pdata; 352 const char *sep = ""; 353 354 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0) { 355 printf("no media present"); 356 return; 357 } 358 359 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 360 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 361 362 if (sc->mii_capabilities & BMSR_10THDX) { 363 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 0); 364 PRINT("10baseT"); 365 } 366 if (sc->mii_capabilities & BMSR_10TFDX) { 367 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 368 BMCR_FDX); 369 PRINT("10baseT-FDX"); 370 } 371 if (sc->mii_capabilities & BMSR_100TXHDX) { 372 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 373 BMCR_S100); 374 PRINT("100baseTX"); 375 } 376 if (sc->mii_capabilities & BMSR_100TXFDX) { 377 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 378 BMCR_S100|BMCR_FDX); 379 PRINT("100baseTX-FDX"); 380 } 381 if (sc->mii_capabilities & BMSR_100T4) { 382 /* 383 * XXX How do you enable 100baseT4? I assume we set 384 * XXX BMCR_S100 and then assume the PHYs will take 385 * XXX watever action is necessary to switch themselves 386 * XXX into T4 mode. 387 */ 388 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst), 389 BMCR_S100); 390 PRINT("100baseT4"); 391 } 392 if (sc->mii_capabilities & BMSR_ANEG) { 393 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 394 BMCR_AUTOEN); 395 PRINT("auto"); 396 } 397 398 399 400 #undef ADD 401 #undef PRINT 402 } 403 404 /* 405 * Initialize generic PHY media based on BMSR, called when a PHY is 406 * attached. We expect to be set up to print a comma-separated list 407 * of media names. Does not print a newline. 408 */ 409 void 410 mii_phy_add_media(struct mii_softc *sc) 411 { 412 struct mii_data *mii = sc->mii_pdata; 413 const char *sep = ""; 414 int fdx = 0; 415 416 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && 417 (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) { 418 printf("no media present"); 419 return; 420 } 421 422 /* 423 * Set the autonegotiation timer for 10/100 media. Gigabit media is 424 * handled below. 425 */ 426 sc->mii_anegticks = MII_ANEGTICKS; 427 428 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 429 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 430 431 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) { 432 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 433 MII_MEDIA_NONE); 434 PRINT("none"); 435 } 436 437 /* 438 * There are different interpretations for the bits in 439 * HomePNA PHYs. And there is really only one media type 440 * that is supported. 441 */ 442 if ((sc->mii_flags & MIIF_IS_HPNA) != 0) { 443 if ((sc->mii_capabilities & BMSR_10THDX) != 0) { 444 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0, 445 sc->mii_inst), MII_MEDIA_10_T); 446 PRINT("HomePNA1"); 447 } 448 return; 449 } 450 451 if ((sc->mii_capabilities & BMSR_10THDX) != 0) { 452 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), 453 MII_MEDIA_10_T); 454 PRINT("10baseT"); 455 } 456 if ((sc->mii_capabilities & BMSR_10TFDX) != 0) { 457 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst), 458 MII_MEDIA_10_T_FDX); 459 PRINT("10baseT-FDX"); 460 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 461 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 462 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 463 IFM_FDX | IFM_FLOW, sc->mii_inst), 464 MII_MEDIA_10_T_FDX); 465 PRINT("10baseT-FDX-flow"); 466 } 467 fdx = 1; 468 } 469 if ((sc->mii_capabilities & BMSR_100TXHDX) != 0) { 470 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), 471 MII_MEDIA_100_TX); 472 PRINT("100baseTX"); 473 } 474 if ((sc->mii_capabilities & BMSR_100TXFDX) != 0) { 475 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), 476 MII_MEDIA_100_TX_FDX); 477 PRINT("100baseTX-FDX"); 478 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 479 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 480 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 481 IFM_FDX | IFM_FLOW, sc->mii_inst), 482 MII_MEDIA_100_TX_FDX); 483 PRINT("100baseTX-FDX-flow"); 484 } 485 fdx = 1; 486 } 487 if ((sc->mii_capabilities & BMSR_100T4) != 0) { 488 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst), 489 MII_MEDIA_100_T4); 490 PRINT("100baseT4"); 491 } 492 493 if ((sc->mii_extcapabilities & EXTSR_MEDIAMASK) != 0) { 494 /* 495 * XXX Right now only handle 1000SX and 1000TX. Need 496 * XXX to handle 1000LX and 1000CX somehow. 497 */ 498 if ((sc->mii_extcapabilities & EXTSR_1000XHDX) != 0) { 499 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 500 sc->mii_flags |= MIIF_IS_1000X; 501 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, 502 sc->mii_inst), MII_MEDIA_1000_X); 503 PRINT("1000baseSX"); 504 } 505 if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0) { 506 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 507 sc->mii_flags |= MIIF_IS_1000X; 508 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, 509 sc->mii_inst), MII_MEDIA_1000_X_FDX); 510 PRINT("1000baseSX-FDX"); 511 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 512 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 513 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 514 IFM_FDX | IFM_FLOW, sc->mii_inst), 515 MII_MEDIA_1000_X_FDX); 516 PRINT("1000baseSX-FDX-flow"); 517 } 518 fdx = 1; 519 } 520 521 /* 522 * 1000baseT media needs to be able to manipulate 523 * master/slave mode. 524 * 525 * All 1000baseT PHYs have a 1000baseT control register. 526 */ 527 if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) { 528 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 529 sc->mii_flags |= MIIF_HAVE_GTCR; 530 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, 531 sc->mii_inst), MII_MEDIA_1000_T); 532 PRINT("1000baseT"); 533 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 534 IFM_ETH_MASTER, sc->mii_inst), MII_MEDIA_1000_T); 535 PRINT("1000baseT-master"); 536 } 537 if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) { 538 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 539 sc->mii_flags |= MIIF_HAVE_GTCR; 540 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, 541 sc->mii_inst), MII_MEDIA_1000_T_FDX); 542 PRINT("1000baseT-FDX"); 543 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 544 IFM_FDX | IFM_ETH_MASTER, sc->mii_inst), 545 MII_MEDIA_1000_T_FDX); 546 PRINT("1000baseT-FDX-master"); 547 if ((sc->mii_flags & MIIF_DOPAUSE) != 0 && 548 (sc->mii_flags & MIIF_NOMANPAUSE) == 0) { 549 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 550 IFM_FDX | IFM_FLOW, sc->mii_inst), 551 MII_MEDIA_1000_T_FDX); 552 PRINT("1000baseT-FDX-flow"); 553 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 554 IFM_FDX | IFM_FLOW | IFM_ETH_MASTER, 555 sc->mii_inst), MII_MEDIA_1000_T_FDX); 556 PRINT("1000baseT-FDX-flow-master"); 557 } 558 fdx = 1; 559 } 560 } 561 562 if ((sc->mii_capabilities & BMSR_ANEG) != 0) { 563 /* intentionally invalid index */ 564 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 565 MII_NMEDIA); 566 PRINT("auto"); 567 if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE) != 0) { 568 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, IFM_FLOW, 569 sc->mii_inst), MII_NMEDIA); 570 PRINT("auto-flow"); 571 } 572 } 573 #undef ADD 574 #undef PRINT 575 } 576 577 int 578 mii_phy_detach(device_t dev) 579 { 580 struct mii_softc *sc; 581 582 sc = device_get_softc(dev); 583 mii_phy_down(sc); 584 sc->mii_dev = NULL; 585 LIST_REMOVE(sc, mii_list); 586 return (0); 587 } 588 589 const struct mii_phydesc * 590 mii_phy_match_gen(const struct mii_attach_args *ma, 591 const struct mii_phydesc *mpd, size_t len) 592 { 593 594 for (; mpd->mpd_name != NULL; 595 mpd = (const struct mii_phydesc *)((const char *)mpd + len)) { 596 if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui && 597 MII_MODEL(ma->mii_id2) == mpd->mpd_model) 598 return (mpd); 599 } 600 return (NULL); 601 } 602 603 const struct mii_phydesc * 604 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd) 605 { 606 607 return (mii_phy_match_gen(ma, mpd, sizeof(struct mii_phydesc))); 608 } 609 610 int 611 mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv) 612 { 613 614 mpd = mii_phy_match(device_get_ivars(dev), mpd); 615 if (mpd != NULL) { 616 device_set_desc(dev, mpd->mpd_name); 617 return (mrv); 618 } 619 return (ENXIO); 620 } 621 622 /* 623 * Return the flow control status flag from MII_ANAR & MII_ANLPAR. 624 */ 625 u_int 626 mii_phy_flowstatus(struct mii_softc *sc) 627 { 628 int anar, anlpar; 629 630 if ((sc->mii_flags & MIIF_DOPAUSE) == 0) 631 return (0); 632 633 anar = PHY_READ(sc, MII_ANAR); 634 anlpar = PHY_READ(sc, MII_ANLPAR); 635 636 /* 637 * Check for 1000BASE-X. Autonegotiation is a bit 638 * different on such devices. 639 */ 640 if ((sc->mii_flags & MIIF_IS_1000X) != 0) { 641 anar <<= 3; 642 anlpar <<= 3; 643 } 644 645 if ((anar & ANAR_PAUSE_SYM) != 0 && (anlpar & ANLPAR_PAUSE_SYM) != 0) 646 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 647 648 if ((anar & ANAR_PAUSE_SYM) == 0) { 649 if ((anar & ANAR_PAUSE_ASYM) != 0 && 650 (anlpar & ANLPAR_PAUSE_TOWARDS) != 0) 651 return (IFM_FLOW | IFM_ETH_TXPAUSE); 652 else 653 return (0); 654 } 655 656 if ((anar & ANAR_PAUSE_ASYM) == 0) { 657 if ((anlpar & ANLPAR_PAUSE_SYM) != 0) 658 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE); 659 else 660 return (0); 661 } 662 663 switch ((anlpar & ANLPAR_PAUSE_TOWARDS)) { 664 case ANLPAR_PAUSE_NONE: 665 return (0); 666 case ANLPAR_PAUSE_ASYM: 667 return (IFM_FLOW | IFM_ETH_RXPAUSE); 668 default: 669 return (IFM_FLOW | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE); 670 } 671 /* NOTREACHED */ 672 }
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