mii_physubr.c

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    1 /*      $NetBSD: mii_physubr.c,v 1.37 2003/09/10 05:25:22 briggs Exp $  */
    2 
    3 /*-
    4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
    9  * NASA Ames Research Center.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *      This product includes software developed by the NetBSD
   22  *      Foundation, Inc. and its contributors.
   23  * 4. Neither the name of The NetBSD Foundation nor the names of its
   24  *    contributors may be used to endorse or promote products derived
   25  *    from this software without specific prior written permission.
   26  *
   27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   37  * POSSIBILITY OF SUCH DAMAGE.
   38  */
   39 
   40 /*
   41  * Subroutines common to all PHYs.
   42  */
   43 
   44 #include <sys/cdefs.h>
   45 __KERNEL_RCSID(0, "$NetBSD: mii_physubr.c,v 1.37 2003/09/10 05:25:22 briggs Exp $");
   46 
   47 #include <sys/param.h>
   48 #include <sys/device.h>
   49 #include <sys/systm.h>
   50 #include <sys/kernel.h>
   51 #include <sys/socket.h>
   52 #include <sys/errno.h>
   53 #include <sys/proc.h>
   54 
   55 #include <net/if.h>
   56 #include <net/if_media.h>
   57 #include <net/route.h>
   58 
   59 #include <dev/mii/mii.h>
   60 #include <dev/mii/miivar.h>
   61 
   62 /*
   63  * Media to register setting conversion table.  Order matters.
   64  */
   65 const struct mii_media mii_media_table[MII_NMEDIA] = {
   66         /* None */
   67         { BMCR_ISO,             ANAR_CSMA,
   68           0, },
   69 
   70         /* 10baseT */
   71         { BMCR_S10,             ANAR_CSMA|ANAR_10,
   72           0, },
   73 
   74         /* 10baseT-FDX */
   75         { BMCR_S10|BMCR_FDX,    ANAR_CSMA|ANAR_10_FD,
   76           0, },
   77 
   78         /* 100baseT4 */
   79         { BMCR_S100,            ANAR_CSMA|ANAR_T4,
   80           0, },
   81 
   82         /* 100baseTX */
   83         { BMCR_S100,            ANAR_CSMA|ANAR_TX,
   84           0, },
   85 
   86         /* 100baseTX-FDX */
   87         { BMCR_S100|BMCR_FDX,   ANAR_CSMA|ANAR_TX_FD,
   88           0, },
   89 
   90         /* 1000baseX */
   91         { BMCR_S1000,           ANAR_CSMA,
   92           0, },
   93 
   94         /* 1000baseX-FDX */
   95         { BMCR_S1000|BMCR_FDX,  ANAR_CSMA,
   96           0, },
   97 
   98         /* 1000baseT */
   99         { BMCR_S1000,           ANAR_CSMA,
  100           GTCR_ADV_1000THDX },
  101 
  102         /* 1000baseT-FDX */
  103         { BMCR_S1000,           ANAR_CSMA,
  104           GTCR_ADV_1000TFDX },
  105 };
  106 
  107 void    mii_phy_auto_timeout(void *);
  108 
  109 void
  110 mii_phy_setmedia(struct mii_softc *sc)
  111 {
  112         struct mii_data *mii = sc->mii_pdata;
  113         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  114         int bmcr, anar, gtcr;
  115 
  116         if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) {
  117                 if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
  118                     (sc->mii_flags & MIIF_FORCEANEG))
  119                         (void) mii_phy_auto(sc, 1);
  120                 return;
  121         }
  122 
  123         /*
  124          * Table index is stored in the media entry.
  125          */
  126 
  127 #ifdef DIAGNOSTIC
  128         if (ife->ifm_data < 0 || ife->ifm_data >= MII_NMEDIA)
  129                 panic("mii_phy_setmedia");
  130 #endif
  131 
  132         anar = mii_media_table[ife->ifm_data].mm_anar;
  133         bmcr = mii_media_table[ife->ifm_data].mm_bmcr;
  134         gtcr = mii_media_table[ife->ifm_data].mm_gtcr;
  135 
  136         if (mii->mii_media.ifm_media & IFM_ETH_MASTER) {
  137                 switch (IFM_SUBTYPE(ife->ifm_media)) {
  138                 case IFM_1000_T:
  139                         gtcr |= GTCR_MAN_MS|GTCR_ADV_MS;
  140                         break;
  141 
  142                 default:
  143                         panic("mii_phy_setmedia: MASTER on wrong media");
  144                 }
  145         }
  146 
  147         if (ife->ifm_media & IFM_LOOP)
  148                 bmcr |= BMCR_LOOP;
  149 
  150         PHY_WRITE(sc, MII_ANAR, anar);
  151         PHY_WRITE(sc, MII_BMCR, bmcr);
  152         if (sc->mii_flags & MIIF_HAVE_GTCR)
  153                 PHY_WRITE(sc, MII_100T2CR, gtcr);
  154 }
  155 
  156 int
  157 mii_phy_auto(struct mii_softc *sc, int waitfor)
  158 {
  159         int i;
  160 
  161         if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
  162                 /*
  163                  * Check for 1000BASE-X.  Autonegotiation is a bit
  164                  * different on such devices.
  165                  */
  166                 if (sc->mii_flags & MIIF_IS_1000X) {
  167                         uint16_t anar = 0;
  168 
  169                         if (sc->mii_extcapabilities & EXTSR_1000XFDX)
  170                                 anar |= ANAR_X_FD;
  171                         if (sc->mii_extcapabilities & EXTSR_1000XHDX)
  172                                 anar |= ANAR_X_HD;
  173 
  174                         if (sc->mii_flags & MIIF_DOPAUSE) {
  175                                 /* XXX Asymmetric vs. symmetric? */
  176                                 anar |= ANLPAR_X_PAUSE_TOWARDS;
  177                         }
  178 
  179                         PHY_WRITE(sc, MII_ANAR, anar);
  180                 } else {
  181                         uint16_t anar;
  182 
  183                         anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
  184                             ANAR_CSMA;
  185                         if (sc->mii_flags & MIIF_DOPAUSE)
  186                                 anar |= ANAR_FC;
  187                         PHY_WRITE(sc, MII_ANAR, anar);
  188                         if (sc->mii_flags & MIIF_HAVE_GTCR) {
  189                                 uint16_t gtcr = 0;
  190 
  191                                 if (sc->mii_extcapabilities & EXTSR_1000TFDX)
  192                                         gtcr |= GTCR_ADV_1000TFDX;
  193                                 if (sc->mii_extcapabilities & EXTSR_1000THDX)
  194                                         gtcr |= GTCR_ADV_1000THDX;
  195 
  196                                 PHY_WRITE(sc, MII_100T2CR, gtcr);
  197                         }
  198                 }
  199                 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
  200         }
  201 
  202         if (waitfor) {
  203                 /* Wait 500ms for it to complete. */
  204                 for (i = 0; i < 500; i++) {
  205                         if (PHY_READ(sc, MII_BMSR) & BMSR_ACOMP)
  206                                 return (0);
  207                         delay(1000);
  208                 }
  209 
  210                 /*
  211                  * Don't need to worry about clearing MIIF_DOINGAUTO.
  212                  * If that's set, a timeout is pending, and it will
  213                  * clear the flag.
  214                  */
  215                 return (EIO);
  216         }
  217 
  218         /*
  219          * Just let it finish asynchronously.  This is for the benefit of
  220          * the tick handler driving autonegotiation.  Don't want 500ms
  221          * delays all the time while the system is running!
  222          */
  223         if (sc->mii_flags & MIIF_AUTOTSLEEP) {
  224                 sc->mii_flags |= MIIF_DOINGAUTO;
  225                 tsleep(&sc->mii_flags, PZERO, "miiaut", hz >> 1);
  226                 mii_phy_auto_timeout(sc);
  227         } else if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
  228                 sc->mii_flags |= MIIF_DOINGAUTO;
  229                 callout_reset(&sc->mii_nway_ch, hz >> 1,
  230                     mii_phy_auto_timeout, sc);
  231         }
  232         return (EJUSTRETURN);
  233 }
  234 
  235 void
  236 mii_phy_auto_timeout(void *arg)
  237 {
  238         struct mii_softc *sc = arg;
  239         int s;
  240 
  241         if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
  242                 return;
  243 
  244         s = splnet();
  245         sc->mii_flags &= ~MIIF_DOINGAUTO;
  246 
  247         /* Update the media status. */
  248         (void) PHY_SERVICE(sc, sc->mii_pdata, MII_POLLSTAT);
  249         splx(s);
  250 }
  251 
  252 int
  253 mii_phy_tick(struct mii_softc *sc)
  254 {
  255         struct mii_data *mii = sc->mii_pdata;
  256         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  257         int reg;
  258 
  259         /* Just bail now if the interface is down. */
  260         if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  261                 return (EJUSTRETURN);
  262 
  263         /*
  264          * If we're not doing autonegotiation, we don't need to do
  265          * any extra work here.  However, we need to check the link
  266          * status so we can generate an announcement if the status
  267          * changes.
  268          */
  269         if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
  270                 return (0);
  271 
  272         /* Read the status register twice; BMSR_LINK is latch-low. */
  273         reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  274         if (reg & BMSR_LINK) {
  275                 /*
  276                  * See above.
  277                  */
  278                 return (0);
  279         }
  280 
  281         /*
  282          * Only retry autonegotiation every N seconds.
  283          */
  284         KASSERT(sc->mii_anegticks != 0);
  285         if (++sc->mii_ticks != sc->mii_anegticks)
  286                 return (EJUSTRETURN);
  287 
  288         sc->mii_ticks = 0;
  289         PHY_RESET(sc);
  290 
  291         if (mii_phy_auto(sc, 0) == EJUSTRETURN)
  292                 return (EJUSTRETURN);
  293 
  294         /*
  295          * Might need to generate a status message if autonegotiation
  296          * failed.
  297          */
  298         return (0);
  299 }
  300 
  301 void
  302 mii_phy_reset(struct mii_softc *sc)
  303 {
  304         int reg, i;
  305 
  306         if (sc->mii_flags & MIIF_NOISOLATE)
  307                 reg = BMCR_RESET;
  308         else
  309                 reg = BMCR_RESET | BMCR_ISO;
  310         PHY_WRITE(sc, MII_BMCR, reg);
  311 
  312         /*
  313          * It is best to allow a little time for the reset to settle
  314          * in before we start polling the BMCR again.  Notably, the
  315          * DP83840A manual states that there should be a 500us delay
  316          * between asserting software reset and attempting MII serial
  317          * operations.  Also, a DP83815 can get into a bad state on
  318          * cable removal and reinsertion if we do not delay here.
  319          */
  320         delay(500);
  321 
  322         /* Wait another 100ms for it to complete. */
  323         for (i = 0; i < 100; i++) {
  324                 reg = PHY_READ(sc, MII_BMCR); 
  325                 if ((reg & BMCR_RESET) == 0)
  326                         break;
  327                 delay(1000);
  328         }
  329 
  330         if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0))
  331                 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
  332 }
  333 
  334 void
  335 mii_phy_down(struct mii_softc *sc)
  336 {
  337 
  338         if (sc->mii_flags & MIIF_DOINGAUTO) {
  339                 sc->mii_flags &= ~MIIF_DOINGAUTO;
  340                 callout_stop(&sc->mii_nway_ch);
  341         }
  342 }
  343 
  344 void
  345 mii_phy_status(struct mii_softc *sc)
  346 {
  347 
  348         PHY_STATUS(sc);
  349 }
  350 
  351 void
  352 mii_phy_update(struct mii_softc *sc, int cmd)
  353 {
  354         struct mii_data *mii = sc->mii_pdata;
  355         int announce, s;
  356 
  357         if (sc->mii_media_active != mii->mii_media_active ||
  358             sc->mii_media_status != mii->mii_media_status ||
  359             cmd == MII_MEDIACHG) {
  360                 announce = mii_phy_statusmsg(sc);
  361                 (*mii->mii_statchg)(sc->mii_dev.dv_parent);
  362                 sc->mii_media_active = mii->mii_media_active;
  363                 sc->mii_media_status = mii->mii_media_status;
  364 
  365                 if (announce) {
  366                         s = splnet();
  367                         rt_ifmsg(mii->mii_ifp);
  368                         splx(s);
  369                 }
  370         }
  371 }
  372 
  373 int
  374 mii_phy_statusmsg(struct mii_softc *sc)
  375 {
  376         struct mii_data *mii = sc->mii_pdata;
  377         struct ifnet *ifp = mii->mii_ifp;
  378         int link_state, announce = 0;
  379         u_int baudrate;
  380 
  381         if (mii->mii_media_status & IFM_AVALID) {
  382                 if (mii->mii_media_status & IFM_ACTIVE)
  383                         link_state = LINK_STATE_UP;
  384                 else
  385                         link_state = LINK_STATE_DOWN;
  386         } else
  387                 link_state = LINK_STATE_UNKNOWN;
  388 
  389         baudrate = ifmedia_baudrate(mii->mii_media_active);
  390 
  391         if (link_state != ifp->if_link_state) {
  392                 ifp->if_link_state = link_state;
  393                 /*
  394                  * XXX Right here we'd like to notify protocols
  395                  * XXX that the link status has changed, so that
  396                  * XXX e.g. Duplicate Address Detection can restart.
  397                  */
  398                 announce = 1;
  399         }
  400 
  401         if (baudrate != ifp->if_baudrate) {
  402                 ifp->if_baudrate = baudrate;
  403                 announce = 1;
  404         }
  405 
  406         return (announce);
  407 }
  408 
  409 /*
  410  * Initialize generic PHY media based on BMSR, called when a PHY is
  411  * attached.  We expect to be set up to print a comma-separated list
  412  * of media names.  Does not print a newline.
  413  */
  414 void
  415 mii_phy_add_media(struct mii_softc *sc)
  416 {
  417         struct mii_data *mii = sc->mii_pdata;
  418         const char *sep = "";
  419 
  420 #define ADD(m, c)       ifmedia_add(&mii->mii_media, (m), (c), NULL)
  421 #define PRINT(n)        aprint_normal("%s%s", sep, (n)); sep = ", "
  422 
  423         if ((sc->mii_flags & MIIF_NOISOLATE) == 0)
  424                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
  425                     MII_MEDIA_NONE);
  426 
  427         /*
  428          * There are different interpretations for the bits in
  429          * HomePNA PHYs.  And there is really only one media type
  430          * that is supported.
  431          */
  432         if (sc->mii_flags & MIIF_IS_HPNA) {
  433                 if (sc->mii_capabilities & BMSR_10THDX) {
  434                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0,
  435                                          sc->mii_inst),
  436                             MII_MEDIA_10_T);
  437                         PRINT("HomePNA1");
  438                 }
  439                 return;
  440         }
  441 
  442         if (sc->mii_capabilities & BMSR_10THDX) {
  443                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
  444                     MII_MEDIA_10_T);
  445                 PRINT("10baseT");
  446         }
  447         if (sc->mii_capabilities & BMSR_10TFDX) {
  448                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
  449                     MII_MEDIA_10_T_FDX);
  450                 PRINT("10baseT-FDX");
  451         }
  452         if (sc->mii_capabilities & BMSR_100TXHDX) {
  453                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
  454                     MII_MEDIA_100_TX);
  455                 PRINT("100baseTX");
  456         }
  457         if (sc->mii_capabilities & BMSR_100TXFDX) {
  458                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
  459                     MII_MEDIA_100_TX_FDX);
  460                 PRINT("100baseTX-FDX");
  461         }
  462         if (sc->mii_capabilities & BMSR_100T4) {
  463                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst),
  464                     MII_MEDIA_100_T4);
  465                 PRINT("100baseT4");
  466         }
  467 
  468         if (sc->mii_extcapabilities & EXTSR_MEDIAMASK) {
  469                 /*
  470                  * XXX Right now only handle 1000SX and 1000TX.  Need
  471                  * XXX to handle 1000LX and 1000CX some how.
  472                  *
  473                  * Note since it can take 5 seconds to auto-negotiate
  474                  * a gigabit link, we make anegticks 10 seconds for
  475                  * all the gigabit media types.
  476                  */
  477                 if (sc->mii_extcapabilities & EXTSR_1000XHDX) {
  478                         sc->mii_anegticks = 10;
  479                         sc->mii_flags |= MIIF_IS_1000X;
  480                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
  481                             sc->mii_inst), MII_MEDIA_1000_X);
  482                         PRINT("1000baseSX");
  483                 }
  484                 if (sc->mii_extcapabilities & EXTSR_1000XFDX) {
  485                         sc->mii_anegticks = 10;
  486                         sc->mii_flags |= MIIF_IS_1000X;
  487                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
  488                             sc->mii_inst), MII_MEDIA_1000_X_FDX);
  489                         PRINT("1000baseSX-FDX");
  490                 }
  491 
  492                 /*
  493                  * 1000baseT media needs to be able to manipulate
  494                  * master/slave mode.  We set IFM_ETH_MASTER in
  495                  * the "don't care mask" and filter it out when
  496                  * the media is set.
  497                  *
  498                  * All 1000baseT PHYs have a 1000baseT control register.
  499                  */
  500                 if (sc->mii_extcapabilities & EXTSR_1000THDX) {
  501                         sc->mii_anegticks = 10;
  502                         sc->mii_flags |= MIIF_HAVE_GTCR;
  503                         mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
  504                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
  505                             sc->mii_inst), MII_MEDIA_1000_T);
  506                         PRINT("1000baseT");
  507                 }
  508                 if (sc->mii_extcapabilities & EXTSR_1000TFDX) {
  509                         sc->mii_anegticks = 10;
  510                         sc->mii_flags |= MIIF_HAVE_GTCR;
  511                         mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
  512                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
  513                             sc->mii_inst), MII_MEDIA_1000_T_FDX);
  514                         PRINT("1000baseT-FDX");
  515                 }
  516         }
  517 
  518         if (sc->mii_capabilities & BMSR_ANEG) {
  519                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst),
  520                     MII_NMEDIA);        /* intentionally invalid index */
  521                 PRINT("auto");
  522         }
  523 #undef ADD
  524 #undef PRINT
  525 }
  526 
  527 void
  528 mii_phy_delete_media(struct mii_softc *sc)
  529 {
  530         struct mii_data *mii = sc->mii_pdata;
  531 
  532         ifmedia_delete_instance(&mii->mii_media, sc->mii_inst);
  533 }
  534 
  535 int
  536 mii_phy_activate(struct device *self, enum devact act)
  537 {
  538         int rv = 0;
  539 
  540         switch (act) {
  541         case DVACT_ACTIVATE:
  542                 rv = EOPNOTSUPP;
  543                 break;
  544 
  545         case DVACT_DEACTIVATE:
  546                 /* Nothing special to do. */
  547                 break;
  548         }
  549 
  550         return (rv);
  551 }
  552 
  553 /* ARGSUSED1 */
  554 int
  555 mii_phy_detach(struct device *self, int flags)
  556 {
  557         struct mii_softc *sc = (void *) self;
  558 
  559         if (sc->mii_flags & MIIF_DOINGAUTO)
  560                 callout_stop(&sc->mii_nway_ch);
  561 
  562         mii_phy_delete_media(sc);
  563 
  564         return (0);
  565 }
  566 
  567 const struct mii_phydesc *
  568 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd)
  569 {
  570 
  571         for (; mpd->mpd_name != NULL; mpd++) {
  572                 if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui &&
  573                     MII_MODEL(ma->mii_id2) == mpd->mpd_model)
  574                         return (mpd);
  575         }
  576         return (NULL);
  577 }
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FreeBSD/Linux Kernel Cross Reference sys/dev/mii/mii_physubr.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/mii_physubr.c
