The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/nsgphy.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-4-Clause
    3  *
    4  * Copyright (c) 2001 Wind River Systems
    5  * Copyright (c) 2001
    6  *      Bill Paul <wpaul@bsdi.com>.  All rights reserved.
    7  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
    8  * All rights reserved.
    9  *
   10  * This code is derived from software contributed to The NetBSD Foundation
   11  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   12  * NASA Ames Research Center.
   13  *
   14  * Redistribution and use in source and binary forms, with or without
   15  * modification, are permitted provided that the following conditions
   16  * are met:
   17  * 1. Redistributions of source code must retain the above copyright
   18  *    notice, this list of conditions and the following disclaimer.
   19  * 2. Redistributions in binary form must reproduce the above copyright
   20  *    notice, this list of conditions and the following disclaimer in the
   21  *    documentation and/or other materials provided with the distribution.
   22  * 3. All advertising materials mentioning features or use of this software
   23  *    must display the following acknowledgement:
   24  *      This product includes software developed by Bill Paul.
   25  * 4. Neither the name of the author nor the names of any co-contributors
   26  *    may be used to endorse or promote products derived from this software
   27  *    without specific prior written permission.
   28  *
   29  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
   30  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   31  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   32  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
   33  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   34  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   35  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   36  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   37  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   38  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   39  * THE POSSIBILITY OF SUCH DAMAGE.
   40  */
   41 
   42 #include <sys/cdefs.h>
   43 __FBSDID("$FreeBSD$");
   44 
   45 /*
   46  * Driver for the National Semiconductor DP83861, DP83865 and DP83891
   47  * 10/100/1000 PHYs.
   48  * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf
   49  * and at: http://www.national.com/ds/DP/DP83865.pdf
   50  *
   51  * The DP83891 is the older NS GigE PHY which isn't being sold
   52  * anymore.  The DP83861 is its replacement, which is an 'enhanced'
   53  * firmware driven component.  The major difference between the
   54  * two is that the DP83891 can't generate interrupts, while the
   55  * 83861 can (probably it wasn't originally designed to do this, but
   56  * it can now thanks to firmware updates).  The DP83861 also allows
   57  * access to its internal RAM via indirect register access.  The
   58  * DP83865 is an ultra low power version of the DP83861 and DP83891.
   59  */
   60 
   61 #include <sys/param.h>
   62 #include <sys/systm.h>
   63 #include <sys/kernel.h>
   64 #include <sys/module.h>
   65 #include <sys/socket.h>
   66 #include <sys/bus.h>
   67 
   68 #include <net/if.h>
   69 #include <net/if_media.h>
   70 
   71 #include <dev/mii/mii.h>
   72 #include <dev/mii/miivar.h>
   73 #include "miidevs.h"
   74 
   75 #include <dev/mii/nsgphyreg.h>
   76 
   77 #include "miibus_if.h"
   78 
   79 static int nsgphy_probe(device_t);
   80 static int nsgphy_attach(device_t);
   81 
   82 static device_method_t nsgphy_methods[] = {
   83         /* device interface */
   84         DEVMETHOD(device_probe,         nsgphy_probe),
   85         DEVMETHOD(device_attach,        nsgphy_attach),
   86         DEVMETHOD(device_detach,        mii_phy_detach),
   87         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   88         DEVMETHOD_END
   89 };
   90 
   91 static devclass_t nsgphy_devclass;
   92 
   93 static driver_t nsgphy_driver = {
   94         "nsgphy",
   95         nsgphy_methods,
   96         sizeof(struct mii_softc)
   97 };
   98 
   99 DRIVER_MODULE(nsgphy, miibus, nsgphy_driver, nsgphy_devclass, 0, 0);
  100 
  101 static int      nsgphy_service(struct mii_softc *, struct mii_data *,int);
  102 static void     nsgphy_status(struct mii_softc *);
  103 
  104 static const struct mii_phydesc nsgphys[] = {
  105         MII_PHY_DESC(xxNATSEMI, DP83861),
  106         MII_PHY_DESC(xxNATSEMI, DP83865),
  107         MII_PHY_DESC(xxNATSEMI, DP83891),
  108         MII_PHY_END
  109 };
  110 
  111 static const struct mii_phy_funcs nsgphy_funcs = {
  112         nsgphy_service,
  113         nsgphy_status,
  114         mii_phy_reset
  115 };
  116 
  117 static int
  118 nsgphy_probe(device_t dev)
  119 {
  120 
  121         return (mii_phy_dev_probe(dev, nsgphys, BUS_PROBE_DEFAULT));
  122 }
  123 
  124 static int
  125 nsgphy_attach(device_t dev)
  126 {
  127         struct mii_softc *sc;
  128 
  129         sc = device_get_softc(dev);
  130 
  131         mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &nsgphy_funcs, 0);
  132 
  133         PHY_RESET(sc);
  134 
  135         /*
  136          * NB: the PHY has the 10BASE-T BMSR bits hard-wired to 0,
  137          * even though it supports 10BASE-T.
  138          */
  139         sc->mii_capabilities = (PHY_READ(sc, MII_BMSR) |
  140             BMSR_10TFDX | BMSR_10THDX) & sc->mii_capmask;
  141         /*
  142          * Note that as documented manual 1000BASE-T modes of DP83865 only
  143          * work together with other National Semiconductor PHYs.
  144          */
  145         if (sc->mii_capabilities & BMSR_EXTSTAT)
  146                 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
  147 
  148         mii_phy_add_media(sc);
  149         printf("\n");
  150 
  151         MIIBUS_MEDIAINIT(sc->mii_dev);
  152         return (0);
  153 }
  154 
  155 static int
  156 nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  157 {
  158 
  159         switch (cmd) {
  160         case MII_POLLSTAT:
  161                 break;
  162 
  163         case MII_MEDIACHG:
  164                 mii_phy_setmedia(sc);
  165                 break;
  166 
  167         case MII_TICK:
  168                 if (mii_phy_tick(sc) == EJUSTRETURN)
  169                         return (0);
  170                 break;
  171         }
  172 
  173         /* Update the media status. */
  174         PHY_STATUS(sc);
  175 
  176         /* Callback if something changed. */
  177         mii_phy_update(sc, cmd);
  178         return (0);
  179 }
  180 
  181 static void
  182 nsgphy_status(struct mii_softc *sc)
  183 {
  184         struct mii_data *mii = sc->mii_pdata;
  185         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  186         int bmsr, bmcr, physup, gtsr;
  187 
  188         mii->mii_media_status = IFM_AVALID;
  189         mii->mii_media_active = IFM_ETHER;
  190 
  191         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  192 
  193         physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
  194 
  195         if (physup & PHY_SUP_LINK)
  196                 mii->mii_media_status |= IFM_ACTIVE;
  197 
  198         bmcr = PHY_READ(sc, MII_BMCR);
  199         if (bmcr & BMCR_ISO) {
  200                 mii->mii_media_active |= IFM_NONE;
  201                 mii->mii_media_status = 0;
  202                 return;
  203         }
  204 
  205         if (bmcr & BMCR_LOOP)
  206                 mii->mii_media_active |= IFM_LOOP;
  207 
  208         if (bmcr & BMCR_AUTOEN) {
  209                 /*
  210                  * The media status bits are only valid if autonegotiation
  211                  * has completed (or it's disabled).
  212                  */
  213                 if ((bmsr & BMSR_ACOMP) == 0) {
  214                         /* Erg, still trying, I guess... */
  215                         mii->mii_media_active |= IFM_NONE;
  216                         return;
  217                 }
  218 
  219                 switch (physup & (PHY_SUP_SPEED1 | PHY_SUP_SPEED0)) {
  220                 case PHY_SUP_SPEED1:
  221                         mii->mii_media_active |= IFM_1000_T;
  222                         gtsr = PHY_READ(sc, MII_100T2SR);
  223                         if (gtsr & GTSR_MS_RES)
  224                                 mii->mii_media_active |= IFM_ETH_MASTER;
  225                         break;
  226 
  227                 case PHY_SUP_SPEED0:
  228                         mii->mii_media_active |= IFM_100_TX;
  229                         break;
  230 
  231                 case 0:
  232                         mii->mii_media_active |= IFM_10_T;
  233                         break;
  234 
  235                 default:
  236                         mii->mii_media_active |= IFM_NONE;
  237                         mii->mii_media_status = 0;
  238                         return;
  239                 }
  240 
  241                 if (physup & PHY_SUP_DUPLEX)
  242                         mii->mii_media_active |=
  243                             IFM_FDX | mii_phy_flowstatus(sc);
  244                 else
  245                         mii->mii_media_active |= IFM_HDX;
  246         } else
  247                 mii->mii_media_active = ife->ifm_media;
  248 }

Cache object: d56fa0123ff21604646e291e22814ef6


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