The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/nsgphy.c

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    1 /*-
    2  * Copyright (c) 2001 Wind River Systems
    3  * Copyright (c) 2001
    4  *      Bill Paul <wpaul@bsdi.com>.  All rights reserved.
    5  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to The NetBSD Foundation
    9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   10  * NASA Ames Research Center.
   11  *
   12  * Redistribution and use in source and binary forms, with or without
   13  * modification, are permitted provided that the following conditions
   14  * are met:
   15  * 1. Redistributions of source code must retain the above copyright
   16  *    notice, this list of conditions and the following disclaimer.
   17  * 2. Redistributions in binary form must reproduce the above copyright
   18  *    notice, this list of conditions and the following disclaimer in the
   19  *    documentation and/or other materials provided with the distribution.
   20  * 3. All advertising materials mentioning features or use of this software
   21  *    must display the following acknowledgement:
   22  *      This product includes software developed by Bill Paul.
   23  * 4. Neither the name of the author nor the names of any co-contributors
   24  *    may be used to endorse or promote products derived from this software
   25  *    without specific prior written permission.
   26  *
   27  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
   28  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   29  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   30  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
   31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   37  * THE POSSIBILITY OF SUCH DAMAGE.
   38  */
   39 
   40 #include <sys/cdefs.h>
   41 __FBSDID("$FreeBSD$");
   42 
   43 /*
   44  * Driver for the National Semiconductor DP83891 and DP83861
   45  * 10/100/1000 PHYs.
   46  * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf
   47  *
   48  * The DP83891 is the older NatSemi gigE PHY which isn't being sold
   49  * anymore. The DP83861 is its replacement, which is an 'enhanced'
   50  * firmware driven component. The major difference between the
   51  * two is that the 83891 can't generate interrupts, while the
   52  * 83861 can. (I think it wasn't originally designed to do this, but
   53  * it can now thanks to firmware updates.) The 83861 also allows
   54  * access to its internal RAM via indirect register access.
   55  */
   56 
   57 #include <sys/param.h>
   58 #include <sys/systm.h>
   59 #include <sys/kernel.h>
   60 #include <sys/module.h>
   61 #include <sys/socket.h>
   62 #include <sys/bus.h>
   63 
   64 #include <machine/clock.h>
   65 
   66 #include <net/if.h>
   67 #include <net/if_media.h>
   68 
   69 #include <dev/mii/mii.h>
   70 #include <dev/mii/miivar.h>
   71 #include "miidevs.h"
   72 
   73 #include <dev/mii/nsgphyreg.h>
   74 
   75 #include "miibus_if.h"
   76 
   77 static int nsgphy_probe(device_t);
   78 static int nsgphy_attach(device_t);
   79 
   80 static device_method_t nsgphy_methods[] = {
   81         /* device interface */
   82         DEVMETHOD(device_probe,         nsgphy_probe),
   83         DEVMETHOD(device_attach,        nsgphy_attach),
   84         DEVMETHOD(device_detach,        mii_phy_detach),
   85         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   86         { 0, 0 }
   87 };
   88 
   89 static devclass_t nsgphy_devclass;
   90 
   91 static driver_t nsgphy_driver = {
   92         "nsgphy",
   93         nsgphy_methods,
   94         sizeof(struct mii_softc)
   95 };
   96 
   97 
   98 DRIVER_MODULE(nsgphy, miibus, nsgphy_driver, nsgphy_devclass, 0, 0);
   99 
  100 static int      nsgphy_service(struct mii_softc *, struct mii_data *,int);
  101 static void     nsgphy_status(struct mii_softc *);
  102 
  103 const struct mii_phydesc gphyters[] = {
  104         { MII_OUI_NATSEMI,              MII_MODEL_NATSEMI_DP83861,
  105           MII_STR_NATSEMI_DP83861 },
  106 
  107         { MII_OUI_NATSEMI,              MII_MODEL_NATSEMI_DP83891,
  108           MII_STR_NATSEMI_DP83891 },
  109 
  110         { 0,                            0,
  111           NULL },
  112 };
  113 
  114 static int
  115 nsgphy_probe(device_t dev)
  116 {
  117         struct mii_attach_args *ma;
  118         const struct mii_phydesc *mpd;
  119 
  120         ma = device_get_ivars(dev);
  121         mpd = mii_phy_match(ma, gphyters);
  122         if (mpd != NULL) {
  123                 device_set_desc(dev, mpd->mpd_name);
  124                 return(0);
  125         }
  126 
  127         return(ENXIO);
  128 }
  129 
  130 static int
  131 nsgphy_attach(device_t dev)
  132 {
  133         struct mii_softc *sc;
  134         struct mii_attach_args *ma;
  135         struct mii_data *mii;
  136 
  137         sc = device_get_softc(dev);
  138         ma = device_get_ivars(dev);
  139         if (bootverbose)
  140                 device_printf(dev, "<rev. %d>\n", MII_REV(ma->mii_id2));
  141         device_printf(dev, " ");
  142         sc->mii_dev = device_get_parent(dev);
  143         mii = device_get_softc(sc->mii_dev);
  144         LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
  145 
  146         sc->mii_inst = mii->mii_instance;
  147         sc->mii_phy = ma->mii_phyno;
  148         sc->mii_service = nsgphy_service;
  149         sc->mii_pdata = mii;
  150         sc->mii_anegticks = 5;
  151 
  152         mii->mii_instance++;
  153 
  154         sc->mii_capabilities = (PHY_READ(sc, MII_BMSR) |
  155             (BMSR_10TFDX|BMSR_10THDX)) & ma->mii_capmask;
  156         if (sc->mii_capabilities & BMSR_EXTSTAT)
  157                 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
  158 
  159         mii_phy_add_media(sc);
  160         printf("\n");
  161 
  162         MIIBUS_MEDIAINIT(sc->mii_dev);
  163         return(0);
  164 }
  165 
  166 static int
  167 nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  168 {
  169         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  170         int reg;
  171 
  172         switch (cmd) {
  173         case MII_POLLSTAT:
  174                 /*
  175                  * If we're not polling our PHY instance, just return.
  176                  */
  177                 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
  178                         return (0);
  179                 break;
  180 
  181         case MII_MEDIACHG:
  182                 /*
  183                  * If the media indicates a different PHY instance,
  184                  * isolate ourselves.
  185                  */
  186                 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
  187                         reg = PHY_READ(sc, MII_BMCR);
  188                         PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
  189                         return (0);
  190                 }
  191 
  192                 /*
  193                  * If the interface is not up, don't do anything.
  194                  */
  195                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  196                         break;
  197 
  198                 mii_phy_setmedia(sc);
  199                 break;
  200 
  201         case MII_TICK:
  202                 /*
  203                  * If we're not currently selected, just return.
  204                  */
  205                 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
  206                         return (0);
  207 
  208                 if (mii_phy_tick(sc) == EJUSTRETURN)
  209                         return (0);
  210                 break;
  211         }
  212 
  213         /* Update the media status. */
  214         nsgphy_status(sc);
  215 
  216         /* Callback if something changed. */
  217         mii_phy_update(sc, cmd);
  218         return (0);
  219 }
  220 
  221 static void
  222 nsgphy_status(struct mii_softc *sc)
  223 {
  224         struct mii_data *mii = sc->mii_pdata;
  225         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  226         int bmsr, bmcr, physup, gtsr;
  227 
  228         mii->mii_media_status = IFM_AVALID;
  229         mii->mii_media_active = IFM_ETHER;
  230 
  231         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  232 
  233         physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
  234 
  235         if (physup & PHY_SUP_LINK)
  236                 mii->mii_media_status |= IFM_ACTIVE;
  237 
  238         bmcr = PHY_READ(sc, MII_BMCR);
  239         if (bmcr & BMCR_ISO) {
  240                 mii->mii_media_active |= IFM_NONE;
  241                 mii->mii_media_status = 0;
  242                 return;
  243         }
  244 
  245         if (bmcr & BMCR_LOOP)
  246                 mii->mii_media_active |= IFM_LOOP;
  247 
  248         if (bmcr & BMCR_AUTOEN) {
  249                 /*
  250                  * The media status bits are only valid if autonegotiation
  251                  * has completed (or it's disabled).
  252                  */
  253                 if ((bmsr & BMSR_ACOMP) == 0) {
  254                         /* Erg, still trying, I guess... */
  255                         mii->mii_media_active |= IFM_NONE;
  256                         return;
  257                 }
  258 
  259                 switch (physup & (PHY_SUP_SPEED1|PHY_SUP_SPEED0)) {
  260                 case PHY_SUP_SPEED1:
  261                         mii->mii_media_active |= IFM_1000_T;
  262                         gtsr = PHY_READ(sc, MII_100T2SR);
  263                         if (gtsr & GTSR_MS_RES)
  264                                 mii->mii_media_active |= IFM_ETH_MASTER;
  265                         break;
  266 
  267                 case PHY_SUP_SPEED0:
  268                         mii->mii_media_active |= IFM_100_TX;
  269                         break;
  270 
  271                 case 0:
  272                         mii->mii_media_active |= IFM_10_T;
  273                         break;
  274 
  275                 default:
  276                         mii->mii_media_active |= IFM_NONE;
  277                         mii->mii_media_status = 0;
  278                 }
  279                 if (physup & PHY_SUP_DUPLEX)
  280                         mii->mii_media_active |= IFM_FDX;
  281         } else
  282                 mii->mii_media_active = ife->ifm_media;
  283 }

Cache object: c4329dedd9db000a9043bc5113e11174


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