The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/nsgphy.c

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    1 /*-
    2  * Copyright (c) 2001 Wind River Systems
    3  * Copyright (c) 2001
    4  *      Bill Paul <wpaul@bsdi.com>.  All rights reserved.
    5  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to The NetBSD Foundation
    9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   10  * NASA Ames Research Center.
   11  *
   12  * Redistribution and use in source and binary forms, with or without
   13  * modification, are permitted provided that the following conditions
   14  * are met:
   15  * 1. Redistributions of source code must retain the above copyright
   16  *    notice, this list of conditions and the following disclaimer.
   17  * 2. Redistributions in binary form must reproduce the above copyright
   18  *    notice, this list of conditions and the following disclaimer in the
   19  *    documentation and/or other materials provided with the distribution.
   20  * 3. All advertising materials mentioning features or use of this software
   21  *    must display the following acknowledgement:
   22  *      This product includes software developed by Bill Paul.
   23  * 4. Neither the name of the author nor the names of any co-contributors
   24  *    may be used to endorse or promote products derived from this software
   25  *    without specific prior written permission.
   26  *
   27  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
   28  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   29  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   30  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
   31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   37  * THE POSSIBILITY OF SUCH DAMAGE.
   38  */
   39 
   40 #include <sys/cdefs.h>
   41 __FBSDID("$FreeBSD$");
   42 
   43 /*
   44  * Driver for the National Semiconductor DP83861, DP83865 and DP83891
   45  * 10/100/1000 PHYs.
   46  * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf
   47  * and at: http://www.national.com/ds/DP/DP83865.pdf
   48  *
   49  * The DP83891 is the older NS GigE PHY which isn't being sold
   50  * anymore.  The DP83861 is its replacement, which is an 'enhanced'
   51  * firmware driven component.  The major difference between the
   52  * two is that the DP83891 can't generate interrupts, while the
   53  * 83861 can (probably it wasn't originally designed to do this, but
   54  * it can now thanks to firmware updates).  The DP83861 also allows
   55  * access to its internal RAM via indirect register access.  The
   56  * DP83865 is an ultra low power version of the DP83861 and DP83891.
   57  */
   58 
   59 #include <sys/param.h>
   60 #include <sys/systm.h>
   61 #include <sys/kernel.h>
   62 #include <sys/module.h>
   63 #include <sys/socket.h>
   64 #include <sys/bus.h>
   65 
   66 #include <net/if.h>
   67 #include <net/if_media.h>
   68 
   69 #include <dev/mii/mii.h>
   70 #include <dev/mii/miivar.h>
   71 #include "miidevs.h"
   72 
   73 #include <dev/mii/nsgphyreg.h>
   74 
   75 #include "miibus_if.h"
   76 
   77 static int nsgphy_probe(device_t);
   78 static int nsgphy_attach(device_t);
   79 
   80 static device_method_t nsgphy_methods[] = {
   81         /* device interface */
   82         DEVMETHOD(device_probe,         nsgphy_probe),
   83         DEVMETHOD(device_attach,        nsgphy_attach),
   84         DEVMETHOD(device_detach,        mii_phy_detach),
   85         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   86         DEVMETHOD_END
   87 };
   88 
   89 static devclass_t nsgphy_devclass;
   90 
   91 static driver_t nsgphy_driver = {
   92         "nsgphy",
   93         nsgphy_methods,
   94         sizeof(struct mii_softc)
   95 };
   96 
   97 DRIVER_MODULE(nsgphy, miibus, nsgphy_driver, nsgphy_devclass, 0, 0);
   98 
   99 static int      nsgphy_service(struct mii_softc *, struct mii_data *,int);
  100 static void     nsgphy_status(struct mii_softc *);
  101 
  102 static const struct mii_phydesc nsgphys[] = {
  103         MII_PHY_DESC(xxNATSEMI, DP83861),
  104         MII_PHY_DESC(xxNATSEMI, DP83865),
  105         MII_PHY_DESC(xxNATSEMI, DP83891),
  106         MII_PHY_END
  107 };
  108 
  109 static const struct mii_phy_funcs nsgphy_funcs = {
  110         nsgphy_service,
  111         nsgphy_status,
  112         mii_phy_reset
  113 };
  114 
  115 static int
  116 nsgphy_probe(device_t dev)
  117 {
  118 
  119         return (mii_phy_dev_probe(dev, nsgphys, BUS_PROBE_DEFAULT));
  120 }
  121 
  122 static int
  123 nsgphy_attach(device_t dev)
  124 {
  125         struct mii_softc *sc;
  126 
  127         sc = device_get_softc(dev);
  128 
  129         mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &nsgphy_funcs, 0);
  130 
  131         PHY_RESET(sc);
  132 
  133         /*
  134          * NB: the PHY has the 10BASE-T BMSR bits hard-wired to 0,
  135          * even though it supports 10BASE-T.
  136          */
  137         sc->mii_capabilities = (PHY_READ(sc, MII_BMSR) |
  138             BMSR_10TFDX | BMSR_10THDX) & sc->mii_capmask;
  139         /*
  140          * Note that as documented manual 1000BASE-T modes of DP83865 only
  141          * work together with other National Semiconductor PHYs.
  142          */
  143         if (sc->mii_capabilities & BMSR_EXTSTAT)
  144                 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
  145 
  146         mii_phy_add_media(sc);
  147         printf("\n");
  148 
  149         MIIBUS_MEDIAINIT(sc->mii_dev);
  150         return (0);
  151 }
  152 
  153 static int
  154 nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  155 {
  156 
  157         switch (cmd) {
  158         case MII_POLLSTAT:
  159                 break;
  160 
  161         case MII_MEDIACHG:
  162                 /*
  163                  * If the interface is not up, don't do anything.
  164                  */
  165                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  166                         break;
  167 
  168                 mii_phy_setmedia(sc);
  169                 break;
  170 
  171         case MII_TICK:
  172                 if (mii_phy_tick(sc) == EJUSTRETURN)
  173                         return (0);
  174                 break;
  175         }
  176 
  177         /* Update the media status. */
  178         PHY_STATUS(sc);
  179 
  180         /* Callback if something changed. */
  181         mii_phy_update(sc, cmd);
  182         return (0);
  183 }
  184 
  185 static void
  186 nsgphy_status(struct mii_softc *sc)
  187 {
  188         struct mii_data *mii = sc->mii_pdata;
  189         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  190         int bmsr, bmcr, physup, gtsr;
  191 
  192         mii->mii_media_status = IFM_AVALID;
  193         mii->mii_media_active = IFM_ETHER;
  194 
  195         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  196 
  197         physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
  198 
  199         if (physup & PHY_SUP_LINK)
  200                 mii->mii_media_status |= IFM_ACTIVE;
  201 
  202         bmcr = PHY_READ(sc, MII_BMCR);
  203         if (bmcr & BMCR_ISO) {
  204                 mii->mii_media_active |= IFM_NONE;
  205                 mii->mii_media_status = 0;
  206                 return;
  207         }
  208 
  209         if (bmcr & BMCR_LOOP)
  210                 mii->mii_media_active |= IFM_LOOP;
  211 
  212         if (bmcr & BMCR_AUTOEN) {
  213                 /*
  214                  * The media status bits are only valid if autonegotiation
  215                  * has completed (or it's disabled).
  216                  */
  217                 if ((bmsr & BMSR_ACOMP) == 0) {
  218                         /* Erg, still trying, I guess... */
  219                         mii->mii_media_active |= IFM_NONE;
  220                         return;
  221                 }
  222 
  223                 switch (physup & (PHY_SUP_SPEED1 | PHY_SUP_SPEED0)) {
  224                 case PHY_SUP_SPEED1:
  225                         mii->mii_media_active |= IFM_1000_T;
  226                         gtsr = PHY_READ(sc, MII_100T2SR);
  227                         if (gtsr & GTSR_MS_RES)
  228                                 mii->mii_media_active |= IFM_ETH_MASTER;
  229                         break;
  230 
  231                 case PHY_SUP_SPEED0:
  232                         mii->mii_media_active |= IFM_100_TX;
  233                         break;
  234 
  235                 case 0:
  236                         mii->mii_media_active |= IFM_10_T;
  237                         break;
  238 
  239                 default:
  240                         mii->mii_media_active |= IFM_NONE;
  241                         mii->mii_media_status = 0;
  242                         return;
  243                 }
  244 
  245                 if (physup & PHY_SUP_DUPLEX)
  246                         mii->mii_media_active |=
  247                             IFM_FDX | mii_phy_flowstatus(sc);
  248                 else
  249                         mii->mii_media_active |= IFM_HDX;
  250         } else
  251                 mii->mii_media_active = ife->ifm_media;
  252 }

Cache object: b69b6c689e1814da3840956db122287e


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