nsgphy.c

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    1 /*      $OpenBSD: nsgphy.c,v 1.26 2022/04/06 18:59:29 naddy Exp $       */
    2 /*
    3  * Copyright (c) 2001 Wind River Systems
    4  * Copyright (c) 2001
    5  *      Bill Paul <wpaul@bsdi.com>.  All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  * 3. All advertising materials mentioning features or use of this software
   16  *    must display the following acknowledgement:
   17  *      This product includes software developed by Bill Paul.
   18  * 4. Neither the name of the author nor the names of any co-contributors
   19  *    may be used to endorse or promote products derived from this software
   20  *    without specific prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
   23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   25  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
   26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   32  * THE POSSIBILITY OF SUCH DAMAGE.
   33  *
   34  */
   35 
   36 /*
   37  * Driver for the National Semiconductor DP83861, DP83865 and DP83891
   38  * 10/100/1000 PHYs.
   39  * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf
   40  * and at: http://www.national.com/ds/DP/DP83865.pdf
   41  *
   42  * The DP83891 is the older NatSemi gigE PHY which isn't being sold
   43  * anymore. The DP83861 is its replacement, which is an 'enhanced'
   44  * firmware driven component. The major difference between the
   45  * two is that the 83891 can't generate interrupts, while the
   46  * 83861 can. (I think it wasn't originally designed to do this, but
   47  * it can now thanks to firmware updates.) The 83861 also allows
   48  * access to its internal RAM via indirect register access.
   49  *
   50  * The DP83865 is a low power version of the DP83861.
   51  */
   52 
   53 #include <sys/param.h>
   54 #include <sys/systm.h>
   55 #include <sys/device.h>
   56 #include <sys/socket.h>
   57 
   58 #include <net/if.h>
   59 #include <net/if_var.h>
   60 #include <net/if_media.h>
   61 
   62 #include <dev/mii/mii.h>
   63 #include <dev/mii/miivar.h>
   64 #include <dev/mii/miidevs.h>
   65 
   66 #include <dev/mii/nsgphyreg.h>
   67 
   68 int     nsgphymatch(struct device*, void *, void *);
   69 void    nsgphyattach(struct device *, struct device *, void *);
   70 
   71 const struct cfattach nsgphy_ca = {
   72         sizeof(struct mii_softc), nsgphymatch, nsgphyattach, mii_phy_detach
   73 };
   74 
   75 struct cfdriver nsgphy_cd = {
   76         NULL, "nsgphy", DV_DULL
   77 };
   78 
   79 int     nsgphy_service(struct mii_softc *, struct mii_data *, int);
   80 void    nsgphy_status(struct mii_softc *);
   81 
   82 const struct mii_phy_funcs nsgphy_funcs = {
   83         nsgphy_service, nsgphy_status, mii_phy_reset,
   84 };
   85 
   86 static const struct mii_phydesc nsgphys[] = {
   87         { MII_OUI_NATSEMI,              MII_MODEL_NATSEMI_DP83861,
   88           MII_STR_NATSEMI_DP83861 },
   89         { MII_OUI_NATSEMI,              MII_MODEL_NATSEMI_DP83865,
   90           MII_STR_NATSEMI_DP83865 },
   91         { MII_OUI_NATSEMI,              MII_MODEL_NATSEMI_DP83891,
   92           MII_STR_NATSEMI_DP83891 },
   93 
   94         { 0,                    0,
   95           NULL },
   96 };
   97 
   98 int
   99 nsgphymatch(struct device *parent, void *match, void *aux)
  100 {
  101         struct mii_attach_args *ma = aux;
  102 
  103         if (mii_phy_match(ma, nsgphys) != NULL)
  104                 return (10);
  105 
  106         return (0);
  107 }
  108 
  109 void
  110 nsgphyattach(struct device *parent, struct device *self, void *aux)
  111 {
  112         struct mii_softc *sc = (struct mii_softc *)self;
  113         struct mii_attach_args *ma = aux;
  114         struct mii_data *mii = ma->mii_data;
  115         const struct mii_phydesc *mpd;
  116         int anar;
  117 
  118         mpd = mii_phy_match(ma, nsgphys);
  119         printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
  120 
  121         sc->mii_inst = mii->mii_instance;
  122         sc->mii_phy = ma->mii_phyno;
  123         sc->mii_funcs = &nsgphy_funcs;
  124         sc->mii_pdata = mii;
  125         sc->mii_flags = ma->mii_flags;
  126         sc->mii_anegticks = MII_ANEGTICKS;
  127 
  128         PHY_RESET(sc);
  129 
  130         sc->mii_capabilities =
  131                 PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
  132         if (sc->mii_capabilities & BMSR_EXTSTAT)
  133                 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
  134 
  135         /*
  136          * The PHY seems to have the 10baseT BMSR bits
  137          * hard-wired to 0, even though the device supports
  138          * 10baseT.  What we do instead is read the post-reset
  139          * ANAR, who's 10baseT-related bits are set by strapping
  140          * pin 180, and fake the BMSR bits.
  141          */
  142         anar = PHY_READ(sc, MII_ANAR);
  143         if (anar & ANAR_10)
  144                 sc->mii_capabilities |= (BMSR_10THDX & ma->mii_capmask);
  145         if (anar & ANAR_10_FD)
  146                 sc->mii_capabilities |= (BMSR_10TFDX & ma->mii_capmask);
  147 
  148         if ((sc->mii_capabilities & BMSR_MEDIAMASK) ||
  149             (sc->mii_extcapabilities & EXTSR_MEDIAMASK))
  150                 mii_phy_add_media(sc);
  151 }
  152 
  153 int
  154 nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  155 {
  156         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  157         int reg;
  158 
  159         if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
  160                 return (ENXIO);
  161 
  162         switch (cmd) {
  163         case MII_POLLSTAT:
  164                 /*
  165                  * If we're not polling our PHY instance, just return.
  166                  */
  167                 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
  168                         return (0);
  169                 break;
  170 
  171         case MII_MEDIACHG:
  172                 /*
  173                  * If the media indicates a different PHY instance,
  174                  * isolate ourselves.
  175                  */
  176                 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
  177                         reg = PHY_READ(sc, MII_BMCR);
  178                         PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
  179                         return (0);
  180                 }
  181 
  182                 /*
  183                  * If the interface is not up, don't do anything.
  184                  */
  185                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  186                         break;
  187 
  188                 mii_phy_setmedia(sc);
  189                 break;
  190 
  191         case MII_TICK:
  192                 /*
  193                  * If we're not currently selected, just return.
  194                  */
  195                 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
  196                         return (0);
  197 
  198                 if (mii_phy_tick(sc) == EJUSTRETURN)
  199                         return (0);
  200                 break;
  201         case MII_DOWN:
  202                 mii_phy_down(sc);
  203                 return (0);
  204         }
  205 
  206         /* Update the media status. */
  207         mii_phy_status(sc);
  208 
  209         /* Callback if something changed. */
  210         mii_phy_update(sc, cmd);
  211         return (0);
  212 }
  213 
  214 void
  215 nsgphy_status(struct mii_softc *sc)
  216 {
  217         struct mii_data *mii = sc->mii_pdata;
  218         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  219         int bmsr, bmcr, physup, gtsr;
  220 
  221         mii->mii_media_status = IFM_AVALID;
  222         mii->mii_media_active = IFM_ETHER;
  223 
  224         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  225 
  226         physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
  227 
  228         if (physup & PHY_SUP_LINK)
  229                 mii->mii_media_status |= IFM_ACTIVE;
  230 
  231         bmcr = PHY_READ(sc, MII_BMCR);
  232         if (bmcr & BMCR_ISO) {
  233                 mii->mii_media_active |= IFM_NONE;
  234                 mii->mii_media_status = 0;
  235                 return;
  236         }
  237 
  238         if (bmcr & BMCR_LOOP)
  239                 mii->mii_media_active |= IFM_LOOP;
  240 
  241         if (bmcr & BMCR_AUTOEN) {
  242                 if ((bmsr & BMSR_ACOMP) == 0) {
  243                         /* Erg, still trying, I guess... */
  244                         mii->mii_media_active |= IFM_NONE;
  245                         return;
  246                 }
  247 
  248                 switch (physup & (PHY_SUP_SPEED1|PHY_SUP_SPEED0)) {
  249                 case PHY_SUP_SPEED1:
  250                         mii->mii_media_active |= IFM_1000_T;
  251                         gtsr = PHY_READ(sc, MII_100T2SR);
  252                         if (gtsr & GTSR_MS_RES)
  253                                 mii->mii_media_active |= IFM_ETH_MASTER;
  254                         break;
  255 
  256                 case PHY_SUP_SPEED0:
  257                         mii->mii_media_active |= IFM_100_TX;
  258                         break;
  259 
  260                 case 0:
  261                         mii->mii_media_active |= IFM_10_T;
  262                         break;
  263 
  264                 default:
  265                         mii->mii_media_active |= IFM_NONE;
  266                         mii->mii_media_status = 0;
  267                         return;
  268                 }
  269 
  270                 if (physup & PHY_SUP_DUPLEX)
  271                         mii->mii_media_active |= mii_phy_flowstatus(sc) | IFM_FDX;
  272                 else
  273                         mii->mii_media_active |= IFM_HDX;
  274         } else
  275                 mii->mii_media_active = ife->ifm_media;
  276 }
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FreeBSD/Linux Kernel Cross Reference sys/dev/mii/nsgphy.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/nsgphy.c
