Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/nsphy.c
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1 /* $NetBSD: nsphy.c,v 1.18 1999/07/14 23:57:36 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57 #include <sys/cdefs.h> 58 __FBSDID("$FreeBSD: releng/8.2/sys/dev/mii/nsphy.c 214909 2010-11-07 11:12:29Z marius $"); 59 60 /* 61 * driver for National Semiconductor's DP83840A ethernet 10/100 PHY 62 * Data Sheet available from www.national.com 63 */ 64 65 #include <sys/param.h> 66 #include <sys/systm.h> 67 #include <sys/kernel.h> 68 #include <sys/socket.h> 69 #include <sys/errno.h> 70 #include <sys/module.h> 71 #include <sys/bus.h> 72 73 #include <net/if.h> 74 #include <net/if_media.h> 75 76 #include <dev/mii/mii.h> 77 #include <dev/mii/miivar.h> 78 #include "miidevs.h" 79 80 #include <dev/mii/nsphyreg.h> 81 82 #include "miibus_if.h" 83 84 static int nsphy_probe(device_t); 85 static int nsphy_attach(device_t); 86 87 static device_method_t nsphy_methods[] = { 88 /* device interface */ 89 DEVMETHOD(device_probe, nsphy_probe), 90 DEVMETHOD(device_attach, nsphy_attach), 91 DEVMETHOD(device_detach, mii_phy_detach), 92 DEVMETHOD(device_shutdown, bus_generic_shutdown), 93 { 0, 0 } 94 }; 95 96 static devclass_t nsphy_devclass; 97 98 static driver_t nsphy_driver = { 99 "nsphy", 100 nsphy_methods, 101 sizeof(struct mii_softc) 102 }; 103 104 DRIVER_MODULE(nsphy, miibus, nsphy_driver, nsphy_devclass, 0, 0); 105 106 static int nsphy_service(struct mii_softc *, struct mii_data *, int); 107 static void nsphy_status(struct mii_softc *); 108 static void nsphy_reset(struct mii_softc *); 109 110 static const struct mii_phydesc nsphys[] = { 111 MII_PHY_DESC(NATSEMI, DP83840), 112 MII_PHY_END 113 }; 114 115 static int 116 nsphy_probe(device_t dev) 117 { 118 119 return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT)); 120 } 121 122 static int 123 nsphy_attach(device_t dev) 124 { 125 struct mii_softc *sc; 126 struct mii_attach_args *ma; 127 struct mii_data *mii; 128 const char *nic; 129 130 sc = device_get_softc(dev); 131 ma = device_get_ivars(dev); 132 sc->mii_dev = device_get_parent(dev); 133 mii = ma->mii_data; 134 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 135 136 sc->mii_flags = miibus_get_flags(dev); 137 sc->mii_inst = mii->mii_instance++; 138 sc->mii_phy = ma->mii_phyno; 139 sc->mii_service = nsphy_service; 140 sc->mii_pdata = mii; 141 142 nic = device_get_name(device_get_parent(sc->mii_dev)); 143 /* 144 * Am79C971 wedge when isolating all of their external PHYs. 145 */ 146 if (strcmp(nic, "pcn") == 0) 147 sc->mii_flags |= MIIF_NOISOLATE; 148 149 #if 1 150 151 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 152 153 /* 154 * XXX IFM_LOOP should be handled by mii_phy_add_media() based 155 * on MIIF_NOLOOP. 156 */ 157 if ((sc->mii_flags & MIIF_NOLOOP) == 0) 158 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, 159 sc->mii_inst), MII_MEDIA_100_TX); 160 161 #endif 162 163 nsphy_reset(sc); 164 165 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 166 device_printf(dev, " "); 167 mii_phy_add_media(sc); 168 printf("\n"); 169 170 MIIBUS_MEDIAINIT(sc->mii_dev); 171 return (0); 172 } 173 174 static int 175 nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 176 { 177 int reg; 178 179 switch (cmd) { 180 case MII_POLLSTAT: 181 break; 182 183 case MII_MEDIACHG: 184 /* 185 * If the interface is not up, don't do anything. 186 */ 187 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 188 break; 189 190 reg = PHY_READ(sc, MII_NSPHY_PCR); 191 192 /* 193 * Set up the PCR to use LED4 to indicate full-duplex 194 * in both 10baseT and 100baseTX modes. 195 */ 196 reg |= PCR_LED4MODE; 197 198 /* 199 * Make sure Carrier Integrity Monitor function is 200 * disabled (normal for Node operation, but sometimes 201 * it's not set?!) 202 */ 203 reg |= PCR_CIMDIS; 204 205 /* 206 * Make sure "force link good" is set to normal mode. 207 * It's only intended for debugging. 208 */ 209 reg |= PCR_FLINK100; 210 211 /* 212 * Mystery bits which are supposedly `reserved', 213 * but we seem to need to set them when the PHY 214 * is connected to some interfaces: 215 * 216 * 0x0400 is needed for fxp 217 * (Intel EtherExpress Pro 10+/100B, 82557 chip) 218 * (nsphy with a DP83840 chip) 219 * 0x0100 may be needed for some other card 220 */ 221 reg |= 0x0100 | 0x0400; 222 223 if (strcmp(mii->mii_ifp->if_dname, "fxp") == 0) 224 PHY_WRITE(sc, MII_NSPHY_PCR, reg); 225 226 mii_phy_setmedia(sc); 227 break; 228 229 case MII_TICK: 230 if (mii_phy_tick(sc) == EJUSTRETURN) 231 return (0); 232 break; 233 } 234 235 /* Update the media status. */ 236 nsphy_status(sc); 237 238 /* Callback if something changed. */ 239 mii_phy_update(sc, cmd); 240 return (0); 241 } 242 243 static void 244 nsphy_status(struct mii_softc *sc) 245 { 246 struct mii_data *mii = sc->mii_pdata; 247 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 248 int bmsr, bmcr, par, anlpar; 249 250 mii->mii_media_status = IFM_AVALID; 251 mii->mii_media_active = IFM_ETHER; 252 253 bmsr = PHY_READ(sc, MII_BMSR) | 254 PHY_READ(sc, MII_BMSR); 255 if (bmsr & BMSR_LINK) 256 mii->mii_media_status |= IFM_ACTIVE; 257 258 bmcr = PHY_READ(sc, MII_BMCR); 259 if (bmcr & BMCR_ISO) { 260 mii->mii_media_active |= IFM_NONE; 261 mii->mii_media_status = 0; 262 return; 263 } 264 265 if (bmcr & BMCR_LOOP) 266 mii->mii_media_active |= IFM_LOOP; 267 268 if (bmcr & BMCR_AUTOEN) { 269 /* 270 * The PAR status bits are only valid if autonegotiation 271 * has completed (or it's disabled). 272 */ 273 if ((bmsr & BMSR_ACOMP) == 0) { 274 /* Erg, still trying, I guess... */ 275 mii->mii_media_active |= IFM_NONE; 276 return; 277 } 278 279 /* 280 * Argh. The PAR doesn't seem to indicate duplex mode 281 * properly! Determine media based on link partner's 282 * advertised capabilities. 283 */ 284 if (PHY_READ(sc, MII_ANER) & ANER_LPAN) { 285 anlpar = PHY_READ(sc, MII_ANAR) & 286 PHY_READ(sc, MII_ANLPAR); 287 if (anlpar & ANLPAR_TX_FD) 288 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 289 else if (anlpar & ANLPAR_T4) 290 mii->mii_media_active |= IFM_100_T4|IFM_HDX; 291 else if (anlpar & ANLPAR_TX) 292 mii->mii_media_active |= IFM_100_TX|IFM_HDX; 293 else if (anlpar & ANLPAR_10_FD) 294 mii->mii_media_active |= IFM_10_T|IFM_FDX; 295 else if (anlpar & ANLPAR_10) 296 mii->mii_media_active |= IFM_10_T|IFM_HDX; 297 else 298 mii->mii_media_active |= IFM_NONE; 299 return; 300 } 301 302 /* 303 * Link partner is not capable of autonegotiation. 304 * We will never be in full-duplex mode if this is 305 * the case, so reading the PAR is OK. 306 */ 307 par = PHY_READ(sc, MII_NSPHY_PAR); 308 if (par & PAR_10) 309 mii->mii_media_active |= IFM_10_T; 310 else 311 mii->mii_media_active |= IFM_100_TX; 312 mii->mii_media_active |= IFM_HDX; 313 } else 314 mii->mii_media_active = ife->ifm_media; 315 } 316 317 static void 318 nsphy_reset(struct mii_softc *sc) 319 { 320 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur; 321 int reg, i; 322 323 if (sc->mii_flags & MIIF_NOISOLATE) 324 reg = BMCR_RESET; 325 else 326 reg = BMCR_RESET | BMCR_ISO; 327 PHY_WRITE(sc, MII_BMCR, reg); 328 329 /* 330 * It is best to allow a little time for the reset to settle 331 * in before we start polling the BMCR again. Notably, the 332 * DP83840A manuals state that there should be a 500us delay 333 * between asserting software reset and attempting MII serial 334 * operations. Be conservative. 335 */ 336 DELAY(1000); 337 338 /* 339 * Wait another 2s for it to complete. 340 * This is only a little overkill as under normal circumstances 341 * the PHY can take up to 1s to complete reset. 342 * This is also a bit odd because after a reset, the BMCR will 343 * clear the reset bit and simply reports 0 even though the reset 344 * is not yet complete. 345 */ 346 for (i = 0; i < 1000; i++) { 347 reg = PHY_READ(sc, MII_BMCR); 348 if (reg != 0 && (reg & BMCR_RESET) == 0) 349 break; 350 DELAY(2000); 351 } 352 353 if ((sc->mii_flags & MIIF_NOISOLATE) == 0) { 354 if ((ife == NULL && sc->mii_inst != 0) || 355 (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst)) 356 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 357 } 358 }
Cache object: cbeff298ae8fe6247a3be7b695df3e42
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