The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/rgephyreg.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-4-Clause
    3  *
    4  * Copyright (c) 2003
    5  *      Bill Paul <wpaul@windriver.com>.  All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  * 3. All advertising materials mentioning features or use of this software
   16  *    must display the following acknowledgement:
   17  *      This product includes software developed by Bill Paul.
   18  * 4. Neither the name of the author nor the names of any co-contributors
   19  *    may be used to endorse or promote products derived from this software
   20  *    without specific prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
   23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   25  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
   26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   32  * THE POSSIBILITY OF SUCH DAMAGE.
   33  *
   34  * $FreeBSD$
   35  */
   36 
   37 #ifndef _DEV_MII_RGEPHYREG_H_
   38 #define _DEV_MII_RGEPHYREG_H_
   39 
   40 #define RGEPHY_8211B            2
   41 #define RGEPHY_8211C            3
   42 #define RGEPHY_8211F            6
   43 
   44 /*
   45  * RealTek 8169S/8110S gigE PHY registers
   46  */
   47 
   48 #define RGEPHY_MII_BMCR         0x00
   49 #define RGEPHY_BMCR_RESET       0x8000
   50 #define RGEPHY_BMCR_LOOP        0x4000
   51 #define RGEPHY_BMCR_SPD0        0x2000  /* speed select, lower bit */
   52 #define RGEPHY_BMCR_AUTOEN      0x1000  /* Autoneg enabled */
   53 #define RGEPHY_BMCR_PDOWN       0x0800  /* Power down */
   54 #define RGEPHY_BMCR_ISO         0x0400  /* Isolate */
   55 #define RGEPHY_BMCR_STARTNEG    0x0200  /* Restart autoneg */
   56 #define RGEPHY_BMCR_FDX         0x0100  /* Duplex mode */
   57 #define RGEPHY_BMCR_CTEST       0x0080  /* Collision test enable */
   58 #define RGEPHY_BMCR_SPD1        0x0040  /* Speed select, upper bit */
   59 
   60 #define RGEPHY_S1000            RGEPHY_BMCR_SPD1        /* 1000mbps */
   61 #define RGEPHY_S100             RGEPHY_BMCR_SPD0        /* 100mpbs */
   62 #define RGEPHY_S10              0                       /* 10mbps */
   63 
   64 #define RGEPHY_MII_BMSR         0x01
   65 #define RGEPHY_BMSR_100T4       0x8000  /* 100 base T4 capable */
   66 #define RGEPHY_BMSR_100TXFDX    0x4000  /* 100 base Tx full duplex capable */
   67 #define RGEPHY_BMSR_100TXHDX    0x2000  /* 100 base Tx half duplex capable */
   68 #define RGEPHY_BMSR_10TFDX      0x1000  /* 10 base T full duplex capable */
   69 #define RGEPHY_BMSR_10THDX      0x0800  /* 10 base T half duplex capable */
   70 #define RGEPHY_BMSR_100T2FDX    0x0400  /* 100 base T2 full duplex capable */
   71 #define RGEPHY_BMSR_100T2HDX    0x0200  /* 100 base T2 half duplex capable */
   72 #define RGEPHY_BMSR_EXTSTS      0x0100  /* Extended status present */
   73 #define RGEPHY_BMSR_PRESUB      0x0040  /* Preamble surpression */
   74 #define RGEPHY_BMSR_ACOMP       0x0020  /* Autoneg complete */
   75 #define RGEPHY_BMSR_RFAULT      0x0010  /* Remote fault condition occurred */
   76 #define RGEPHY_BMSR_ANEG        0x0008  /* Autoneg capable */
   77 #define RGEPHY_BMSR_LINK        0x0004  /* Link status */
   78 #define RGEPHY_BMSR_JABBER      0x0002  /* Jabber detected */
   79 #define RGEPHY_BMSR_EXT         0x0001  /* Extended capability */
   80 
   81 #define RGEPHY_MII_ANAR         0x04
   82 #define RGEPHY_ANAR_NP          0x8000  /* Next page */
   83 #define RGEPHY_ANAR_RF          0x2000  /* Remote fault */
   84 #define RGEPHY_ANAR_ASP         0x0800  /* Asymmetric Pause */
   85 #define RGEPHY_ANAR_PC          0x0400  /* Pause capable */
   86 #define RGEPHY_ANAR_T4          0x0200  /* local device supports 100bT4 */
   87 #define RGEPHY_ANAR_TX_FD       0x0100  /* local device supports 100bTx FD */
   88 #define RGEPHY_ANAR_TX          0x0080  /* local device supports 100bTx */
   89 #define RGEPHY_ANAR_10_FD       0x0040  /* local device supports 10bT FD */
   90 #define RGEPHY_ANAR_10          0x0020  /* local device supports 10bT */
   91 #define RGEPHY_ANAR_SEL         0x001F  /* selector field, 00001=Ethernet */
   92 
   93 #define RGEPHY_MII_ANLPAR       0x05
   94 #define RGEPHY_ANLPAR_NP        0x8000  /* Next page */
   95 #define RGEPHY_ANLPAR_RF        0x2000  /* Remote fault */
   96 #define RGEPHY_ANLPAR_ASP       0x0800  /* Asymmetric Pause */
   97 #define RGEPHY_ANLPAR_PC        0x0400  /* Pause capable */
   98 #define RGEPHY_ANLPAR_T4        0x0200  /* link partner supports 100bT4 */
   99 #define RGEPHY_ANLPAR_TX_FD     0x0100  /* link partner supports 100bTx FD */
  100 #define RGEPHY_ANLPAR_TX        0x0080  /* link partner supports 100bTx */
  101 #define RGEPHY_ANLPAR_10_FD     0x0040  /* link partner supports 10bT FD */
  102 #define RGEPHY_ANLPAR_10        0x0020  /* link partner supports 10bT */
  103 #define RGEPHY_ANLPAR_SEL       0x001F  /* selector field, 00001=Ethernet */
  104 
  105 #define RGEPHY_SEL_TYPE         0x0001  /* ethernet */
  106 
  107 #define RGEPHY_MII_ANER         0x06
  108 #define RGEPHY_ANER_PDF         0x0010  /* Parallel detection fault */
  109 #define RGEPHY_ANER_LPNP        0x0008  /* Link partner can next page */
  110 #define RGEPHY_ANER_NP          0x0004  /* Local PHY can next page */
  111 #define RGEPHY_ANER_RX          0x0002  /* Next page received */
  112 #define RGEPHY_ANER_LPAN        0x0001  /* Link partner autoneg capable */
  113 
  114 #define RGEPHY_MII_NEXTP        0x07    /* Next page */
  115 
  116 #define RGEPHY_MII_NEXTP_LP     0x08    /* Next page of link partner */
  117 
  118 #define RGEPHY_MII_1000CTL      0x09    /* 1000baseT control */
  119 #define RGEPHY_1000CTL_TST      0xE000  /* test modes */
  120 #define RGEPHY_1000CTL_MSE      0x1000  /* Master/Slave manual enable */
  121 #define RGEPHY_1000CTL_MSC      0x0800  /* Master/Slave select */
  122 #define RGEPHY_1000CTL_RD       0x0400  /* Repeater/DTE */
  123 #define RGEPHY_1000CTL_AFD      0x0200  /* Advertise full duplex */
  124 #define RGEPHY_1000CTL_AHD      0x0100  /* Advertise half duplex */
  125 
  126 #define RGEPHY_TEST_TX_JITTER                   0x2000
  127 #define RGEPHY_TEST_TX_JITTER_MASTER_MODE       0x4000
  128 #define RGEPHY_TEST_TX_JITTER_SLAVE_MODE        0x6000
  129 #define RGEPHY_TEST_TX_DISTORTION               0x8000
  130 
  131 #define RGEPHY_MII_1000STS      0x0A    /* 1000baseT status */
  132 #define RGEPHY_1000STS_MSF      0x8000  /* Master/slave fault */
  133 #define RGEPHY_1000STS_MSR      0x4000  /* Master/slave result */
  134 #define RGEPHY_1000STS_LRS      0x2000  /* Local receiver status */
  135 #define RGEPHY_1000STS_RRS      0x1000  /* Remote receiver status */
  136 #define RGEPHY_1000STS_LPFD     0x0800  /* Link partner can FD */
  137 #define RGEPHY_1000STS_LPHD     0x0400  /* Link partner can HD */
  138 #define RGEPHY_1000STS_IEC      0x00FF  /* Idle error count */
  139 
  140 #define RGEPHY_MII_EXTSTS       0x0F    /* Extended status */
  141 #define RGEPHY_EXTSTS_X_FD_CAP  0x8000  /* 1000base-X FD capable */
  142 #define RGEPHY_EXTSTS_X_HD_CAP  0x4000  /* 1000base-X HD capable */
  143 #define RGEPHY_EXTSTS_T_FD_CAP  0x2000  /* 1000base-T FD capable */
  144 #define RGEPHY_EXTSTS_T_HD_CAP  0x1000  /* 1000base-T HD capable */
  145 
  146 /* RTL8211B(L)/RTL8211C(L) */
  147 #define RGEPHY_MII_PCR          0x10    /* PHY Specific control register */
  148 #define RGEPHY_PCR_ASSERT_CRS   0x0800
  149 #define RGEPHY_PCR_FORCE_LINK   0x0400
  150 #define RGEPHY_PCR_MDI_MASK     0x0060
  151 #define RGEPHY_PCR_MDIX_AUTO    0x0040
  152 #define RGEPHY_PCR_MDIX_MANUAL  0x0020
  153 #define RGEPHY_PCR_MDI_MANUAL   0x0000
  154 #define RGEPHY_PCR_CLK125_DIS   0x0010
  155 #define RGEPHY_PCR_JABBER_DIS   0x0001
  156 
  157 /* RTL8211B(L)/RTL8211C(L) */
  158 #define RGEPHY_MII_SSR          0x11    /* PHY Specific status register */
  159 #define RGEPHY_SSR_S1000        0x8000  /* 1000Mbps */
  160 #define RGEPHY_SSR_S100         0x4000  /* 100Mbps */
  161 #define RGEPHY_SSR_S10          0x0000  /* 10Mbps */
  162 #define RGEPHY_SSR_SPD_MASK     0xc000
  163 #define RGEPHY_SSR_FDX          0x2000  /* full duplex */
  164 #define RGEPHY_SSR_PAGE_RECEIVED        0x1000  /* new page received */
  165 #define RGEPHY_SSR_SPD_DPLX_RESOLVED    0x0800  /* speed/duplex resolved */
  166 #define RGEPHY_SSR_LINK         0x0400  /* link up */
  167 #define RGEPHY_SSR_MDI_XOVER    0x0040  /* MDI crossover */
  168 #define RGEPHY_SSR_ALDPS        0x0008  /* RTL8211C(L) only */
  169 #define RGEPHY_SSR_JABBER       0x0001  /* Jabber */
  170 
  171 /* RTL8211F */
  172 #define RGEPHY_F_MII_PCR1       0x18    /* PHY Specific control register 1 */
  173 #define RGEPHY_F_PCR1_MDI_MM    0x0200  /* MDI / MDIX Manual Mode */
  174 #define RGEPHY_F_PCR1_MDI_MODE  0x0100  /* MDI Mode (0=MDIX,1=MDI) */
  175 #define RGEPHY_F_PCR1_ALDPS_EN  0x0004  /* Link Down Power Saving Enable */
  176 
  177 /* RTL8211F */
  178 #define RGEPHY_F_MII_SSR        0x1A    /* PHY Specific status register */
  179 #define RGEPHY_F_SSR_S1000      0x0020  /* 1000Mbps */
  180 #define RGEPHY_F_SSR_S100       0x0010  /* 100Mbps */
  181 #define RGEPHY_F_SSR_S10        0x0000  /* 10Mbps */
  182 #define RGEPHY_F_SSR_SPD_MASK   0x0030
  183 #define RGEPHY_F_SSR_FDX        0x0008  /* full duplex */
  184 #define RGEPHY_F_SSR_LINK       0x0004  /* link up */
  185 #define RGEPHY_F_SSR_MDI        0x0002  /* MDI/MDIX */
  186 #define RGEPHY_F_SSR_JABBER     0x0001  /* Jabber */
  187 
  188 /* RTL8211F */
  189 #define RGEPHY_F_EPAGSR         0x1F    /* Extension page select register */
  190 
  191 /* RTL8211F */
  192 #define RGEPHY_F_MMD_DEV_7      0x07
  193 
  194 /* RTL8211F MMD device 7 */
  195 #define RGEPHY_F_MMD_EEEAR      0x3C    /* EEE advertisement */
  196 #define EEEAR_1000T             0x0004  /* adv. 1000baseT EEE */
  197 #define EEEAR_100TX             0x0002  /* adv. 100baseTX EEE */
  198 
  199 /* RTL8211F MMD device 7 */
  200 #define RGEPHY_F_MMD_EEELPAR    0x3D    /* EEE link partner abilities */
  201 #define EEELPAR_1000T           0x0004  /* link partner 1000baseT EEE capable */
  202 #define EEELPAR_100TX           0x0002  /* link partner 100baseTX EEE capable */
  203 
  204 /* RTL8153 */
  205 #define URE_GMEDIASTAT          0xe908  /* media status register */
  206 
  207 #endif /* _DEV_RGEPHY_MIIREG_H_ */

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