The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/smcphy.c

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    1 /*-
    2  * Copyright (c) 2006 Benno Rice.  All rights reserved.
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   14  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   15  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   16  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   17  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   18  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   19  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   20  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   21  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   22  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   23  */
   24 
   25 #include <sys/cdefs.h>
   26 __FBSDID("$FreeBSD$");
   27 
   28 /*
   29  * Driver for the SEEQ 80220 and 84220.
   30  * (Originally developed for the internal PHY on the SMSC LAN91C111.)
   31  */
   32 
   33 #include <sys/param.h>
   34 #include <sys/systm.h>
   35 #include <sys/kernel.h>
   36 #include <sys/socket.h>
   37 #include <sys/errno.h>
   38 #include <sys/module.h>
   39 #include <sys/bus.h>
   40 #include <sys/malloc.h>
   41 
   42 #include <machine/bus.h>
   43 
   44 #include <net/if.h>
   45 #include <net/if_media.h>
   46 
   47 #include <dev/mii/mii.h>
   48 #include <dev/mii/miivar.h>
   49 #include "miidevs.h"
   50 
   51 #include "miibus_if.h"
   52 
   53 static int      smcphy_probe(device_t);
   54 static int      smcphy_attach(device_t);
   55 
   56 static int      smcphy_service(struct mii_softc *, struct mii_data *, int);
   57 static void     smcphy_reset(struct mii_softc *);
   58 static void     smcphy_auto(struct mii_softc *, int);
   59 static void     smcphy_status(struct mii_softc *);
   60 
   61 static device_method_t smcphy_methods[] = {
   62         /* device interface */
   63         DEVMETHOD(device_probe,         smcphy_probe),
   64         DEVMETHOD(device_attach,        smcphy_attach),
   65         DEVMETHOD(device_detach,        mii_phy_detach),
   66         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   67         DEVMETHOD_END
   68 };
   69 
   70 static devclass_t smcphy_devclass;
   71 
   72 static driver_t smcphy_driver = {
   73         "smcphy",
   74         smcphy_methods,
   75         sizeof(struct mii_softc)
   76 };
   77 
   78 DRIVER_MODULE(smcphy, miibus, smcphy_driver, smcphy_devclass, 0, 0);
   79 
   80 static const struct mii_phydesc smcphys[] = {
   81         MII_PHY_DESC(SEEQ, 80220),
   82         MII_PHY_DESC(SEEQ, 84220),
   83         MII_PHY_END
   84 };
   85 
   86 static const struct mii_phy_funcs smcphy80220_funcs = {
   87         smcphy_service,
   88         smcphy_status,
   89         mii_phy_reset
   90 };
   91 
   92 static const struct mii_phy_funcs smcphy_funcs = {
   93         smcphy_service,
   94         smcphy_status,
   95         smcphy_reset
   96 };
   97 
   98 static int
   99 smcphy_probe(device_t dev)
  100 {
  101 
  102         return (mii_phy_dev_probe(dev, smcphys, BUS_PROBE_DEFAULT));
  103 }
  104 
  105 static int
  106 smcphy_attach(device_t dev)
  107 {
  108         struct mii_softc *sc;
  109         struct mii_attach_args *ma;
  110         const struct mii_phy_funcs *mpf;
  111 
  112         sc = device_get_softc(dev);
  113         ma = device_get_ivars(dev);
  114         if (MII_MODEL(ma->mii_id2) == MII_MODEL_SEEQ_80220)
  115                 mpf = &smcphy80220_funcs;
  116         else
  117                 mpf = &smcphy_funcs;
  118         mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE, mpf, 1);
  119         mii_phy_setmedia(sc);
  120 
  121         return (0);
  122 }
  123 
  124 static int
  125 smcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  126 {
  127         struct  ifmedia_entry *ife;
  128         int     reg;
  129 
  130         ife = mii->mii_media.ifm_cur;
  131 
  132         switch (cmd) {
  133         case MII_POLLSTAT:
  134                 break;
  135 
  136         case MII_MEDIACHG:
  137                 /*
  138                  * If the interface is not up, don't do anything.
  139                  */
  140                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  141                         break;
  142 
  143                 switch (IFM_SUBTYPE(ife->ifm_media)) {
  144                 case IFM_AUTO:
  145                         smcphy_auto(sc, ife->ifm_media);
  146                         break;
  147 
  148                 default:
  149                         mii_phy_setmedia(sc);
  150                         break;
  151                 }
  152 
  153                 break;
  154 
  155         case MII_TICK:
  156                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) {
  157                         return (0);
  158                 }
  159 
  160                 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
  161                         break;
  162                 }
  163 
  164                 /* I have no idea why BMCR_ISO gets set. */
  165                 reg = PHY_READ(sc, MII_BMCR);
  166                 if (reg & BMCR_ISO) {
  167                         PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO);
  168                 }
  169 
  170                 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  171                 if (reg & BMSR_LINK) {
  172                         sc->mii_ticks = 0;
  173                         break;
  174                 }
  175 
  176                 if (++sc->mii_ticks <= MII_ANEGTICKS) {
  177                         break;
  178                 }
  179 
  180                 sc->mii_ticks = 0;
  181                 PHY_RESET(sc);
  182                 smcphy_auto(sc, ife->ifm_media);
  183                 break;
  184         }
  185 
  186         /* Update the media status. */
  187         PHY_STATUS(sc);
  188 
  189         /* Callback if something changed. */
  190         mii_phy_update(sc, cmd);
  191         return (0);
  192 }
  193 
  194 static void
  195 smcphy_reset(struct mii_softc *sc)
  196 {
  197         u_int   bmcr;
  198         int     timeout;
  199 
  200         PHY_WRITE(sc, MII_BMCR, BMCR_RESET);
  201 
  202         for (timeout = 2; timeout > 0; timeout--) {
  203                 DELAY(50000);
  204                 bmcr = PHY_READ(sc, MII_BMCR);
  205                 if ((bmcr & BMCR_RESET) == 0)
  206                         break;
  207         }
  208 
  209         if (bmcr & BMCR_RESET)
  210                 device_printf(sc->mii_dev, "reset failed\n");
  211 
  212         PHY_WRITE(sc, MII_BMCR, 0x3000);
  213 
  214         /* Mask interrupts, we poll instead. */
  215         PHY_WRITE(sc, 0x1e, 0xffc0);
  216 }
  217 
  218 static void
  219 smcphy_auto(struct mii_softc *sc, int media)
  220 {
  221         uint16_t        anar;
  222 
  223         anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
  224         if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
  225                 anar |= ANAR_FC;
  226         PHY_WRITE(sc, MII_ANAR, anar);
  227         /* Apparently this helps. */
  228         anar = PHY_READ(sc, MII_ANAR);
  229         PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
  230 }
  231 
  232 static void
  233 smcphy_status(struct mii_softc *sc)
  234 {
  235         struct mii_data *mii;
  236         uint32_t bmcr, bmsr, status;
  237 
  238         mii = sc->mii_pdata;
  239         mii->mii_media_status = IFM_AVALID;
  240         mii->mii_media_active = IFM_ETHER;
  241 
  242         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  243         if ((bmsr & BMSR_LINK) != 0)
  244                 mii->mii_media_status |= IFM_ACTIVE;
  245 
  246         bmcr = PHY_READ(sc, MII_BMCR);
  247         if ((bmcr & BMCR_ISO) != 0) {
  248                 mii->mii_media_active |= IFM_NONE;
  249                 mii->mii_media_status = 0;
  250                 return;
  251         }
  252 
  253         if ((bmcr & BMCR_LOOP) != 0)
  254                 mii->mii_media_active |= IFM_LOOP;
  255 
  256         if ((bmcr & BMCR_AUTOEN) != 0) {
  257                 if ((bmsr & BMSR_ACOMP) == 0) {
  258                         /* Erg, still trying, I guess... */
  259                         mii->mii_media_active |= IFM_NONE;
  260                         return;
  261                 }
  262         }
  263 
  264         status = PHY_READ(sc, 0x12);
  265         if (status & 0x0080)
  266                 mii->mii_media_active |= IFM_100_TX;
  267         else
  268                 mii->mii_media_active |= IFM_10_T;
  269         if (status & 0x0040)
  270                 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
  271         else
  272                 mii->mii_media_active |= IFM_HDX;
  273 }

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