smcphy.c

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    1 /*-
    2  * Copyright (c) 2006 Benno Rice.  All rights reserved.
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   14  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   15  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   16  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   17  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   18  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   19  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   20  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   21  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   22  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   23  */
   24 
   25 #include <sys/cdefs.h>
   26 __FBSDID("$FreeBSD: releng/8.2/sys/dev/mii/smcphy.c 215881 2010-11-26 20:37:19Z marius $");
   27 
   28 /*
   29  * Driver for the internal PHY on the SMSC LAN91C111.
   30  */
   31 
   32 #include <sys/param.h>
   33 #include <sys/systm.h>
   34 #include <sys/kernel.h>
   35 #include <sys/socket.h>
   36 #include <sys/errno.h>
   37 #include <sys/module.h>
   38 #include <sys/bus.h>
   39 #include <sys/malloc.h>
   40 
   41 #include <machine/bus.h>
   42 
   43 #include <net/if.h>
   44 #include <net/if_media.h>
   45 
   46 #include <dev/mii/mii.h>
   47 #include <dev/mii/miivar.h>
   48 #include "miidevs.h"
   49 
   50 #include "miibus_if.h"
   51 
   52 static int      smcphy_probe(device_t);
   53 static int      smcphy_attach(device_t);
   54 
   55 static int      smcphy_service(struct mii_softc *, struct mii_data *, int);
   56 static int      smcphy_reset(struct mii_softc *);
   57 static void     smcphy_auto(struct mii_softc *, int);
   58 
   59 static device_method_t smcphy_methods[] = {
   60         /* device interface */
   61         DEVMETHOD(device_probe,         smcphy_probe),
   62         DEVMETHOD(device_attach,        smcphy_attach),
   63         DEVMETHOD(device_detach,        mii_phy_detach),
   64         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   65 
   66         { 0, 0 }
   67 };
   68 
   69 static devclass_t smcphy_devclass;
   70 
   71 static driver_t smcphy_driver = {
   72         "smcphy",
   73         smcphy_methods,
   74         sizeof(struct mii_softc)
   75 };
   76 
   77 DRIVER_MODULE(smcphy, miibus, smcphy_driver, smcphy_devclass, 0, 0);
   78 
   79 static const struct mii_phydesc smcphys[] = {
   80         MII_PHY_DESC(SMSC, LAN83C183),
   81         MII_PHY_END
   82 };
   83 
   84 static int
   85 smcphy_probe(device_t dev)
   86 {
   87 
   88         return (mii_phy_dev_probe(dev, smcphys, BUS_PROBE_DEFAULT));
   89 }
   90 
   91 static int
   92 smcphy_attach(device_t dev)
   93 {
   94         struct  mii_softc *sc;
   95         struct  mii_attach_args *ma;
   96         struct  mii_data *mii;
   97 
   98         sc = device_get_softc(dev);
   99         ma = device_get_ivars(dev);
  100         sc->mii_dev = device_get_parent(dev);
  101         mii = ma->mii_data;
  102         LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
  103 
  104         sc->mii_flags = miibus_get_flags(dev);
  105         sc->mii_inst = mii->mii_instance++;
  106         sc->mii_phy = ma->mii_phyno;
  107         sc->mii_service = smcphy_service;
  108         sc->mii_pdata = mii;
  109 
  110         sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOLOOP;
  111 
  112         if (smcphy_reset(sc) != 0) {
  113                 device_printf(dev, "reset failed\n");
  114         }
  115 
  116         /* Mask interrupts, we poll instead. */
  117         PHY_WRITE(sc, 0x1e, 0xffc0);
  118 
  119         sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
  120         device_printf(dev, " ");
  121         mii_phy_add_media(sc);
  122         printf("\n");
  123 
  124         MIIBUS_MEDIAINIT(sc->mii_dev);
  125         mii_phy_setmedia(sc);
  126 
  127         return (0);
  128 }
  129 
  130 static int
  131 smcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  132 {
  133         struct  ifmedia_entry *ife;
  134         int     reg;
  135 
  136         ife = mii->mii_media.ifm_cur;
  137 
  138         switch (cmd) {
  139         case MII_POLLSTAT:
  140                 break;
  141 
  142         case MII_MEDIACHG:
  143                 /*
  144                  * If the interface is not up, don't do anything.
  145                  */
  146                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  147                         break;
  148 
  149                 switch (IFM_SUBTYPE(ife->ifm_media)) {
  150                 case IFM_AUTO:
  151                         smcphy_auto(sc, ife->ifm_media);
  152                         break;
  153 
  154                 default:
  155                         mii_phy_setmedia(sc);
  156                         break;
  157                 }
  158 
  159                 break;
  160 
  161         case MII_TICK:
  162                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) {
  163                         return (0);
  164                 }
  165 
  166                 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
  167                         break;
  168                 }
  169 
  170                 /* I have no idea why BMCR_ISO gets set. */
  171                 reg = PHY_READ(sc, MII_BMCR);
  172                 if (reg & BMCR_ISO) {
  173                         PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO);
  174                 }
  175 
  176                 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  177                 if (reg & BMSR_LINK) {
  178                         sc->mii_ticks = 0;
  179                         break;
  180                 }
  181 
  182                 if (++sc->mii_ticks <= MII_ANEGTICKS) {
  183                         break;
  184                 }
  185 
  186                 sc->mii_ticks = 0;
  187                 if (smcphy_reset(sc) != 0) {
  188                         device_printf(sc->mii_dev, "reset failed\n");
  189                 }
  190                 smcphy_auto(sc, ife->ifm_media);
  191                 break;
  192         }
  193 
  194         /* Update the media status. */
  195         ukphy_status(sc);
  196 
  197         /* Callback if something changed. */
  198         mii_phy_update(sc, cmd);
  199         return (0);
  200 }
  201 
  202 static int
  203 smcphy_reset(struct mii_softc *sc)
  204 {
  205         u_int   bmcr;
  206         int     timeout;
  207 
  208         PHY_WRITE(sc, MII_BMCR, BMCR_RESET);
  209 
  210         for (timeout = 2; timeout > 0; timeout--) {
  211                 DELAY(50000);
  212                 bmcr = PHY_READ(sc, MII_BMCR);
  213                 if ((bmcr & BMCR_RESET) == 0)
  214                         break;
  215         }
  216 
  217         if (bmcr & BMCR_RESET) {
  218                 return (EIO);
  219         }
  220 
  221         PHY_WRITE(sc, MII_BMCR, 0x3000);
  222         return (0);
  223 }
  224 
  225 static void
  226 smcphy_auto(struct mii_softc *sc, int media)
  227 {
  228         uint16_t        anar;
  229 
  230         anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
  231             ANAR_CSMA;
  232         if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
  233                 anar |= ANAR_FC;
  234         PHY_WRITE(sc, MII_ANAR, anar);
  235         /* Apparently this helps. */
  236         anar = PHY_READ(sc, MII_ANAR);
  237         PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
  238 }

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FreeBSD/Linux Kernel Cross Reference sys/dev/mii/smcphy.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/mii/smcphy.c