The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/misc/ecc/ecc_amd8000.c

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    1 /*
    2  * Copyright (c) 2006 The DragonFly Project.  All rights reserved.
    3  *
    4  * This code is derived from software contributed to The DragonFly Project
    5  * by Matthew Dillon <dillon@backplane.com>.   AMD register addresses and
    6  * values were pulled from MemTest-86 and Linux.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  *
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in
   16  *    the documentation and/or other materials provided with the
   17  *    distribution.
   18  * 3. Neither the name of The DragonFly Project nor the names of its
   19  *    contributors may be used to endorse or promote products derived
   20  *    from this software without specific, prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   23  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   24  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
   25  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
   26  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
   27  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
   28  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
   30  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   31  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
   32  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   33  * SUCH DAMAGE.
   34  */
   35 
   36 #include <sys/param.h>
   37 #include <sys/systm.h>
   38 #include <sys/bus.h>
   39 #include <sys/kernel.h>
   40 #include <sys/malloc.h>
   41 
   42 #include <bus/pci/pcivar.h>
   43 #include <bus/pci/pcireg.h>
   44 #include <bus/pci/pcibus.h>
   45 #include <bus/pci/pci_cfgreg.h>
   46 #include <bus/pci/pcib_private.h>
   47 
   48 #include "pcib_if.h"
   49 
   50 struct ecc_amd8000_memctrl {
   51         uint16_t        vid;
   52         uint16_t        did;
   53         const char      *desc;
   54 };
   55 
   56 struct ecc_amd8000_softc {
   57         device_t        ecc_device;
   58         device_t        ecc_mydev;
   59         struct callout  ecc_callout;
   60 };
   61 
   62 #define ecc_printf(sc, fmt, arg...) \
   63         device_printf((sc)->ecc_mydev, fmt , ##arg)
   64 
   65 static void     ecc_amd8000_callout(void *);
   66 static int      ecc_amd8000_probe(device_t);
   67 static int      ecc_amd8000_attach(device_t);
   68 
   69 static const struct ecc_amd8000_memctrl ecc_memctrls[] = {
   70         { 0x1022, 0x1100, "AMD 8000 memory controller" },
   71         { 0x1022, 0x7454, "AMD 8151 memory controller" },
   72         { 0, 0, NULL } /* required last entry */
   73 };
   74 
   75 static device_method_t ecc_amd8000_methods[] = {
   76         /* Device interface */
   77         DEVMETHOD(device_probe,         ecc_amd8000_probe),
   78         DEVMETHOD(device_attach,        ecc_amd8000_attach),
   79         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   80         DEVMETHOD(device_suspend,       bus_generic_suspend),
   81         DEVMETHOD(device_resume,        bus_generic_resume),
   82         DEVMETHOD_END
   83 };
   84 
   85 static driver_t ecc_amd8000_driver = {
   86         "ecc",
   87         ecc_amd8000_methods,
   88         sizeof(struct ecc_amd8000_softc)
   89 };
   90 static devclass_t ecc_devclass;
   91 DRIVER_MODULE(ecc_amd8000, hostb, ecc_amd8000_driver, ecc_devclass, NULL, NULL);
   92 MODULE_DEPEND(ecc_amd8000, pci, 1, 1, 1);
   93 
   94 static int
   95 ecc_amd8000_probe(device_t dev)
   96 {
   97         const struct ecc_amd8000_memctrl *mc;
   98         uint16_t vid, did;
   99 
  100         vid = pci_get_vendor(dev);
  101         did = pci_get_device(dev);
  102 
  103         for (mc = ecc_memctrls; mc->desc != NULL; ++mc) {
  104                 if (mc->vid == vid && mc->did == did) {
  105                         struct ecc_amd8000_softc *sc = device_get_softc(dev);
  106 
  107                         device_set_desc(dev, mc->desc);
  108                         sc->ecc_mydev = dev;
  109                         sc->ecc_device = device_get_parent(dev);
  110                         return (0);
  111                 }
  112         }
  113         return (ENXIO);
  114 }
  115 
  116 static int
  117 ecc_amd8000_attach(device_t dev)
  118 {
  119         struct ecc_amd8000_softc *sc = device_get_softc(dev);
  120         uint32_t draminfo, eccinfo;
  121         int bus, slot, poll = 0;
  122 
  123         dev = sc->ecc_device; /* XXX */
  124 
  125         bus = pci_get_bus(dev);
  126         slot = pci_get_slot(dev);
  127 
  128         /*
  129          * The memory bridge is recognized as four PCI devices
  130          * using function codes 0, 1, 2, and 3.  We probe for the
  131          * device at function code 0 and assume that all four exist.
  132          */
  133         draminfo = pcib_read_config(dev, bus, slot, 2, 0x90, 4);
  134         eccinfo = pcib_read_config(dev, bus, slot, 3, 0x44, 4);
  135 
  136         if ((draminfo >> 17) & 1)
  137                 ecc_printf(sc, "memory type: ECC\n");
  138         else
  139                 ecc_printf(sc, "memory type: NON-ECC\n");
  140         switch((eccinfo >> 22) & 3) {
  141         case 0:
  142                 ecc_printf(sc, "ecc mode: DISABLED\n");
  143                 break;
  144         case 1:
  145                 ecc_printf(sc, "ecc mode: ENABLED/CORRECT-MODE\n");
  146                 poll = 1;
  147                 break;
  148         case 2:
  149                 ecc_printf(sc, "ecc mode: ENABLED/RESERVED (disabled)\n");
  150                 break;
  151         case 3:
  152                 ecc_printf(sc, "ecc mode: ENABLED/CHIPKILL-MODE\n");
  153                 poll = 1;
  154                 break;
  155         }
  156 
  157         /*
  158          * Enable ECC logging and clear any previous error.
  159          */
  160         if (poll) {
  161                 uint64_t v64;
  162                 uint32_t v32;
  163 
  164                 v64 = rdmsr(0x017B);
  165                 wrmsr(0x17B, (v64 & ~0xFFFFFFFFLL) | 0x00000010LL);
  166                 v32 = pcib_read_config(dev, bus, slot, 3, 0x4C, 4);
  167                 v32 &= 0x7F801EFC;
  168                 pcib_write_config(dev, bus, slot, 3, 0x4C, v32, 4);
  169 
  170                 callout_init_mp(&sc->ecc_callout);
  171                 callout_reset(&sc->ecc_callout, hz, ecc_amd8000_callout, sc);
  172         }
  173         return (0);
  174 }
  175 
  176 static void
  177 ecc_amd8000_callout(void *xsc)
  178 {
  179         struct ecc_amd8000_softc *sc = xsc;
  180         device_t dev = sc->ecc_device;
  181         uint32_t v32, addr;
  182         int bus, slot;
  183 
  184         bus = pci_get_bus(dev);
  185         slot = pci_get_slot(dev);
  186 
  187         /*
  188          * The address calculation is not entirely correct.  We need to
  189          * look at the AMD chipset documentation.
  190          */
  191         v32 = pcib_read_config(dev, bus, slot, 3, 0x4C, 4);
  192         if ((v32 & 0x80004000) == 0x80004000) {
  193                 addr = pcib_read_config(dev, bus, slot, 3, 0x50, 4);
  194                 ecc_printf(sc, "Correctable ECC error at %08x\n", addr);
  195                 pcib_write_config(dev, bus, slot, 3, 0x4C, v32 & 0x7F801EFC, 4);
  196         } else if ((v32 & 0x80002000) == 0x80002000) {
  197                 addr = pcib_read_config(dev, bus ,slot, 3, 0x50, 4);
  198                 ecc_printf(sc, "Uncorrectable ECC error at %08x\n", addr);
  199                 pcib_write_config(dev, bus, slot, 3, 0x4C, v32 & 0x7F801EFC, 4);
  200         }
  201         callout_reset(&sc->ecc_callout, hz, ecc_amd8000_callout, sc);
  202 }

Cache object: ca2c42a2841598d09f7f0a26122d9bf3


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