The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mlx/mlxvar.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 1999 Michael Smith
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  *      $FreeBSD$
   29  */
   30 
   31 /*
   32  * Debugging levels:
   33  *  0 - quiet, only emit warnings
   34  *  1 - noisy, emit major function points and things done
   35  *  2 - extremely noisy, emit trace items in loops, etc.
   36  */
   37 #ifdef MLX_DEBUG
   38 #define debug(level, fmt, args...)      do { if (level <= MLX_DEBUG) printf("%s: " fmt "\n", __func__ , ##args); } while(0)
   39 #define debug_called(level)             do { if (level <= MLX_DEBUG) printf(__func__ ": called\n"); } while(0)
   40 #else
   41 #define debug(level, fmt, args...)
   42 #define debug_called(level)
   43 #endif
   44 
   45 /*
   46  * Regardless of the actual capacity of the controller, we will allocate space
   47  * for 64 s/g entries.  Typically controllers support 17 or 33 entries (64k or
   48  * 128k maximum transfer assuming 4k page size and non-optimal alignment), but
   49  * making that fit cleanly without crossing page boundaries requires rounding up
   50  * to the next power of two.
   51  */
   52 #define MLX_MAXPHYS     (128 * 1024)
   53 #define MLX_NSEG        64
   54 
   55 #define MLX_NSLOTS      256             /* max number of command slots */
   56 
   57 #define MLX_MAXDRIVES   32              /* max number of system drives */
   58 
   59 /*
   60  * Structure describing a System Drive as attached to the controller.
   61  */
   62 struct mlx_sysdrive 
   63 {
   64     /* from MLX_CMD_ENQSYSDRIVE */
   65     u_int32_t           ms_size;
   66     int                 ms_state;
   67     int                 ms_raidlevel;
   68 
   69     /* synthetic geometry */
   70     int                 ms_cylinders;
   71     int                 ms_heads;
   72     int                 ms_sectors;
   73 
   74     /* handle for attached driver */
   75     device_t            ms_disk;
   76 };
   77 
   78 /*
   79  * Per-command control structure.
   80  */
   81 struct mlx_command 
   82 {
   83     TAILQ_ENTRY(mlx_command)    mc_link;        /* list linkage */
   84 
   85     struct mlx_softc            *mc_sc;         /* controller that owns us */
   86     u_int8_t                    mc_slot;        /* command slot we occupy */
   87     u_int16_t                   mc_status;      /* command completion status */
   88     time_t                      mc_timeout;     /* when this command expires */
   89     u_int8_t                    mc_mailbox[16]; /* command mailbox */
   90     u_int32_t                   mc_sgphys;      /* physical address of s/g array in controller space */
   91     int                         mc_nsgent;      /* number of entries in s/g map */
   92     int                         mc_flags;
   93 #define MLX_CMD_DATAIN          (1<<0)
   94 #define MLX_CMD_DATAOUT         (1<<1)
   95 #define MLX_CMD_PRIORITY        (1<<2)          /* high-priority command */
   96 
   97     void                        *mc_data;       /* data buffer */
   98     size_t                      mc_length;
   99     bus_dmamap_t                mc_dmamap;      /* DMA map for data */
  100     u_int32_t                   mc_dataphys;    /* data buffer base address controller space */
  101 
  102     void                        (* mc_complete)(struct mlx_command *mc);        /* completion handler */
  103     void                        *mc_private;    /* submitter-private data or wait channel */
  104     int                         mc_command;
  105 };
  106 
  107 /*
  108  * Per-controller structure.
  109  */
  110 struct mlx_softc 
  111 {
  112     /* bus connections */
  113     device_t            mlx_dev;
  114     struct cdev *mlx_dev_t;
  115     struct resource     *mlx_mem;       /* mailbox interface window */
  116     int                 mlx_mem_rid;
  117     int                 mlx_mem_type;
  118     bus_dma_tag_t       mlx_parent_dmat;/* parent DMA tag */
  119     bus_dma_tag_t       mlx_buffer_dmat;/* data buffer DMA tag */
  120     struct resource     *mlx_irq;       /* interrupt */
  121     void                *mlx_intr;      /* interrupt handle */
  122 
  123     /* scatter/gather lists and their controller-visible mappings */
  124     struct mlx_sgentry  *mlx_sgtable;   /* s/g lists */
  125     u_int32_t           mlx_sgbusaddr;  /* s/g table base address in bus space */
  126     bus_dma_tag_t       mlx_sg_dmat;    /* s/g buffer DMA tag */
  127     bus_dmamap_t        mlx_sg_dmamap;  /* map for s/g buffers */
  128     
  129     /* controller limits and features */
  130     struct mlx_enquiry2 *mlx_enq2;
  131     int                 mlx_feature;    /* controller features/quirks */
  132 #define MLX_FEAT_PAUSEWORKS     (1<<0)  /* channel pause works as expected */
  133 
  134     /* controller queues and arrays */
  135     TAILQ_HEAD(, mlx_command)   mlx_freecmds;           /* command structures available for reuse */
  136     TAILQ_HEAD(, mlx_command)   mlx_work;               /* active commands */
  137     struct mlx_command  *mlx_busycmd[MLX_NSLOTS];       /* busy commands */
  138     int                 mlx_busycmds;                   /* count of busy commands */
  139     struct mlx_sysdrive mlx_sysdrive[MLX_MAXDRIVES];    /* system drives */
  140     struct bio_queue_head mlx_bioq;                     /* outstanding I/O operations */
  141     int                 mlx_waitbufs;                   /* number of bufs awaiting commands */
  142 
  143     /* controller status */
  144     int                 mlx_geom;
  145 #define MLX_GEOM_128_32         0       /* geoemetry translation modes */
  146 #define MLX_GEOM_256_63         1
  147     int                 mlx_state;
  148 #define MLX_STATE_INTEN         (1<<0)  /* interrupts have been enabled */
  149 #define MLX_STATE_SHUTDOWN      (1<<1)  /* controller is shut down */
  150 #define MLX_STATE_OPEN          (1<<2)  /* control device is open */
  151 #define MLX_STATE_SUSPEND       (1<<3)  /* controller is suspended */
  152 #define MLX_STATE_QFROZEN       (1<<4)  /* bio queue frozen */
  153     struct mtx          mlx_io_lock;
  154     struct sx           mlx_config_lock;
  155     struct callout      mlx_timeout;    /* periodic status monitor */
  156     time_t              mlx_lastpoll;   /* last time_second we polled for status */
  157     u_int16_t           mlx_lastevent;  /* sequence number of the last event we recorded */
  158     int                 mlx_currevent;  /* sequence number last time we looked */
  159     int                 mlx_background; /* if != 0 rebuild or check is in progress */
  160 #define MLX_BACKGROUND_CHECK            1       /* we started a check */
  161 #define MLX_BACKGROUND_REBUILD          2       /* we started a rebuild */
  162 #define MLX_BACKGROUND_SPONTANEOUS      3       /* it just happened somehow */
  163     struct mlx_rebuild_status mlx_rebuildstat;  /* last rebuild status */
  164     struct mlx_pause    mlx_pause;      /* pending pause operation details */
  165 
  166     int                 mlx_flags;
  167 #define MLX_SPINUP_REPORTED     (1<<0)  /* "spinning up drives" message displayed */
  168 #define MLX_EVENTLOG_BUSY       (1<<1)  /* currently reading event log */
  169 
  170     /* interface-specific accessor functions */
  171     int                 mlx_iftype;     /* interface protocol */
  172 #define MLX_IFTYPE_2    2
  173 #define MLX_IFTYPE_3    3
  174 #define MLX_IFTYPE_4    4
  175 #define MLX_IFTYPE_5    5
  176     int                 (* mlx_tryqueue)(struct mlx_softc *sc, struct mlx_command *mc);
  177     int                 (* mlx_findcomplete)(struct mlx_softc *sc, u_int8_t *slot, u_int16_t *status);
  178     void                (* mlx_intaction)(struct mlx_softc *sc, int action);
  179     int                 (* mlx_fw_handshake)(struct mlx_softc *sc, int *error, int *param1, int *param2, int first);
  180 #define MLX_INTACTION_DISABLE           0
  181 #define MLX_INTACTION_ENABLE            1
  182 };
  183 
  184 #define MLX_IO_LOCK(sc)                 mtx_lock(&(sc)->mlx_io_lock)
  185 #define MLX_IO_UNLOCK(sc)               mtx_unlock(&(sc)->mlx_io_lock)
  186 #define MLX_IO_ASSERT_LOCKED(sc)        mtx_assert(&(sc)->mlx_io_lock, MA_OWNED)
  187 #define MLX_CONFIG_LOCK(sc)             sx_xlock(&(sc)->mlx_config_lock)
  188 #define MLX_CONFIG_UNLOCK(sc)           sx_xunlock(&(sc)->mlx_config_lock)
  189 #define MLX_CONFIG_ASSERT_LOCKED(sc)    sx_assert(&(sc)->mlx_config_lock, SA_XLOCKED)
  190 
  191 /*
  192  * Interface between bus connections and driver core.
  193  */
  194 extern void             mlx_free(struct mlx_softc *sc);
  195 extern int              mlx_attach(struct mlx_softc *sc);
  196 extern void             mlx_startup(struct mlx_softc *sc);
  197 extern void             mlx_intr(void *data);
  198 extern int              mlx_detach(device_t dev);
  199 extern int              mlx_shutdown(device_t dev);
  200 extern int              mlx_suspend(device_t dev); 
  201 extern int              mlx_resume(device_t dev);
  202 extern d_open_t         mlx_open;
  203 extern d_close_t        mlx_close;
  204 extern d_ioctl_t        mlx_ioctl;
  205 
  206 extern devclass_t       mlx_devclass;
  207 extern devclass_t       mlxd_devclass;
  208 
  209 /*
  210  * Mylex System Disk driver
  211  */
  212 struct mlxd_softc 
  213 {
  214     device_t            mlxd_dev;
  215     struct mlx_softc    *mlxd_controller;
  216     struct mlx_sysdrive *mlxd_drive;
  217     struct disk         *mlxd_disk;
  218     int                 mlxd_unit;
  219     int                 mlxd_flags;
  220 #define MLXD_OPEN       (1<<0)          /* drive is open (can't shut down) */
  221 };
  222 
  223 /*
  224  * Interface between driver core and disk driver (should be using a bus?)
  225  */
  226 extern int      mlx_submit_buf(struct mlx_softc *sc, struct bio *bp);
  227 extern int      mlx_submit_ioctl(struct mlx_softc *sc,
  228                         struct mlx_sysdrive *drive, u_long cmd, 
  229                         caddr_t addr, int32_t flag, struct thread *td);
  230 extern void     mlxd_intr(struct bio *bp);
  231 
  232 

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