mlx5_core.h

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    1 /*-
    2  * Copyright (c) 2013-2017, Mellanox Technologies, Ltd.  All rights reserved.
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
   14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   16  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
   17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   23  * SUCH DAMAGE.
   24  *
   25  * $FreeBSD$
   26  */
   27 
   28 #ifndef __MLX5_CORE_H__
   29 #define __MLX5_CORE_H__
   30 
   31 #include <linux/types.h>
   32 #include <linux/kernel.h>
   33 #include <linux/sched.h>
   34 
   35 #include <dev/mlxfw/mlxfw.h>
   36 
   37 #define DRIVER_NAME "mlx5_core"
   38 #ifndef DRIVER_VERSION
   39 #define DRIVER_VERSION "3.7.1"
   40 #endif
   41 #define DRIVER_RELDATE "November 2021"
   42 
   43 extern int mlx5_core_debug_mask;
   44 
   45 #define mlx5_core_dbg(dev, format, ...)                                 \
   46         pr_debug("%s:%s:%d:(pid %d): " format,                          \
   47                  (dev)->priv.name, __func__, __LINE__, curthread->td_proc->p_pid,       \
   48                  ##__VA_ARGS__)
   49 
   50 #define mlx5_core_dbg_mask(dev, mask, format, ...)                      \
   51 do {                                                                    \
   52         if ((mask) & mlx5_core_debug_mask)                              \
   53                 mlx5_core_dbg(dev, format, ##__VA_ARGS__);              \
   54 } while (0)
   55 
   56 #define mlx5_core_err(_dev, format, ...)                                        \
   57         device_printf((_dev)->pdev->dev.bsddev, "ERR: ""%s:%d:(pid %d): " format, \
   58                 __func__, __LINE__, curthread->td_proc->p_pid, \
   59                 ##__VA_ARGS__)
   60 
   61 #define mlx5_core_warn(_dev, format, ...)                               \
   62         device_printf((_dev)->pdev->dev.bsddev, "WARN: ""%s:%d:(pid %d): " format, \
   63                 __func__, __LINE__, curthread->td_proc->p_pid, \
   64                 ##__VA_ARGS__)
   65 
   66 #define mlx5_core_info(_dev, format, ...)                                       \
   67         device_printf((_dev)->pdev->dev.bsddev, "INFO: ""%s:%d:(pid %d): " format, \
   68                 __func__, __LINE__, curthread->td_proc->p_pid, \
   69                 ##__VA_ARGS__)
   70 
   71 enum {
   72         MLX5_CMD_DATA, /* print command payload only */
   73         MLX5_CMD_TIME, /* print command execution time */
   74 };
   75 
   76 enum mlx5_semaphore_space_address {
   77         MLX5_SEMAPHORE_SW_RESET         = 0x20,
   78 };
   79 
   80 struct mlx5_core_dev;
   81 
   82 enum mlx5_pddr_page_select {
   83         MLX5_PDDR_OPERATIONAL_INFO_PAGE            = 0x0,
   84         MLX5_PDDR_TROUBLESHOOTING_INFO_PAGE        = 0x1,
   85         MLX5_PDDR_MODULE_INFO_PAGE                 = 0x3,
   86 };
   87 
   88 enum mlx5_pddr_monitor_opcodes {
   89         MLX5_LINK_NO_ISSUE_OBSERVED                = 0x0,
   90         MLX5_LINK_PORT_CLOSED                      = 0x1,
   91         MLX5_LINK_AN_FAILURE                       = 0x2,
   92         MLX5_LINK_TRAINING_FAILURE                 = 0x5,
   93         MLX5_LINK_LOGICAL_MISMATCH                 = 0x9,
   94         MLX5_LINK_REMOTE_FAULT_INDICATION          = 0xe,
   95         MLX5_LINK_BAD_SIGNAL_INTEGRITY             = 0xf,
   96         MLX5_LINK_CABLE_COMPLIANCE_CODE_MISMATCH   = 0x10,
   97         MLX5_LINK_INTERNAL_ERR                     = 0x17,
   98         MLX5_LINK_INFO_NOT_AVAIL                   = 0x3ff,
   99         MLX5_LINK_CABLE_UNPLUGGED                  = 0x400,
  100         MLX5_LINK_LONG_RANGE_FOR_NON_MLX_CABLE     = 0x401,
  101         MLX5_LINK_BUS_STUCK                        = 0x402,
  102         MLX5_LINK_UNSUPP_EEPROM                    = 0x403,
  103         MLX5_LINK_PART_NUM_LIST                    = 0x404,
  104         MLX5_LINK_UNSUPP_CABLE                     = 0x405,
  105         MLX5_LINK_MODULE_TEMP_SHUTDOWN             = 0x406,
  106         MLX5_LINK_SHORTED_CABLE                    = 0x407,
  107         MLX5_LINK_POWER_BUDGET_EXCEEDED            = 0x408,
  108         MLX5_LINK_MNG_FORCED_DOWN                  = 0x409,
  109 };
  110 
  111 int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
  112 int mlx5_query_board_id(struct mlx5_core_dev *dev);
  113 int mlx5_query_qcam_reg(struct mlx5_core_dev *mdev, u32 *qcam,
  114                         u8 feature_group, u8 access_reg_group);
  115 int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam,
  116                         u8 feature_group, u8 access_reg_group);
  117 int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcap,
  118                         u8 feature_group, u8 access_reg_group);
  119 int mlx5_query_mfrl_reg(struct mlx5_core_dev *mdev, u8 *reset_level);
  120 int mlx5_set_mfrl_reg(struct mlx5_core_dev *mdev, u8 reset_level);
  121 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev);
  122 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
  123 int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev);
  124 int mlx5_cmd_fast_teardown_hca(struct mlx5_core_dev *dev);
  125 void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
  126                      unsigned long param);
  127 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force);
  128 void mlx5_disable_device(struct mlx5_core_dev *dev);
  129 void mlx5_recover_device(struct mlx5_core_dev *dev);
  130 int mlx5_query_pddr_troubleshooting_info(struct mlx5_core_dev *mdev,
  131                                          u16 *monitor_opcode,
  132                                          u8 *status_message, size_t sm_len);
  133 
  134 int mlx5_register_device(struct mlx5_core_dev *dev);
  135 void mlx5_unregister_device(struct mlx5_core_dev *dev);
  136 
  137 int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw);
  138 
  139 void mlx5e_init(void);
  140 void mlx5e_cleanup(void);
  141 
  142 int mlx5_ctl_init(void);
  143 void mlx5_ctl_fini(void);
  144 void mlx5_fwdump_prep(struct mlx5_core_dev *mdev);
  145 int mlx5_fwdump(struct mlx5_core_dev *mdev);
  146 void mlx5_fwdump_clean(struct mlx5_core_dev *mdev);
  147 
  148 struct mlx5_crspace_regmap {
  149         uint32_t addr;
  150         unsigned cnt;
  151 };
  152 
  153 extern struct pci_driver mlx5_core_driver;
  154 
  155 SYSCTL_DECL(_hw_mlx5);
  156 
  157 enum {
  158         MLX5_NIC_IFC_FULL               = 0,
  159         MLX5_NIC_IFC_DISABLED           = 1,
  160         MLX5_NIC_IFC_NO_DRAM_NIC        = 2,
  161         MLX5_NIC_IFC_INVALID            = 3,
  162         MLX5_NIC_IFC_SW_RESET           = 7,
  163 };
  164 
  165 u8 mlx5_get_nic_state(struct mlx5_core_dev *dev);
  166 void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state);
  167 
  168 #endif /* __MLX5_CORE_H__ */

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FreeBSD/Linux Kernel Cross Reference sys/dev/mlx5/mlx5_core/mlx5_core.h

FreeBSD/Linux Kernel Cross Reference
sys/dev/mlx5/mlx5_core/mlx5_core.h