1 /*-
2 * Copyright (c) 2019 Mellanox Technologies. All rights reserved.
3 * Copyright (c) 2022 NVIDIA corporation & affiliates.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29 #ifndef _MLX5_TLS_H_
30 #define _MLX5_TLS_H_
31
32 #define MLX5E_TLS_TAG_LOCK(tag) mtx_lock(&(tag)->mtx)
33 #define MLX5E_TLS_TAG_UNLOCK(tag) mtx_unlock(&(tag)->mtx)
34
35 #define MLX5E_TLS_STAT_INC(tag, field, num) \
36 counter_u64_add((tag)->tls->stats.field, num)
37
38 enum {
39 MLX5E_TLS_LOOP = 0,
40 MLX5E_TLS_FAILURE = 1,
41 MLX5E_TLS_DEFERRED = 2,
42 MLX5E_TLS_CONTINUE = 3,
43 };
44
45 struct mlx5e_tls;
46 struct mlx5e_tls_tag {
47 struct m_snd_tag tag;
48 uint32_t tisn; /* HW TIS context number */
49 uint32_t dek_index; /* HW TLS context number */
50 struct mlx5e_tls *tls;
51 struct m_snd_tag *rl_tag;
52 struct mtx mtx;
53 uint32_t expected_seq; /* expected TCP sequence number */
54 uint32_t state; /* see MLX5E_TLS_ST_XXX */
55 #define MLX5E_TLS_ST_INIT 0
56 #define MLX5E_TLS_ST_SETUP 1
57 #define MLX5E_TLS_ST_TXRDY 2
58 #define MLX5E_TLS_ST_RELEASE 3
59 #define MLX5E_TLS_ST_FREED 4
60 struct work_struct work;
61
62 uint32_t dek_index_ok:1;
63
64 /* parameters needed */
65 uint8_t crypto_params[128] __aligned(4);
66 } __aligned(MLX5E_CACHELINE_SIZE);
67
68 #define MLX5E_TLS_STATS(m) \
69 m(+1, u64, tx_packets, "tx_packets", "Transmitted packets") \
70 m(+1, u64, tx_bytes, "tx_bytes", "Transmitted bytes") \
71 m(+1, u64, tx_packets_ooo, "tx_packets_ooo", "Transmitted packets out of order") \
72 m(+1, u64, tx_bytes_ooo, "tx_bytes_ooo", "Transmitted bytes out of order") \
73 m(+1, u64, tx_error, "tx_error", "Transmitted packets with error")
74
75 #define MLX5E_TLS_STATS_NUM (0 MLX5E_TLS_STATS(MLX5E_STATS_COUNT))
76
77 struct mlx5e_tls_stats {
78 struct sysctl_ctx_list ctx;
79 counter_u64_t arg[0];
80 MLX5E_TLS_STATS(MLX5E_STATS_COUNTER)
81 };
82
83 struct mlx5e_tls {
84 struct sysctl_ctx_list ctx;
85 struct mlx5e_tls_stats stats;
86 struct workqueue_struct *wq;
87 uma_zone_t zone;
88 uint32_t max_resources; /* max number of resources */
89 volatile uint32_t num_resources; /* current number of resources */
90 int init; /* set when ready */
91 char zname[32];
92 };
93
94 int mlx5e_tls_init(struct mlx5e_priv *);
95 void mlx5e_tls_cleanup(struct mlx5e_priv *);
96 int mlx5e_sq_tls_xmit(struct mlx5e_sq *, struct mlx5e_xmit_args *, struct mbuf **);
97
98 if_snd_tag_alloc_t mlx5e_tls_snd_tag_alloc;
99
100 #endif /* _MLX5_TLS_H_ */
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