The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mly/mlyvar.h

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    1 /*-
    2  * Copyright (c) 2000, 2001 Michael Smith
    3  * Copyright (c) 2000 BSDi
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  *      $FreeBSD: releng/6.4/sys/dev/mly/mlyvar.h 130585 2004-06-16 09:47:26Z phk $
   28  */
   29 
   30 /********************************************************************************
   31  ********************************************************************************
   32                                                      Driver Parameter Definitions
   33  ********************************************************************************
   34  ********************************************************************************/
   35 
   36 /*
   37  * The firmware interface allows for a 16-bit command identifier.  A lookup
   38  * table this size (256k) would be too expensive, so we cap ourselves at a
   39  * reasonable limit.
   40  */
   41 #define MLY_MAX_COMMANDS        256     /* max commands per controller */
   42 
   43 /*
   44  * The firmware interface allows for a 16-bit s/g list length.  We limit 
   45  * ourselves to a reasonable maximum and ensure alignment.
   46  */
   47 #define MLY_MAX_SGENTRIES       64      /* max S/G entries, limit 65535 */              
   48 
   49 /*
   50  * The interval at which we poke the controller for status updates (in seconds).
   51  */
   52 #define MLY_PERIODIC_INTERVAL   1
   53 
   54 /********************************************************************************
   55  ********************************************************************************
   56                                                       Cross-version Compatibility
   57  ********************************************************************************
   58  ********************************************************************************/
   59 
   60 #if __FreeBSD_version >= 500005
   61 # include <sys/taskqueue.h>
   62 #endif
   63 
   64 #if __FreeBSD_version <= 500014
   65 # include <machine/clock.h>
   66 # undef offsetof
   67 # define offsetof(type, field) ((size_t)(&((type *)0)->field))
   68 #endif
   69 
   70 #ifndef INTR_ENTROPY
   71 # define INTR_ENTROPY 0
   72 #endif
   73 
   74 /********************************************************************************
   75  ********************************************************************************
   76                                                       Driver Variable Definitions
   77  ********************************************************************************
   78  ********************************************************************************/
   79 
   80 /*
   81  * Debugging levels:
   82  *  0 - quiet, only emit warnings
   83  *  1 - noisy, emit major function points and things done
   84  *  2 - extremely noisy, emit trace items in loops, etc.
   85  */
   86 #ifdef MLY_DEBUG
   87 # define debug(level, fmt, args...)     do { if (level <= MLY_DEBUG) printf("%s: " fmt "\n", __func__ , ##args); } while(0)
   88 # define debug_called(level)            do { if (level <= MLY_DEBUG) printf("%s: called\n", __func__); } while(0)
   89 # define debug_struct(s)                printf("  SIZE %s: %d\n", #s, sizeof(struct s))
   90 # define debug_union(s)                 printf("  SIZE %s: %d\n", #s, sizeof(union s))
   91 # define debug_field(s, f)              printf("  OFFSET %s.%s: %d\n", #s, #f, ((int)&(((struct s *)0)->f)))
   92 extern void             mly_printstate0(void);
   93 extern struct mly_softc *mly_softc0;
   94 #else
   95 # define debug(level, fmt, args...)
   96 # define debug_called(level)
   97 # define debug_struct(s)
   98 #endif
   99 
  100 #define mly_printf(sc, fmt, args...)    device_printf(sc->mly_dev, fmt , ##args)
  101 
  102 /*
  103  * Per-device structure, used to save persistent state on devices.
  104  *
  105  * Note that this isn't really Bus/Target/Lun since we don't support
  106  * lun != 0 at this time.
  107  */
  108 struct mly_btl {
  109     int                 mb_flags;
  110 #define MLY_BTL_PHYSICAL        (1<<0)          /* physical device */
  111 #define MLY_BTL_LOGICAL         (1<<1)          /* logical device */
  112 #define MLY_BTL_PROTECTED       (1<<2)          /* device is protected - I/O not allowed */
  113 #define MLY_BTL_RESCAN          (1<<3)          /* device needs to be rescanned */
  114     char                mb_name[16];            /* peripheral attached to this device */
  115     int                 mb_state;               /* see 8.1 */
  116     int                 mb_type;                /* see 8.2 */
  117 
  118     /* physical devices only */
  119     int                 mb_speed;               /* interface transfer rate */
  120     int                 mb_width;               /* interface width */
  121 };
  122 
  123 /*
  124  * Per-command control structure.
  125  */
  126 struct mly_command {
  127     TAILQ_ENTRY(mly_command)    mc_link;        /* list linkage */
  128 
  129     struct mly_softc            *mc_sc;         /* controller that owns us */
  130     u_int16_t                   mc_slot;        /* command slot we occupy */
  131     int                         mc_flags;
  132 #define MLY_CMD_BUSY            (1<<0)          /* command is being run, or ready to run, or not completed */
  133 #define MLY_CMD_COMPLETE        (1<<1)          /* command has been completed */
  134 #define MLY_CMD_MAPPED          (1<<3)          /* command has had its data mapped */
  135 #define MLY_CMD_DATAIN          (1<<4)          /* data moves controller->system */
  136 #define MLY_CMD_DATAOUT         (1<<5)          /* data moves system->controller */
  137     u_int16_t                   mc_status;      /* command completion status */
  138     u_int8_t                    mc_sense;       /* sense data length */
  139     int32_t                     mc_resid;       /* I/O residual count */
  140 
  141     union mly_command_packet    *mc_packet;     /* our controller command */
  142     u_int64_t                   mc_packetphys;  /* physical address of the mapped packet */
  143 
  144     void                        *mc_data;       /* data buffer */
  145     size_t                      mc_length;      /* data length */
  146     bus_dmamap_t                mc_datamap;     /* DMA map for data */
  147 
  148     void        (* mc_complete)(struct mly_command *mc);        /* completion handler */
  149     void        *mc_private;                                    /* caller-private data */
  150 
  151     int                         mc_timestamp;
  152 };
  153 
  154 /*
  155  * Command slot regulation.
  156  *
  157  * We can't use slot 0 due to the memory mailbox implementation.
  158  */
  159 #define MLY_SLOT_START          1
  160 #define MLY_SLOT_MAX            (MLY_SLOT_START + MLY_MAX_COMMANDS)
  161 
  162 /*
  163  * Per-controller structure.
  164  */
  165 struct mly_softc {
  166     /* bus connections */
  167     device_t            mly_dev;
  168     struct cdev *mly_dev_t;
  169     struct resource     *mly_regs_resource;     /* register interface window */
  170     int                 mly_regs_rid;           /* resource ID */
  171     bus_space_handle_t  mly_bhandle;            /* bus space handle */
  172     bus_space_tag_t     mly_btag;               /* bus space tag */
  173     bus_dma_tag_t       mly_parent_dmat;        /* parent DMA tag */
  174     bus_dma_tag_t       mly_buffer_dmat;        /* data buffer/command DMA tag */
  175     struct resource     *mly_irq;               /* interrupt */
  176     int                 mly_irq_rid;
  177     void                *mly_intr;              /* interrupt handle */
  178 
  179     /* scatter/gather lists and their controller-visible mappings */
  180     struct mly_sg_entry *mly_sg_table;          /* s/g lists */
  181     u_int32_t           mly_sg_busaddr;         /* s/g table base address in bus space */
  182     bus_dma_tag_t       mly_sg_dmat;            /* s/g buffer DMA tag */
  183     bus_dmamap_t        mly_sg_dmamap;          /* map for s/g buffers */
  184 
  185     /* controller hardware interface */
  186     int                 mly_hwif;
  187 #define MLY_HWIF_I960RX         0
  188 #define MLY_HWIF_STRONGARM      1
  189     u_int8_t            mly_doorbell_true;      /* xor map to make hardware doorbell 'true' bits into 1s */
  190     u_int8_t            mly_command_mailbox;    /* register offsets */
  191     u_int8_t            mly_status_mailbox;
  192     u_int8_t            mly_idbr;
  193     u_int8_t            mly_odbr;
  194     u_int8_t            mly_error_status;
  195     u_int8_t            mly_interrupt_status;
  196     u_int8_t            mly_interrupt_mask;
  197     struct mly_mmbox    *mly_mmbox;                     /* kernel-space address of memory mailbox */
  198     u_int64_t           mly_mmbox_busaddr;              /* bus-space address of memory mailbox */
  199     bus_dma_tag_t       mly_mmbox_dmat;                 /* memory mailbox DMA tag */
  200     bus_dmamap_t        mly_mmbox_dmamap;               /* memory mailbox DMA map */
  201     u_int32_t           mly_mmbox_command_index;        /* next index to use */
  202     u_int32_t           mly_mmbox_status_index;         /* index we next expect status at */
  203 
  204     /* controller features, limits and status */
  205     int                 mly_state;
  206 #define MLY_STATE_OPEN          (1<<1)
  207 #define MLY_STATE_INTERRUPTS_ON (1<<2)
  208 #define MLY_STATE_MMBOX_ACTIVE  (1<<3)
  209 #define MLY_STATE_CAM_FROZEN    (1<<4)
  210     struct mly_ioctl_getcontrollerinfo  *mly_controllerinfo;
  211     struct mly_param_controller         *mly_controllerparam;
  212     struct mly_btl                      mly_btl[MLY_MAX_CHANNELS][MLY_MAX_TARGETS];
  213 
  214     /* command management */
  215     struct mly_command          mly_command[MLY_MAX_COMMANDS];  /* commands */
  216     union mly_command_packet    *mly_packet;            /* command packets */
  217     bus_dma_tag_t               mly_packet_dmat;        /* packet DMA tag */
  218     bus_dmamap_t                mly_packetmap;          /* packet DMA map */
  219     u_int64_t                   mly_packetphys;         /* packet array base address */
  220     TAILQ_HEAD(,mly_command)    mly_free;               /* commands available for reuse */
  221     TAILQ_HEAD(,mly_command)    mly_busy;
  222     TAILQ_HEAD(,mly_command)    mly_complete;           /* commands which have been returned by the controller */
  223     struct mly_qstat            mly_qstat[MLYQ_COUNT];  /* queue statistics */
  224 
  225     /* health monitoring */
  226     u_int32_t                   mly_event_change;       /* event status change indicator */
  227     u_int32_t                   mly_event_counter;      /* next event for which we anticpiate status */
  228     u_int32_t                   mly_event_waiting;      /* next event the controller will post status for */
  229     struct callout_handle       mly_periodic;           /* periodic event handling */
  230 
  231     /* CAM connection */
  232     struct cam_devq             *mly_cam_devq;                  /* CAM device queue */
  233     struct cam_sim              *mly_cam_sim[MLY_MAX_CHANNELS]; /* CAM SIMs */
  234     struct cam_path             *mly_cam_path;                  /* rescan path */
  235     int                         mly_cam_channels;               /* total channel count */
  236 
  237 #if __FreeBSD_version >= 500005
  238     /* command-completion task */
  239     struct task         mly_task_complete;      /* deferred-completion task */
  240 #endif
  241     int                         mly_qfrzn_cnt;          /* Track simq freezes */
  242 };
  243 
  244 /*
  245  * Register access helpers.
  246  */
  247 #define MLY_SET_REG(sc, reg, val)       bus_space_write_1(sc->mly_btag, sc->mly_bhandle, reg, val)
  248 #define MLY_GET_REG(sc, reg)            bus_space_read_1 (sc->mly_btag, sc->mly_bhandle, reg)
  249 #define MLY_GET_REG2(sc, reg)           bus_space_read_2 (sc->mly_btag, sc->mly_bhandle, reg)
  250 #define MLY_GET_REG4(sc, reg)           bus_space_read_4 (sc->mly_btag, sc->mly_bhandle, reg)
  251 
  252 #define MLY_SET_MBOX(sc, mbox, ptr)                                                                     \
  253         do {                                                                                            \
  254             bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox,      *((u_int32_t *)ptr));           \
  255             bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox +  4, *((u_int32_t *)ptr + 1));       \
  256             bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox +  8, *((u_int32_t *)ptr + 2));       \
  257             bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 12, *((u_int32_t *)ptr + 3));       \
  258         } while(0);
  259 #define MLY_GET_MBOX(sc, mbox, ptr)                                                                     \
  260         do {                                                                                            \
  261             *((u_int32_t *)ptr) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox);                \
  262             *((u_int32_t *)ptr + 1) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 4);        \
  263             *((u_int32_t *)ptr + 2) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 8);        \
  264             *((u_int32_t *)ptr + 3) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 12);       \
  265         } while(0);
  266 
  267 #define MLY_IDBR_TRUE(sc, mask)                                                         \
  268         ((((MLY_GET_REG((sc), (sc)->mly_idbr)) ^ (sc)->mly_doorbell_true) & (mask)) == (mask))
  269 #define MLY_ODBR_TRUE(sc, mask)                                                         \
  270         ((MLY_GET_REG((sc), (sc)->mly_odbr) & (mask)) == (mask))
  271 #define MLY_ERROR_VALID(sc)                                                             \
  272         ((((MLY_GET_REG((sc), (sc)->mly_error_status)) ^ (sc)->mly_doorbell_true) & (MLY_MSG_EMPTY)) == 0)
  273 
  274 #define MLY_MASK_INTERRUPTS(sc)                                                         \
  275         do {                                                                            \
  276             MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE);    \
  277             sc->mly_state &= ~MLY_STATE_INTERRUPTS_ON;                                  \
  278         } while(0);
  279 #define MLY_UNMASK_INTERRUPTS(sc)                                                       \
  280         do {                                                                            \
  281             MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE);     \
  282             sc->mly_state |= MLY_STATE_INTERRUPTS_ON;                                   \
  283         } while(0);
  284 
  285 /*
  286  * Bus/target/logical ID-related macros.
  287  */
  288 #define MLY_LOGDEV_ID(sc, bus, target)  (((bus) - (sc)->mly_controllerinfo->physical_channels_present) * \
  289                                          MLY_MAX_TARGETS + (target))
  290 #define MLY_LOGDEV_BUS(sc, logdev)      (((logdev) / MLY_MAX_TARGETS) + \
  291                                          (sc)->mly_controllerinfo->physical_channels_present)
  292 #define MLY_LOGDEV_TARGET(sc, logdev)   ((logdev) % MLY_MAX_TARGETS)
  293 #define MLY_BUS_IS_VIRTUAL(sc, bus)     ((bus) >= (sc)->mly_controllerinfo->physical_channels_present)
  294 #define MLY_BUS_IS_VALID(sc, bus)       (((bus) < (sc)->mly_cam_channels) && ((sc)->mly_cam_sim[(bus)] != NULL))
  295 
  296 /********************************************************************************
  297  * Queue primitives
  298  */
  299 
  300 #define MLYQ_ADD(sc, qname)                                     \
  301         do {                                                    \
  302             struct mly_qstat *qs = &(sc)->mly_qstat[qname];     \
  303                                                                 \
  304             qs->q_length++;                                     \
  305             if (qs->q_length > qs->q_max)                       \
  306                 qs->q_max = qs->q_length;                       \
  307         } while(0)
  308 
  309 #define MLYQ_REMOVE(sc, qname)    (sc)->mly_qstat[qname].q_length--
  310 #define MLYQ_INIT(sc, qname)                    \
  311         do {                                    \
  312             sc->mly_qstat[qname].q_length = 0;  \
  313             sc->mly_qstat[qname].q_max = 0;     \
  314         } while(0)
  315 
  316 
  317 #define MLYQ_COMMAND_QUEUE(name, index)                                 \
  318 static __inline void                                                    \
  319 mly_initq_ ## name (struct mly_softc *sc)                               \
  320 {                                                                       \
  321     TAILQ_INIT(&sc->mly_ ## name);                                      \
  322     MLYQ_INIT(sc, index);                                               \
  323 }                                                                       \
  324 static __inline void                                                    \
  325 mly_enqueue_ ## name (struct mly_command *mc)                           \
  326 {                                                                       \
  327     int         s;                                                      \
  328                                                                         \
  329     s = splcam();                                                       \
  330     TAILQ_INSERT_TAIL(&mc->mc_sc->mly_ ## name, mc, mc_link);           \
  331     MLYQ_ADD(mc->mc_sc, index);                                         \
  332     splx(s);                                                            \
  333 }                                                                       \
  334 static __inline void                                                    \
  335 mly_requeue_ ## name (struct mly_command *mc)                           \
  336 {                                                                       \
  337     int         s;                                                      \
  338                                                                         \
  339     s = splcam();                                                       \
  340     TAILQ_INSERT_HEAD(&mc->mc_sc->mly_ ## name, mc, mc_link);           \
  341     MLYQ_ADD(mc->mc_sc, index);                                         \
  342     splx(s);                                                            \
  343 }                                                                       \
  344 static __inline struct mly_command *                                    \
  345 mly_dequeue_ ## name (struct mly_softc *sc)                             \
  346 {                                                                       \
  347     struct mly_command  *mc;                                            \
  348     int                 s;                                              \
  349                                                                         \
  350     s = splcam();                                                       \
  351     if ((mc = TAILQ_FIRST(&sc->mly_ ## name)) != NULL) {                \
  352         TAILQ_REMOVE(&sc->mly_ ## name, mc, mc_link);                   \
  353         MLYQ_REMOVE(sc, index);                                         \
  354     }                                                                   \
  355     splx(s);                                                            \
  356     return(mc);                                                         \
  357 }                                                                       \
  358 static __inline void                                                    \
  359 mly_remove_ ## name (struct mly_command *mc)                            \
  360 {                                                                       \
  361     int                 s;                                              \
  362                                                                         \
  363     s = splcam();                                                       \
  364     TAILQ_REMOVE(&mc->mc_sc->mly_ ## name, mc, mc_link);                \
  365     MLYQ_REMOVE(mc->mc_sc, index);                                      \
  366     splx(s);                                                            \
  367 }                                                                       \
  368 struct hack
  369 
  370 MLYQ_COMMAND_QUEUE(free, MLYQ_FREE);
  371 MLYQ_COMMAND_QUEUE(busy, MLYQ_BUSY);
  372 MLYQ_COMMAND_QUEUE(complete, MLYQ_COMPLETE);
  373 
  374 /********************************************************************************
  375  * space-fill a character string
  376  */
  377 static __inline void
  378 padstr(char *targ, char *src, int len)
  379 {
  380     while (len-- > 0) {
  381         if (*src != 0) {
  382             *targ++ = *src++;
  383         } else {
  384             *targ++ = ' ';
  385         }
  386     }
  387 }

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