1 /*-
2 * Copyright 2000-2020 Broadcom Inc. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. Neither the name of the author nor the names of any co-contributors
13 * may be used to endorse or promote products derived from this software
14 * without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD
29 *
30 * $FreeBSD$
31 */
32
33 /*
34 * Copyright 2000-2020 Broadcom Inc. All rights reserved.
35 *
36 *
37 * Name: mpi2_pci.h
38 * Title: MPI PCIe Attached Devices structures and definitions.
39 * Creation Date: October 9, 2012
40 *
41 * mpi2_pci.h Version: 02.00.03
42 *
43 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
44 * prefix are for use only on MPI v2.5 products, and must not be used
45 * with MPI v2.0 products. Unless otherwise noted, names beginning with
46 * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
47 *
48 * Version History
49 * ---------------
50 *
51 * Date Version Description
52 * -------- -------- ------------------------------------------------------
53 * 03-16-15 02.00.00 Initial version.
54 * 02-17-16 02.00.01 Removed AHCI support.
55 * Removed SOP support.
56 * 07-01-16 02.00.02 Added MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP to
57 * NVME Encapsulated Request.
58 * 07-22-18 02.00.03 Updted flags field for NVME Encapsulated req
59 * --------------------------------------------------------------------------
60 */
61
62 #ifndef MPI2_PCI_H
63 #define MPI2_PCI_H
64
65 /*
66 * Values for the PCIe DeviceInfo field used in PCIe Device Status Change Event
67 * data and PCIe Configuration pages.
68 */
69 #define MPI26_PCIE_DEVINFO_DIRECT_ATTACH (0x00000010)
70
71 #define MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE (0x0000000F)
72 #define MPI26_PCIE_DEVINFO_NO_DEVICE (0x00000000)
73 #define MPI26_PCIE_DEVINFO_PCI_SWITCH (0x00000001)
74 #define MPI26_PCIE_DEVINFO_NVME (0x00000003)
75
76 /****************************************************************************
77 * NVMe Encapsulated message
78 ****************************************************************************/
79
80 /* NVME Encapsulated Request Message */
81 typedef struct _MPI26_NVME_ENCAPSULATED_REQUEST
82 {
83 U16 DevHandle; /* 0x00 */
84 U8 ChainOffset; /* 0x02 */
85 U8 Function; /* 0x03 */
86 U16 EncapsulatedCommandLength; /* 0x04 */
87 U8 Reserved1; /* 0x06 */
88 U8 MsgFlags; /* 0x07 */
89 U8 VP_ID; /* 0x08 */
90 U8 VF_ID; /* 0x09 */
91 U16 Reserved2; /* 0x0A */
92 U32 Reserved3; /* 0x0C */
93 U64 ErrorResponseBaseAddress; /* 0x10 */
94 U16 ErrorResponseAllocationLength; /* 0x18 */
95 U16 Flags; /* 0x1A */
96 U32 DataLength; /* 0x1C */
97 U8 NVMe_Command[4]; /* 0x20 */ /* variable length */
98
99 } MPI26_NVME_ENCAPSULATED_REQUEST, MPI2_POINTER PTR_MPI26_NVME_ENCAPSULATED_REQUEST,
100 Mpi26NVMeEncapsulatedRequest_t, MPI2_POINTER pMpi26NVMeEncapsulatedRequest_t;
101
102 /* defines for the Flags field */
103 #define MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP (0x0020)
104 /* Submission Queue Type*/
105 #define MPI26_NVME_FLAGS_SUBMISSIONQ_MASK (0x0010)
106 #define MPI26_NVME_FLAGS_SUBMISSIONQ_IO (0x0000)
107 #define MPI26_NVME_FLAGS_SUBMISSIONQ_ADMIN (0x0010)
108 /* Error Response Address Space */
109 #define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR (0x000C)
110 #define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR_MASK (0x000C)
111 #define MPI26_NVME_FLAGS_SYSTEM_RSP_ADDR (0x0000)
112 #define MPI26_NVME_FLAGS_IOCCTL_RSP_ADDR (0x0008)
113 /* Data Direction*/
114 #define MPI26_NVME_FLAGS_DATADIRECTION_MASK (0x0003)
115 #define MPI26_NVME_FLAGS_NODATATRANSFER (0x0000)
116 #define MPI26_NVME_FLAGS_WRITE (0x0001)
117 #define MPI26_NVME_FLAGS_READ (0x0002)
118 #define MPI26_NVME_FLAGS_BIDIRECTIONAL (0x0003)
119
120 /* NVMe Encapuslated Reply Message */
121 typedef struct _MPI26_NVME_ENCAPSULATED_ERROR_REPLY
122 {
123 U16 DevHandle; /* 0x00 */
124 U8 MsgLength; /* 0x02 */
125 U8 Function; /* 0x03 */
126 U16 EncapsulatedCommandLength; /* 0x04 */
127 U8 Reserved1; /* 0x06 */
128 U8 MsgFlags; /* 0x07 */
129 U8 VP_ID; /* 0x08 */
130 U8 VF_ID; /* 0x09 */
131 U16 Reserved2; /* 0x0A */
132 U16 Reserved3; /* 0x0C */
133 U16 IOCStatus; /* 0x0E */
134 U32 IOCLogInfo; /* 0x10 */
135 U16 ErrorResponseCount; /* 0x14 */
136 U16 Reserved4; /* 0x16 */
137 } MPI26_NVME_ENCAPSULATED_ERROR_REPLY,
138 MPI2_POINTER PTR_MPI26_NVME_ENCAPSULATED_ERROR_REPLY,
139 Mpi26NVMeEncapsulatedErrorReply_t,
140 MPI2_POINTER pMpi26NVMeEncapsulatedErrorReply_t;
141
142 #endif
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