Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/mpr/mpr_pci.c
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1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */ 31 32 /* TODO Move headers to mprvar */ 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/conf.h> 40 #include <sys/malloc.h> 41 #include <sys/sysctl.h> 42 #include <sys/uio.h> 43 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 #include <sys/rman.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pci_private.h> 51 52 #include <dev/mpr/mpi/mpi2_type.h> 53 #include <dev/mpr/mpi/mpi2.h> 54 #include <dev/mpr/mpi/mpi2_ioc.h> 55 #include <dev/mpr/mpi/mpi2_cnfg.h> 56 #include <dev/mpr/mpi/mpi2_tool.h> 57 #include <dev/mpr/mpi/mpi2_pci.h> 58 59 #include <sys/queue.h> 60 #include <sys/kthread.h> 61 #include <dev/mpr/mpr_ioctl.h> 62 #include <dev/mpr/mprvar.h> 63 64 static int mpr_pci_probe(device_t); 65 static int mpr_pci_attach(device_t); 66 static int mpr_pci_detach(device_t); 67 static int mpr_pci_suspend(device_t); 68 static int mpr_pci_resume(device_t); 69 static void mpr_pci_free(struct mpr_softc *); 70 static int mpr_alloc_msix(struct mpr_softc *sc, int msgs); 71 static int mpr_alloc_msi(struct mpr_softc *sc, int msgs); 72 static int mpr_pci_alloc_interrupts(struct mpr_softc *sc); 73 74 static device_method_t mpr_methods[] = { 75 DEVMETHOD(device_probe, mpr_pci_probe), 76 DEVMETHOD(device_attach, mpr_pci_attach), 77 DEVMETHOD(device_detach, mpr_pci_detach), 78 DEVMETHOD(device_suspend, mpr_pci_suspend), 79 DEVMETHOD(device_resume, mpr_pci_resume), 80 DEVMETHOD(bus_print_child, bus_generic_print_child), 81 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 82 { 0, 0 } 83 }; 84 85 static driver_t mpr_pci_driver = { 86 "mpr", 87 mpr_methods, 88 sizeof(struct mpr_softc) 89 }; 90 91 static devclass_t mpr_devclass; 92 DRIVER_MODULE(mpr, pci, mpr_pci_driver, mpr_devclass, 0, 0); 93 MODULE_DEPEND(mpr, cam, 1, 1, 1); 94 95 struct mpr_ident { 96 uint16_t vendor; 97 uint16_t device; 98 uint16_t subvendor; 99 uint16_t subdevice; 100 u_int flags; 101 const char *desc; 102 } mpr_identifiers[] = { 103 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004, 104 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" }, 105 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008, 106 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" }, 107 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1, 108 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" }, 109 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2, 110 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" }, 111 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5, 112 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" }, 113 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6, 114 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" }, 115 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216, 116 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" }, 117 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224, 118 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" }, 119 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1, 120 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" }, 121 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2, 122 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" }, 123 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1, 124 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" }, 125 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2, 126 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" }, 127 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3408, 128 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 129 "Avago Technologies (LSI) SAS3408" }, 130 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3416, 131 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 132 "Avago Technologies (LSI) SAS3416" }, 133 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508, 134 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 135 "Avago Technologies (LSI) SAS3508" }, 136 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508_1, 137 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 138 "Avago Technologies (LSI) SAS3508_1" }, 139 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516, 140 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 141 "Avago Technologies (LSI) SAS3516" }, 142 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516_1, 143 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 144 "Avago Technologies (LSI) SAS3516_1" }, 145 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616, 146 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 147 "Avago Technologies (LSI) SAS3616" }, 148 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3708, 149 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 150 "Avago Technologies (LSI) SAS3708" }, 151 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3716, 152 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 153 "Avago Technologies (LSI) SAS3716" }, 154 { 0, 0, 0, 0, 0, NULL } 155 }; 156 157 static struct mpr_ident * 158 mpr_find_ident(device_t dev) 159 { 160 struct mpr_ident *m; 161 162 for (m = mpr_identifiers; m->vendor != 0; m++) { 163 if (m->vendor != pci_get_vendor(dev)) 164 continue; 165 if (m->device != pci_get_device(dev)) 166 continue; 167 if ((m->subvendor != 0xffff) && 168 (m->subvendor != pci_get_subvendor(dev))) 169 continue; 170 if ((m->subdevice != 0xffff) && 171 (m->subdevice != pci_get_subdevice(dev))) 172 continue; 173 return (m); 174 } 175 176 return (NULL); 177 } 178 179 static int 180 mpr_pci_probe(device_t dev) 181 { 182 struct mpr_ident *id; 183 184 if ((id = mpr_find_ident(dev)) != NULL) { 185 device_set_desc(dev, id->desc); 186 return (BUS_PROBE_DEFAULT); 187 } 188 return (ENXIO); 189 } 190 191 static int 192 mpr_pci_attach(device_t dev) 193 { 194 struct mpr_softc *sc; 195 struct mpr_ident *m; 196 int error, i; 197 198 sc = device_get_softc(dev); 199 bzero(sc, sizeof(*sc)); 200 sc->mpr_dev = dev; 201 m = mpr_find_ident(dev); 202 sc->mpr_flags = m->flags; 203 204 mpr_get_tunables(sc); 205 206 /* Twiddle basic PCI config bits for a sanity check */ 207 pci_enable_busmaster(dev); 208 209 for (i = 0; i < PCI_MAXMAPS_0; i++) { 210 sc->mpr_regs_rid = PCIR_BAR(i); 211 212 if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev, 213 SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) != NULL) 214 break; 215 } 216 217 if (sc->mpr_regs_resource == NULL) { 218 mpr_printf(sc, "Cannot allocate PCI registers\n"); 219 return (ENXIO); 220 } 221 222 sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource); 223 sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource); 224 225 /* Allocate the parent DMA tag */ 226 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */ 227 1, 0, /* algnmnt, boundary */ 228 BUS_SPACE_MAXADDR, /* lowaddr */ 229 BUS_SPACE_MAXADDR, /* highaddr */ 230 NULL, NULL, /* filter, filterarg */ 231 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 232 BUS_SPACE_UNRESTRICTED, /* nsegments */ 233 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 234 0, /* flags */ 235 NULL, NULL, /* lockfunc, lockarg */ 236 &sc->mpr_parent_dmat)) { 237 mpr_printf(sc, "Cannot allocate parent DMA tag\n"); 238 mpr_pci_free(sc); 239 return (ENOMEM); 240 } 241 242 if (((error = mpr_pci_alloc_interrupts(sc)) != 0) || 243 ((error = mpr_attach(sc)) != 0)) 244 mpr_pci_free(sc); 245 246 return (error); 247 } 248 249 /* 250 * Allocate, but don't assign interrupts early. Doing it before requesting 251 * the IOCFacts message informs the firmware that we want to do MSI-X 252 * multiqueue. We might not use all of the available messages, but there's 253 * no reason to re-alloc if we don't. 254 */ 255 int 256 mpr_pci_alloc_interrupts(struct mpr_softc *sc) 257 { 258 device_t dev; 259 int error, msgs; 260 261 dev = sc->mpr_dev; 262 error = 0; 263 msgs = 0; 264 265 if (sc->disable_msix == 0) { 266 msgs = pci_msix_count(dev); 267 if (msgs >= MPR_MSI_COUNT) 268 error = mpr_alloc_msix(sc, MPR_MSI_COUNT); 269 } 270 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) { 271 msgs = pci_msi_count(dev); 272 if (msgs >= MPR_MSI_COUNT) 273 error = mpr_alloc_msi(sc, MPR_MSI_COUNT); 274 } 275 if (error != 0) 276 msgs = 0; 277 278 sc->msi_msgs = msgs; 279 return (error); 280 } 281 282 int 283 mpr_pci_setup_interrupts(struct mpr_softc *sc) 284 { 285 device_t dev; 286 int i, error; 287 288 dev = sc->mpr_dev; 289 error = ENXIO; 290 291 if (sc->msi_msgs == 0) { 292 sc->mpr_flags |= MPR_FLAGS_INTX; 293 sc->mpr_irq_rid[0] = 0; 294 sc->mpr_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ, 295 &sc->mpr_irq_rid[0], RF_SHAREABLE | RF_ACTIVE); 296 if (sc->mpr_irq[0] == NULL) { 297 mpr_printf(sc, "Cannot allocate INTx interrupt\n"); 298 return (ENXIO); 299 } 300 error = bus_setup_intr(dev, sc->mpr_irq[0], 301 INTR_TYPE_BIO | INTR_MPSAFE, NULL, mpr_intr, sc, 302 &sc->mpr_intrhand[0]); 303 if (error) 304 mpr_printf(sc, "Cannot setup INTx interrupt\n"); 305 } else { 306 sc->mpr_flags |= MPR_FLAGS_MSI; 307 for (i = 0; i < MPR_MSI_COUNT; i++) { 308 sc->mpr_irq_rid[i] = i + 1; 309 sc->mpr_irq[i] = bus_alloc_resource_any(dev, 310 SYS_RES_IRQ, &sc->mpr_irq_rid[i], RF_ACTIVE); 311 if (sc->mpr_irq[i] == NULL) { 312 mpr_printf(sc, 313 "Cannot allocate MSI interrupt\n"); 314 return (ENXIO); 315 } 316 error = bus_setup_intr(dev, sc->mpr_irq[i], 317 INTR_TYPE_BIO | INTR_MPSAFE, NULL, mpr_intr_msi, 318 sc, &sc->mpr_intrhand[i]); 319 if (error) { 320 mpr_printf(sc, 321 "Cannot setup MSI interrupt %d\n", i); 322 break; 323 } 324 } 325 } 326 327 return (error); 328 } 329 330 static int 331 mpr_pci_detach(device_t dev) 332 { 333 struct mpr_softc *sc; 334 int error; 335 336 sc = device_get_softc(dev); 337 338 if ((error = mpr_free(sc)) != 0) 339 return (error); 340 341 mpr_pci_free(sc); 342 return (0); 343 } 344 345 static void 346 mpr_pci_free(struct mpr_softc *sc) 347 { 348 int i; 349 350 if (sc->mpr_parent_dmat != NULL) { 351 bus_dma_tag_destroy(sc->mpr_parent_dmat); 352 } 353 354 if (sc->mpr_flags & MPR_FLAGS_MSI) { 355 for (i = 0; i < MPR_MSI_COUNT; i++) { 356 if (sc->mpr_irq[i] != NULL) { 357 bus_teardown_intr(sc->mpr_dev, sc->mpr_irq[i], 358 sc->mpr_intrhand[i]); 359 bus_release_resource(sc->mpr_dev, SYS_RES_IRQ, 360 sc->mpr_irq_rid[i], sc->mpr_irq[i]); 361 } 362 } 363 pci_release_msi(sc->mpr_dev); 364 } 365 366 if (sc->mpr_flags & MPR_FLAGS_INTX) { 367 bus_teardown_intr(sc->mpr_dev, sc->mpr_irq[0], 368 sc->mpr_intrhand[0]); 369 bus_release_resource(sc->mpr_dev, SYS_RES_IRQ, 370 sc->mpr_irq_rid[0], sc->mpr_irq[0]); 371 } 372 373 if (sc->mpr_regs_resource != NULL) { 374 bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY, 375 sc->mpr_regs_rid, sc->mpr_regs_resource); 376 } 377 378 return; 379 } 380 381 static int 382 mpr_pci_suspend(device_t dev) 383 { 384 return (EINVAL); 385 } 386 387 static int 388 mpr_pci_resume(device_t dev) 389 { 390 return (EINVAL); 391 } 392 393 static int 394 mpr_alloc_msix(struct mpr_softc *sc, int msgs) 395 { 396 int error; 397 398 error = pci_alloc_msix(sc->mpr_dev, &msgs); 399 return (error); 400 } 401 402 static int 403 mpr_alloc_msi(struct mpr_softc *sc, int msgs) 404 { 405 int error; 406 407 error = pci_alloc_msi(sc->mpr_dev, &msgs); 408 return (error); 409 } 410 411 int 412 mpr_pci_restore(struct mpr_softc *sc) 413 { 414 struct pci_devinfo *dinfo; 415 416 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 417 418 dinfo = device_get_ivars(sc->mpr_dev); 419 if (dinfo == NULL) { 420 mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__); 421 return (EINVAL); 422 } 423 424 pci_cfg_restore(sc->mpr_dev, dinfo); 425 return (0); 426 } 427
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