Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/mps/mps_pci.c
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1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT2 controllers */ 33 34 /* TODO Move headers to mpsvar */ 35 #include <sys/types.h> 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/module.h> 40 #include <sys/bus.h> 41 #include <sys/conf.h> 42 #include <sys/malloc.h> 43 #include <sys/sysctl.h> 44 #include <sys/uio.h> 45 46 #include <machine/bus.h> 47 #include <machine/resource.h> 48 #include <sys/rman.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 #include <dev/pci/pci_private.h> 53 54 #include <dev/mps/mpi/mpi2_type.h> 55 #include <dev/mps/mpi/mpi2.h> 56 #include <dev/mps/mpi/mpi2_ioc.h> 57 #include <dev/mps/mpi/mpi2_cnfg.h> 58 #include <dev/mps/mpi/mpi2_tool.h> 59 60 #include <sys/queue.h> 61 #include <sys/kthread.h> 62 #include <dev/mps/mps_ioctl.h> 63 #include <dev/mps/mpsvar.h> 64 65 static int mps_pci_probe(device_t); 66 static int mps_pci_attach(device_t); 67 static int mps_pci_detach(device_t); 68 static int mps_pci_suspend(device_t); 69 static int mps_pci_resume(device_t); 70 static void mps_pci_free(struct mps_softc *); 71 static int mps_alloc_msix(struct mps_softc *sc, int msgs); 72 static int mps_alloc_msi(struct mps_softc *sc, int msgs); 73 static int mps_pci_alloc_interrupts(struct mps_softc *sc); 74 75 static device_method_t mps_methods[] = { 76 DEVMETHOD(device_probe, mps_pci_probe), 77 DEVMETHOD(device_attach, mps_pci_attach), 78 DEVMETHOD(device_detach, mps_pci_detach), 79 DEVMETHOD(device_suspend, mps_pci_suspend), 80 DEVMETHOD(device_resume, mps_pci_resume), 81 82 DEVMETHOD_END 83 }; 84 85 static driver_t mps_pci_driver = { 86 "mps", 87 mps_methods, 88 sizeof(struct mps_softc) 89 }; 90 91 struct mps_ident { 92 uint16_t vendor; 93 uint16_t device; 94 uint16_t subvendor; 95 uint16_t subdevice; 96 u_int flags; 97 const char *desc; 98 } mps_identifiers[] = { 99 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004, 100 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2004" }, 101 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008, 102 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2008" }, 103 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1, 104 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 105 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2, 106 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 107 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3, 108 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 109 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1, 110 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" }, 111 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2, 112 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" }, 113 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1, 114 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 115 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2, 116 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 117 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3, 118 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 119 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4, 120 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 121 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5, 122 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 123 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6, 124 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 125 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1, 126 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 127 // Add Customer specific vender/subdevice id before generic 128 // (0xffff) vender/subdevice id. 129 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 130 0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" }, 131 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 132 0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" }, 133 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 134 0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" }, 135 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 136 0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" }, 137 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 138 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 139 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3, 140 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 141 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200, 142 0xffff, 0xffff, 0, "Avago Technologies (LSI) SSS6200" }, 143 { 0, 0, 0, 0, 0, NULL } 144 }; 145 146 DRIVER_MODULE(mps, pci, mps_pci_driver, 0, 0); 147 MODULE_DEPEND(mps, cam, 1, 1, 1); 148 MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice", pci, mps, 149 mps_identifiers, nitems(mps_identifiers) - 1); 150 static struct mps_ident * 151 mps_find_ident(device_t dev) 152 { 153 struct mps_ident *m; 154 155 for (m = mps_identifiers; m->vendor != 0; m++) { 156 if (m->vendor != pci_get_vendor(dev)) 157 continue; 158 if (m->device != pci_get_device(dev)) 159 continue; 160 if ((m->subvendor != 0xffff) && 161 (m->subvendor != pci_get_subvendor(dev))) 162 continue; 163 if ((m->subdevice != 0xffff) && 164 (m->subdevice != pci_get_subdevice(dev))) 165 continue; 166 return (m); 167 } 168 169 return (NULL); 170 } 171 172 static int 173 mps_pci_probe(device_t dev) 174 { 175 struct mps_ident *id; 176 177 if ((id = mps_find_ident(dev)) != NULL) { 178 device_set_desc(dev, id->desc); 179 return (BUS_PROBE_DEFAULT); 180 } 181 return (ENXIO); 182 } 183 184 static int 185 mps_pci_attach(device_t dev) 186 { 187 bus_dma_template_t t; 188 struct mps_softc *sc; 189 struct mps_ident *m; 190 int error; 191 192 sc = device_get_softc(dev); 193 bzero(sc, sizeof(*sc)); 194 sc->mps_dev = dev; 195 m = mps_find_ident(dev); 196 sc->mps_flags = m->flags; 197 198 mps_get_tunables(sc); 199 200 /* Twiddle basic PCI config bits for a sanity check */ 201 pci_enable_busmaster(dev); 202 203 /* Allocate the System Interface Register Set */ 204 sc->mps_regs_rid = PCIR_BAR(1); 205 if ((sc->mps_regs_resource = bus_alloc_resource_any(dev, 206 SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) { 207 mps_printf(sc, "Cannot allocate PCI registers\n"); 208 return (ENXIO); 209 } 210 sc->mps_btag = rman_get_bustag(sc->mps_regs_resource); 211 sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource); 212 213 /* Allocate the parent DMA tag */ 214 bus_dma_template_init(&t, bus_get_dma_tag(dev)); 215 if (bus_dma_template_tag(&t, &sc->mps_parent_dmat)) { 216 mps_printf(sc, "Cannot allocate parent DMA tag\n"); 217 mps_pci_free(sc); 218 return (ENOMEM); 219 } 220 221 if (((error = mps_pci_alloc_interrupts(sc)) != 0) || 222 ((error = mps_attach(sc)) != 0)) 223 mps_pci_free(sc); 224 225 return (error); 226 } 227 228 /* 229 * Allocate, but don't assign interrupts early. Doing it before requesting 230 * the IOCFacts message informs the firmware that we want to do MSI-X 231 * multiqueue. We might not use all of the available messages, but there's 232 * no reason to re-alloc if we don't. 233 */ 234 static int 235 mps_pci_alloc_interrupts(struct mps_softc *sc) 236 { 237 device_t dev; 238 int error, msgs; 239 240 dev = sc->mps_dev; 241 error = 0; 242 msgs = 0; 243 244 if (sc->disable_msix == 0) { 245 msgs = pci_msix_count(dev); 246 mps_dprint(sc, MPS_INIT, "Counted %d MSI-X messages\n", msgs); 247 msgs = min(msgs, sc->max_msix); 248 msgs = min(msgs, MPS_MSIX_MAX); 249 msgs = min(msgs, 1); /* XXX */ 250 if (msgs != 0) { 251 mps_dprint(sc, MPS_INIT, "Attempting to allocate %d " 252 "MSI-X messages\n", msgs); 253 error = mps_alloc_msix(sc, msgs); 254 } 255 } 256 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) { 257 msgs = pci_msi_count(dev); 258 mps_dprint(sc, MPS_INIT, "Counted %d MSI messages\n", msgs); 259 msgs = min(msgs, MPS_MSI_MAX); 260 if (msgs != 0) { 261 mps_dprint(sc, MPS_INIT, "Attempting to allocate %d " 262 "MSI messages\n", MPS_MSI_MAX); 263 error = mps_alloc_msi(sc, MPS_MSI_MAX); 264 } 265 } 266 if ((error != 0) || (msgs == 0)) { 267 /* 268 * If neither MSI or MSI-X are avaiable, assume legacy INTx. 269 * This also implies that there will be only 1 queue. 270 */ 271 mps_dprint(sc, MPS_INIT, "Falling back to legacy INTx\n"); 272 sc->mps_flags |= MPS_FLAGS_INTX; 273 msgs = 1; 274 } else 275 sc->mps_flags |= MPS_FLAGS_MSI; 276 277 sc->msi_msgs = msgs; 278 mps_dprint(sc, MPS_INIT, "Allocated %d interrupts\n", msgs); 279 280 return (error); 281 } 282 283 int 284 mps_pci_setup_interrupts(struct mps_softc *sc) 285 { 286 device_t dev; 287 struct mps_queue *q; 288 void *ihandler; 289 int i, error, rid, initial_rid; 290 291 dev = sc->mps_dev; 292 error = ENXIO; 293 294 if (sc->mps_flags & MPS_FLAGS_INTX) { 295 initial_rid = 0; 296 ihandler = mps_intr; 297 } else if (sc->mps_flags & MPS_FLAGS_MSI) { 298 initial_rid = 1; 299 ihandler = mps_intr_msi; 300 } else { 301 mps_dprint(sc, MPS_ERROR|MPS_INIT, 302 "Unable to set up interrupts\n"); 303 return (EINVAL); 304 } 305 306 for (i = 0; i < sc->msi_msgs; i++) { 307 q = &sc->queues[i]; 308 rid = i + initial_rid; 309 q->irq_rid = rid; 310 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 311 &q->irq_rid, RF_ACTIVE); 312 if (q->irq == NULL) { 313 mps_dprint(sc, MPS_ERROR|MPS_INIT, 314 "Cannot allocate interrupt RID %d\n", rid); 315 sc->msi_msgs = i; 316 break; 317 } 318 error = bus_setup_intr(dev, q->irq, 319 INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler, 320 sc, &q->intrhand); 321 if (error) { 322 mps_dprint(sc, MPS_ERROR|MPS_INIT, 323 "Cannot setup interrupt RID %d\n", rid); 324 sc->msi_msgs = i; 325 break; 326 } 327 } 328 329 mps_dprint(sc, MPS_INIT, "Set up %d interrupts\n", sc->msi_msgs); 330 331 return (error); 332 } 333 334 static int 335 mps_pci_detach(device_t dev) 336 { 337 struct mps_softc *sc; 338 int error; 339 340 sc = device_get_softc(dev); 341 342 if ((error = mps_free(sc)) != 0) 343 return (error); 344 345 mps_pci_free(sc); 346 return (0); 347 } 348 349 void 350 mps_pci_free_interrupts(struct mps_softc *sc) 351 { 352 struct mps_queue *q; 353 int i; 354 355 if (sc->queues == NULL) 356 return; 357 358 for (i = 0; i < sc->msi_msgs; i++) { 359 q = &sc->queues[i]; 360 if (q->irq != NULL) { 361 bus_teardown_intr(sc->mps_dev, q->irq, 362 q->intrhand); 363 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, 364 q->irq_rid, q->irq); 365 } 366 } 367 } 368 369 static void 370 mps_pci_free(struct mps_softc *sc) 371 { 372 373 if (sc->mps_parent_dmat != NULL) { 374 bus_dma_tag_destroy(sc->mps_parent_dmat); 375 } 376 377 mps_pci_free_interrupts(sc); 378 379 if (sc->mps_flags & MPS_FLAGS_MSI) 380 pci_release_msi(sc->mps_dev); 381 382 if (sc->mps_regs_resource != NULL) { 383 bus_release_resource(sc->mps_dev, SYS_RES_MEMORY, 384 sc->mps_regs_rid, sc->mps_regs_resource); 385 } 386 387 return; 388 } 389 390 static int 391 mps_pci_suspend(device_t dev) 392 { 393 return (EINVAL); 394 } 395 396 static int 397 mps_pci_resume(device_t dev) 398 { 399 return (EINVAL); 400 } 401 402 static int 403 mps_alloc_msix(struct mps_softc *sc, int msgs) 404 { 405 int error; 406 407 error = pci_alloc_msix(sc->mps_dev, &msgs); 408 return (error); 409 } 410 411 static int 412 mps_alloc_msi(struct mps_softc *sc, int msgs) 413 { 414 int error; 415 416 error = pci_alloc_msi(sc->mps_dev, &msgs); 417 return (error); 418 } 419 420 int 421 mps_pci_restore(struct mps_softc *sc) 422 { 423 struct pci_devinfo *dinfo; 424 425 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 426 427 dinfo = device_get_ivars(sc->mps_dev); 428 if (dinfo == NULL) { 429 mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__); 430 return (EINVAL); 431 } 432 433 pci_cfg_restore(sc->mps_dev, dinfo); 434 return (0); 435 }
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