The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mps/mps_pci.c

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    1 /*-
    2  * Copyright (c) 2009 Yahoo! Inc.
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/9.0/sys/dev/mps/mps_pci.c 216088 2010-11-30 22:39:46Z ken $");
   29 
   30 /* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */
   31 
   32 #include <sys/types.h>
   33 #include <sys/param.h>
   34 #include <sys/systm.h>
   35 #include <sys/kernel.h>
   36 #include <sys/module.h>
   37 #include <sys/bus.h>
   38 #include <sys/conf.h>
   39 #include <sys/malloc.h>
   40 #include <sys/sysctl.h>
   41 #include <sys/uio.h>
   42 
   43 #include <machine/bus.h>
   44 #include <machine/resource.h>
   45 #include <sys/rman.h>
   46 
   47 #include <dev/pci/pcireg.h>
   48 #include <dev/pci/pcivar.h>
   49 
   50 #include <dev/mps/mpi/mpi2_type.h>
   51 #include <dev/mps/mpi/mpi2.h>
   52 #include <dev/mps/mpi/mpi2_ioc.h>
   53 #include <dev/mps/mpi/mpi2_cnfg.h>
   54 
   55 #include <dev/mps/mpsvar.h>
   56 
   57 static int      mps_pci_probe(device_t);
   58 static int      mps_pci_attach(device_t);
   59 static int      mps_pci_detach(device_t);
   60 static int      mps_pci_suspend(device_t);
   61 static int      mps_pci_resume(device_t);
   62 static void     mps_pci_free(struct mps_softc *);
   63 static int      mps_alloc_msix(struct mps_softc *sc, int msgs);
   64 static int      mps_alloc_msi(struct mps_softc *sc, int msgs);
   65 
   66 int mps_disable_msix = 0;
   67 TUNABLE_INT("hw.mps.disable_msix", &mps_disable_msix);
   68 SYSCTL_INT(_hw_mps, OID_AUTO, disable_msix, CTLFLAG_RD, &mps_disable_msix, 0,
   69     "Disable MSIX interrupts\n");
   70 int mps_disable_msi = 0;
   71 TUNABLE_INT("hw.mps.disable_msi", &mps_disable_msi);
   72 SYSCTL_INT(_hw_mps, OID_AUTO, disable_msi, CTLFLAG_RD, &mps_disable_msi, 0,
   73     "Disable MSI interrupts\n");
   74 
   75 static device_method_t mps_methods[] = {
   76         DEVMETHOD(device_probe,         mps_pci_probe),
   77         DEVMETHOD(device_attach,        mps_pci_attach),
   78         DEVMETHOD(device_detach,        mps_pci_detach),
   79         DEVMETHOD(device_suspend,       mps_pci_suspend),
   80         DEVMETHOD(device_resume,        mps_pci_resume),
   81         DEVMETHOD(bus_print_child,      bus_generic_print_child),
   82         DEVMETHOD(bus_driver_added,     bus_generic_driver_added),
   83         { 0, 0 }
   84 };
   85 
   86 static driver_t mps_pci_driver = {
   87         "mps",
   88         mps_methods,
   89         sizeof(struct mps_softc)
   90 };
   91 
   92 static devclass_t       mps_devclass;
   93 DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0);
   94 
   95 struct mps_ident {
   96         uint16_t        vendor;
   97         uint16_t        device;
   98         uint16_t        subvendor;
   99         uint16_t        subdevice;
  100         u_int           flags;
  101         const char      *desc;
  102 } mps_identifiers[] = {
  103         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004,
  104             0xffff, 0xffff, 0, "LSI SAS2004" },
  105         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008,
  106             0xffff, 0xffff, 0, "LSI SAS2008" },
  107         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1,
  108             0xffff, 0xffff, 0, "LSI SAS2108" },
  109         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2,
  110             0xffff, 0xffff, 0, "LSI SAS2108" },
  111         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3,
  112             0xffff, 0xffff, 0, "LSI SAS2108" },
  113         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1,
  114             0xffff, 0xffff, 0, "LSI SAS2116" },
  115         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2,
  116             0xffff, 0xffff, 0, "LSI SAS2116" },
  117         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1,
  118             0xffff, 0xffff, 0, "LSI SAS2208" },
  119         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2,
  120             0xffff, 0xffff, 0, "LSI SAS2208" },
  121         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3,
  122             0xffff, 0xffff, 0, "LSI SAS2208" },
  123         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4,
  124             0xffff, 0xffff, 0, "LSI SAS2208" },
  125         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5,
  126             0xffff, 0xffff, 0, "LSI SAS2208" },
  127         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6,
  128             0xffff, 0xffff, 0, "LSI SAS2208" },
  129         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_7,
  130             0xffff, 0xffff, 0, "LSI SAS2208" },
  131         { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_8,
  132             0xffff, 0xffff, 0, "LSI SAS2208" },
  133         { 0, 0, 0, 0, 0, NULL }
  134 };
  135 
  136 static struct mps_ident *
  137 mps_find_ident(device_t dev)
  138 {
  139         struct mps_ident *m;
  140 
  141         for (m = mps_identifiers; m->vendor != 0; m++) {
  142                 if (m->vendor != pci_get_vendor(dev))
  143                         continue;
  144                 if (m->device != pci_get_device(dev))
  145                         continue;
  146                 if ((m->subvendor != 0xffff) &&
  147                     (m->subvendor != pci_get_subvendor(dev)))
  148                         continue;
  149                 if ((m->subdevice != 0xffff) &&
  150                     (m->subdevice != pci_get_subdevice(dev)))
  151                         continue;
  152                 return (m);
  153         }
  154 
  155         return (NULL);
  156 }
  157 
  158 static int
  159 mps_pci_probe(device_t dev)
  160 {
  161         struct mps_ident *id;
  162 
  163         if ((id = mps_find_ident(dev)) != NULL) {
  164                 device_set_desc(dev, id->desc);
  165                 return (BUS_PROBE_DEFAULT);
  166         }
  167         return (ENXIO);
  168 }
  169 
  170 static int
  171 mps_pci_attach(device_t dev)
  172 {
  173         struct mps_softc *sc;
  174         struct mps_ident *m;
  175         uint16_t command;
  176         int error;
  177 
  178         sc = device_get_softc(dev);
  179         bzero(sc, sizeof(*sc));
  180         sc->mps_dev = dev;
  181         m = mps_find_ident(dev);
  182         sc->mps_flags = m->flags;
  183 
  184         /* Twiddle basic PCI config bits for a sanity check */
  185         command = pci_read_config(dev, PCIR_COMMAND, 2);
  186         command |= PCIM_CMD_BUSMASTEREN;
  187         pci_write_config(dev, PCIR_COMMAND, command, 2);
  188         command = pci_read_config(dev, PCIR_COMMAND, 2);
  189         if ((command & PCIM_CMD_BUSMASTEREN) == 0) {
  190                 device_printf(dev, "Cannot enable PCI busmaster\n");
  191                 return (ENXIO);
  192         }
  193         if ((command & PCIM_CMD_MEMEN) == 0) {
  194                 device_printf(dev, "PCI memory window not available\n");
  195                 return (ENXIO);
  196         }
  197 
  198         /* Allocate the System Interface Register Set */
  199         sc->mps_regs_rid = PCIR_BAR(1);
  200         if ((sc->mps_regs_resource = bus_alloc_resource_any(dev,
  201             SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) {
  202                 device_printf(dev, "Cannot allocate PCI registers\n");
  203                 return (ENXIO);
  204         }
  205         sc->mps_btag = rman_get_bustag(sc->mps_regs_resource);
  206         sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource);
  207 
  208         /* Allocate the parent DMA tag */
  209         if (bus_dma_tag_create( NULL,                   /* parent */
  210                                 1, 0,                   /* algnmnt, boundary */
  211                                 BUS_SPACE_MAXADDR,      /* lowaddr */
  212                                 BUS_SPACE_MAXADDR,      /* highaddr */
  213                                 NULL, NULL,             /* filter, filterarg */
  214                                 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
  215                                 BUS_SPACE_UNRESTRICTED, /* nsegments */
  216                                 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
  217                                 0,                      /* flags */
  218                                 NULL, NULL,             /* lockfunc, lockarg */
  219                                 &sc->mps_parent_dmat)) {
  220                 device_printf(dev, "Cannot allocate parent DMA tag\n");
  221                 mps_pci_free(sc);
  222                 return (ENOMEM);
  223         }
  224 
  225         if ((error = mps_attach(sc)) != 0)
  226                 mps_pci_free(sc);
  227 
  228         return (error);
  229 }
  230 
  231 int
  232 mps_pci_setup_interrupts(struct mps_softc *sc)
  233 {
  234         device_t dev;
  235         int i, error, msgs;
  236 
  237         dev = sc->mps_dev;
  238         error = ENXIO;
  239         if ((mps_disable_msix == 0) &&
  240             ((msgs = pci_msix_count(dev)) >= MPS_MSI_COUNT))
  241                 error = mps_alloc_msix(sc, MPS_MSI_COUNT);
  242         if ((error != 0) && (mps_disable_msi == 0) &&
  243             ((msgs = pci_msi_count(dev)) >= MPS_MSI_COUNT))
  244                 error = mps_alloc_msi(sc, MPS_MSI_COUNT);
  245 
  246         if (error != 0) {
  247                 sc->mps_flags |= MPS_FLAGS_INTX;
  248                 sc->mps_irq_rid[0] = 0;
  249                 sc->mps_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
  250                     &sc->mps_irq_rid[0],  RF_SHAREABLE | RF_ACTIVE);
  251                 if (sc->mps_irq[0] == NULL) {
  252                         device_printf(dev, "Cannot allocate INTx interrupt\n");
  253                         return (ENXIO);
  254                 }
  255                 error = bus_setup_intr(dev, sc->mps_irq[0],
  256                     INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr, sc,
  257                     &sc->mps_intrhand[0]);
  258                 if (error)
  259                         device_printf(dev, "Cannot setup INTx interrupt\n");
  260         } else {
  261                 sc->mps_flags |= MPS_FLAGS_MSI;
  262                 for (i = 0; i < MPS_MSI_COUNT; i++) {
  263                         sc->mps_irq_rid[i] = i + 1;
  264                         sc->mps_irq[i] = bus_alloc_resource_any(dev,
  265                             SYS_RES_IRQ, &sc->mps_irq_rid[i], RF_ACTIVE);
  266                         if (sc->mps_irq[i] == NULL) {
  267                                 device_printf(dev,
  268                                     "Cannot allocate MSI interrupt\n");
  269                                 return (ENXIO);
  270                         }
  271                         error = bus_setup_intr(dev, sc->mps_irq[i],
  272                             INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr_msi,
  273                             sc, &sc->mps_intrhand[i]);
  274                         if (error) {
  275                                 device_printf(dev,
  276                                     "Cannot setup MSI interrupt %d\n", i);
  277                                 break;
  278                         }
  279                 }
  280         }
  281 
  282         return (error);
  283 }
  284 
  285 static int
  286 mps_pci_detach(device_t dev)
  287 {
  288         struct mps_softc *sc;
  289         int error;
  290 
  291         sc = device_get_softc(dev);
  292 
  293         if ((error = mps_free(sc)) != 0)
  294                 return (error);
  295 
  296         mps_pci_free(sc);
  297         return (0);
  298 }
  299 
  300 static void
  301 mps_pci_free(struct mps_softc *sc)
  302 {
  303         int i;
  304 
  305         if (sc->mps_parent_dmat != NULL) {
  306                 bus_dma_tag_destroy(sc->mps_parent_dmat);
  307         }
  308 
  309         if (sc->mps_flags & MPS_FLAGS_MSI) {
  310                 for (i = 0; i < MPS_MSI_COUNT; i++) {
  311                         if (sc->mps_irq[i] != NULL) {
  312                                 bus_teardown_intr(sc->mps_dev, sc->mps_irq[i],
  313                                     sc->mps_intrhand[i]);
  314                                 bus_release_resource(sc->mps_dev, SYS_RES_IRQ,
  315                                     sc->mps_irq_rid[i], sc->mps_irq[i]);
  316                         }
  317                 }
  318                 pci_release_msi(sc->mps_dev);
  319         }
  320 
  321         if (sc->mps_flags & MPS_FLAGS_INTX) {
  322                 bus_teardown_intr(sc->mps_dev, sc->mps_irq[0],
  323                     sc->mps_intrhand[0]);
  324                 bus_release_resource(sc->mps_dev, SYS_RES_IRQ,
  325                     sc->mps_irq_rid[0], sc->mps_irq[0]);
  326         }
  327 
  328         if (sc->mps_regs_resource != NULL) {
  329                 bus_release_resource(sc->mps_dev, SYS_RES_MEMORY,
  330                     sc->mps_regs_rid, sc->mps_regs_resource);
  331         }
  332 
  333         return;
  334 }
  335 
  336 static int
  337 mps_pci_suspend(device_t dev)
  338 {
  339         return (EINVAL);
  340 }
  341 
  342 static int
  343 mps_pci_resume(device_t dev)
  344 {
  345         return (EINVAL);
  346 }
  347 
  348 static int
  349 mps_alloc_msix(struct mps_softc *sc, int msgs)
  350 {
  351         int error;
  352 
  353         error = pci_alloc_msix(sc->mps_dev, &msgs);
  354         return (error);
  355 }
  356 
  357 static int
  358 mps_alloc_msi(struct mps_softc *sc, int msgs)
  359 {
  360         int error;
  361 
  362         error = pci_alloc_msi(sc->mps_dev, &msgs);
  363         return (error);
  364 }
  365 

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