The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/dev/mpt/mpilib/mpi_init.h

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /* $FreeBSD$ */
    2 /*-
    3  * SPDX-License-Identifier: BSD-3-Clause
    4  *
    5  * Copyright (c) 2000-2010, LSI Logic Corporation and its contributors.
    6  * All rights reserved.
    7  * 
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions are
   10  * met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
   14  *    substantially similar to the "NO WARRANTY" disclaimer below
   15  *    ("Disclaimer") and any redistribution must be conditioned upon including
   16  *    a substantially similar Disclaimer requirement for further binary
   17  *    redistribution.
   18  * 3. Neither the name of the LSI Logic Corporation nor the names of its
   19  *    contributors may be used to endorse or promote products derived from
   20  *    this software without specific prior written permission.
   21  * 
   22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   23  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   25  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   26  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
   32  * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   33  *
   34  *           Name:  mpi_init.h
   35  *          Title:  MPI initiator mode messages and structures
   36  *  Creation Date:  June 8, 2000
   37  *
   38  *    mpi_init.h Version:  01.05.09
   39  *
   40  *  Version History
   41  *  ---------------
   42  *
   43  *  Date      Version   Description
   44  *  --------  --------  ------------------------------------------------------
   45  *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
   46  *  05-24-00  00.10.02  Added SenseBufferLength to _MSG_SCSI_IO_REPLY.
   47  *  06-06-00  01.00.01  Update version number for 1.0 release.
   48  *  06-08-00  01.00.02  Added MPI_SCSI_RSP_INFO_ definitions.
   49  *  11-02-00  01.01.01  Original release for post 1.0 work.
   50  *  12-04-00  01.01.02  Added MPI_SCSIIO_CONTROL_NO_DISCONNECT.
   51  *  02-20-01  01.01.03  Started using MPI_POINTER.
   52  *  03-27-01  01.01.04  Added structure offset comments.
   53  *  04-10-01  01.01.05  Added new MsgFlag for MSG_SCSI_TASK_MGMT.
   54  *  08-08-01  01.02.01  Original release for v1.2 work.
   55  *  08-29-01  01.02.02  Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET.
   56  *                      Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for
   57  *                      MSG_SCSI_IO_REPLY.
   58  *  09-28-01  01.02.03  Added structures and defines for SCSI Enclosure
   59  *                      Processor messages.
   60  *  10-04-01  01.02.04  Added defines for SEP request Action field.
   61  *  05-31-02  01.02.05  Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define
   62  *                      for SCSI IO requests.
   63  *  11-15-02  01.02.06  Added special extended SCSI Status defines for FCP.
   64  *  06-26-03  01.02.07  Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define.
   65  *  05-11-04  01.03.01  Original release for MPI v1.3.
   66  *  08-19-04  01.05.01  Added MsgFlags defines for EEDP to SCSI IO request.
   67  *                      Added new word to MSG_SCSI_IO_REPLY to add TaskTag field
   68  *                      and a reserved U16.
   69  *                      Added new MSG_SCSI_IO32_REQUEST structure.
   70  *                      Added a TaskType of Clear Task Set to SCSI
   71  *                      Task Management request.
   72  *  12-07-04  01.05.02  Added support for Task Management Query Task.
   73  *  01-15-05  01.05.03  Modified SCSI Enclosure Processor Request to support
   74  *                      WWID addressing.
   75  *  03-11-05  01.05.04  Removed EEDP flags from SCSI IO Request.
   76  *                      Removed SCSI IO 32 Request.
   77  *                      Modified SCSI Enclosure Processor Request and Reply to
   78  *                      support Enclosure/Slot addressing rather than WWID
   79  *                      addressing.
   80  *  06-24-05  01.05.05  Added SCSI IO 32 structures and defines.
   81  *                      Added four new defines for SEP SlotStatus.
   82  *  08-03-05  01.05.06  Fixed some MPI_SCSIIO32_MSGFLGS_ defines to make them
   83  *                      unique in the first 32 characters.
   84  *  03-27-06  01.05.07  Added Task Management type of Clear ACA.
   85  *  10-11-06  01.05.08  Shortened define for Task Management type of Clear ACA.
   86  *  02-28-07  01.05.09  Defined two new MsgFlags bits for SCSI Task Management
   87  *                      Request: Do Not Send Task IU and Soft Reset Option.
   88  *  --------------------------------------------------------------------------
   89  */
   90 
   91 #ifndef MPI_INIT_H
   92 #define MPI_INIT_H
   93 
   94 /*****************************************************************************
   95 *
   96 *               S C S I    I n i t i a t o r    M e s s a g e s
   97 *
   98 *****************************************************************************/
   99 
  100 /****************************************************************************/
  101 /*  SCSI IO messages and associated structures                              */
  102 /****************************************************************************/
  103 
  104 typedef struct _MSG_SCSI_IO_REQUEST
  105 {
  106     U8                      TargetID;           /* 00h */
  107     U8                      Bus;                /* 01h */
  108     U8                      ChainOffset;        /* 02h */
  109     U8                      Function;           /* 03h */
  110     U8                      CDBLength;          /* 04h */
  111     U8                      SenseBufferLength;  /* 05h */
  112     U8                      Reserved;           /* 06h */
  113     U8                      MsgFlags;           /* 07h */
  114     U32                     MsgContext;         /* 08h */
  115     U8                      LUN[8];             /* 0Ch */
  116     U32                     Control;            /* 14h */
  117     U8                      CDB[16];            /* 18h */
  118     U32                     DataLength;         /* 28h */
  119     U32                     SenseBufferLowAddr; /* 2Ch */
  120     SGE_IO_UNION            SGL;                /* 30h */
  121 } MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST,
  122   SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t;
  123 
  124 /* SCSI IO MsgFlags bits */
  125 
  126 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH              (0x01)
  127 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32           (0x00)
  128 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64           (0x01)
  129 
  130 #define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION           (0x02)
  131 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST           (0x00)
  132 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC            (0x02)
  133 
  134 #define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR  (0x04)
  135 
  136 /* SCSI IO LUN fields */
  137 
  138 #define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING   (0x0000FFFF)
  139 #define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING  (0xFFFF0000)
  140 #define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING   (0x0000FFFF)
  141 #define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING  (0xFFFF0000)
  142 #define MPI_SCSIIO_LUN_LEVEL_1_WORD             (0xFF00)
  143 #define MPI_SCSIIO_LUN_LEVEL_1_DWORD            (0x0000FF00)
  144 
  145 /* SCSI IO Control bits */
  146 
  147 #define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK   (0x03000000)
  148 #define MPI_SCSIIO_CONTROL_NODATATRANSFER       (0x00000000)
  149 #define MPI_SCSIIO_CONTROL_WRITE                (0x01000000)
  150 #define MPI_SCSIIO_CONTROL_READ                 (0x02000000)
  151 
  152 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK       (0x3C000000)
  153 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT      (26)
  154 
  155 #define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK   (0x00000700)
  156 #define MPI_SCSIIO_CONTROL_SIMPLEQ              (0x00000000)
  157 #define MPI_SCSIIO_CONTROL_HEADOFQ              (0x00000100)
  158 #define MPI_SCSIIO_CONTROL_ORDEREDQ             (0x00000200)
  159 #define MPI_SCSIIO_CONTROL_ACAQ                 (0x00000400)
  160 #define MPI_SCSIIO_CONTROL_UNTAGGED             (0x00000500)
  161 #define MPI_SCSIIO_CONTROL_NO_DISCONNECT        (0x00000700)
  162 
  163 #define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK      (0x00FF0000)
  164 #define MPI_SCSIIO_CONTROL_OBSOLETE             (0x00800000)
  165 #define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV        (0x00400000)
  166 #define MPI_SCSIIO_CONTROL_TARGET_RESET         (0x00200000)
  167 #define MPI_SCSIIO_CONTROL_LUN_RESET_RSV        (0x00100000)
  168 #define MPI_SCSIIO_CONTROL_RESERVED             (0x00080000)
  169 #define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV     (0x00040000)
  170 #define MPI_SCSIIO_CONTROL_ABORT_TASK_SET       (0x00020000)
  171 #define MPI_SCSIIO_CONTROL_RESERVED2            (0x00010000)
  172 
  173 /* SCSI IO reply structure */
  174 typedef struct _MSG_SCSI_IO_REPLY
  175 {
  176     U8                      TargetID;           /* 00h */
  177     U8                      Bus;                /* 01h */
  178     U8                      MsgLength;          /* 02h */
  179     U8                      Function;           /* 03h */
  180     U8                      CDBLength;          /* 04h */
  181     U8                      SenseBufferLength;  /* 05h */
  182     U8                      Reserved;           /* 06h */
  183     U8                      MsgFlags;           /* 07h */
  184     U32                     MsgContext;         /* 08h */
  185     U8                      SCSIStatus;         /* 0Ch */
  186     U8                      SCSIState;          /* 0Dh */
  187     U16                     IOCStatus;          /* 0Eh */
  188     U32                     IOCLogInfo;         /* 10h */
  189     U32                     TransferCount;      /* 14h */
  190     U32                     SenseCount;         /* 18h */
  191     U32                     ResponseInfo;       /* 1Ch */
  192     U16                     TaskTag;            /* 20h */
  193     U16                     Reserved1;          /* 22h */
  194 } MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
  195   SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
  196 
  197 /* SCSI IO Reply SCSIStatus values (SAM-2 status codes) */
  198 
  199 #define MPI_SCSI_STATUS_SUCCESS                 (0x00)
  200 #define MPI_SCSI_STATUS_CHECK_CONDITION         (0x02)
  201 #define MPI_SCSI_STATUS_CONDITION_MET           (0x04)
  202 #define MPI_SCSI_STATUS_BUSY                    (0x08)
  203 #define MPI_SCSI_STATUS_INTERMEDIATE            (0x10)
  204 #define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET    (0x14)
  205 #define MPI_SCSI_STATUS_RESERVATION_CONFLICT    (0x18)
  206 #define MPI_SCSI_STATUS_COMMAND_TERMINATED      (0x22)
  207 #define MPI_SCSI_STATUS_TASK_SET_FULL           (0x28)
  208 #define MPI_SCSI_STATUS_ACA_ACTIVE              (0x30)
  209 
  210 #define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT    (0x80)
  211 #define MPI_SCSI_STATUS_FCPEXT_NO_LINK              (0x81)
  212 #define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED           (0x82)
  213 
  214 /* SCSI IO Reply SCSIState values */
  215 
  216 #define MPI_SCSI_STATE_AUTOSENSE_VALID          (0x01)
  217 #define MPI_SCSI_STATE_AUTOSENSE_FAILED         (0x02)
  218 #define MPI_SCSI_STATE_NO_SCSI_STATUS           (0x04)
  219 #define MPI_SCSI_STATE_TERMINATED               (0x08)
  220 #define MPI_SCSI_STATE_RESPONSE_INFO_VALID      (0x10)
  221 #define MPI_SCSI_STATE_QUEUE_TAG_REJECTED       (0x20)
  222 
  223 /* SCSI IO Reply ResponseInfo values */
  224 /* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */
  225 
  226 #define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE     (0x00000000)
  227 #define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR   (0x01000000)
  228 #define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID   (0x02000000)
  229 #define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR     (0x03000000)
  230 #define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000)
  231 #define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED      (0x05000000)
  232 #define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE   (0x06000000)
  233 
  234 #define MPI_SCSI_TASKTAG_UNKNOWN                (0xFFFF)
  235 
  236 /****************************************************************************/
  237 /*  SCSI IO 32 messages and associated structures                           */
  238 /****************************************************************************/
  239 
  240 typedef struct
  241 {
  242     U8                      CDB[20];                    /* 00h */
  243     U32                     PrimaryReferenceTag;        /* 14h */
  244     U16                     PrimaryApplicationTag;      /* 18h */
  245     U16                     PrimaryApplicationTagMask;  /* 1Ah */
  246     U32                     TransferLength;             /* 1Ch */
  247 } MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32,
  248   MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t;
  249 
  250 typedef struct
  251 {
  252     U8                      CDB[16];                    /* 00h */
  253     U32                     DataLength;                 /* 10h */
  254     U32                     PrimaryReferenceTag;        /* 14h */
  255     U16                     PrimaryApplicationTag;      /* 18h */
  256     U16                     PrimaryApplicationTagMask;  /* 1Ah */
  257     U32                     TransferLength;             /* 1Ch */
  258 } MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16,
  259   MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t;
  260 
  261 typedef union
  262 {
  263     U8                       CDB32[32];
  264     MPI_SCSI_IO32_CDB_EEDP32 EEDP32;
  265     MPI_SCSI_IO32_CDB_EEDP16 EEDP16;
  266     SGE_SIMPLE_UNION         SGE;
  267 } MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION,
  268   MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t;
  269 
  270 typedef struct
  271 {
  272     U8                      TargetID;           /* 00h */
  273     U8                      Bus;                /* 01h */
  274     U16                     Reserved1;          /* 02h */
  275     U32                     Reserved2;          /* 04h */
  276 } MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM,
  277   MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t;
  278 
  279 typedef union
  280 {
  281     MPI_SCSI_IO32_BUS_TARGET_ID_FORM    SCSIID;
  282     U64                                 WWID;
  283 } MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS,
  284   MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t;
  285 
  286 typedef struct _MSG_SCSI_IO32_REQUEST
  287 {
  288     U8                          Port;                           /* 00h */
  289     U8                          Reserved1;                      /* 01h */
  290     U8                          ChainOffset;                    /* 02h */
  291     U8                          Function;                       /* 03h */
  292     U8                          CDBLength;                      /* 04h */
  293     U8                          SenseBufferLength;              /* 05h */
  294     U8                          Flags;                          /* 06h */
  295     U8                          MsgFlags;                       /* 07h */
  296     U32                         MsgContext;                     /* 08h */
  297     U8                          LUN[8];                         /* 0Ch */
  298     U32                         Control;                        /* 14h */
  299     MPI_SCSI_IO32_CDB_UNION     CDB;                            /* 18h */
  300     U32                         DataLength;                     /* 38h */
  301     U32                         BidirectionalDataLength;        /* 3Ch */
  302     U32                         SecondaryReferenceTag;          /* 40h */
  303     U16                         SecondaryApplicationTag;        /* 44h */
  304     U16                         Reserved2;                      /* 46h */
  305     U16                         EEDPFlags;                      /* 48h */
  306     U16                         ApplicationTagTranslationMask;  /* 4Ah */
  307     U32                         EEDPBlockSize;                  /* 4Ch */
  308     MPI_SCSI_IO32_ADDRESS       DeviceAddress;                  /* 50h */
  309     U8                          SGLOffset0;                     /* 58h */
  310     U8                          SGLOffset1;                     /* 59h */
  311     U8                          SGLOffset2;                     /* 5Ah */
  312     U8                          SGLOffset3;                     /* 5Bh */
  313     U32                         Reserved3;                      /* 5Ch */
  314     U32                         Reserved4;                      /* 60h */
  315     U32                         SenseBufferLowAddr;             /* 64h */
  316     SGE_IO_UNION                SGL;                            /* 68h */
  317 } MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST,
  318   SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t;
  319 
  320 /* SCSI IO 32 MsgFlags bits */
  321 #define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH                (0x01)
  322 #define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH             (0x00)
  323 #define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH             (0x01)
  324 
  325 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION             (0x02)
  326 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST             (0x00)
  327 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC              (0x02)
  328 
  329 #define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR    (0x04)
  330 #define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS         (0x08)
  331 #define MPI_SCSIIO32_MSGFLGS_MULTICAST                  (0x10)
  332 #define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL              (0x20)
  333 #define MPI_SCSIIO32_MSGFLGS_LARGE_CDB                  (0x40)
  334 
  335 /* SCSI IO 32 Flags bits */
  336 #define MPI_SCSIIO32_FLAGS_FORM_MASK                    (0x03)
  337 #define MPI_SCSIIO32_FLAGS_FORM_SCSIID                  (0x00)
  338 #define MPI_SCSIIO32_FLAGS_FORM_WWID                    (0x01)
  339 
  340 /* SCSI IO 32 LUN fields */
  341 #define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING     (0x0000FFFF)
  342 #define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING    (0xFFFF0000)
  343 #define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING     (0x0000FFFF)
  344 #define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING    (0xFFFF0000)
  345 #define MPI_SCSIIO32_LUN_LEVEL_1_WORD               (0xFF00)
  346 #define MPI_SCSIIO32_LUN_LEVEL_1_DWORD              (0x0000FF00)
  347 
  348 /* SCSI IO 32 Control bits */
  349 #define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK     (0x03000000)
  350 #define MPI_SCSIIO32_CONTROL_NODATATRANSFER         (0x00000000)
  351 #define MPI_SCSIIO32_CONTROL_WRITE                  (0x01000000)
  352 #define MPI_SCSIIO32_CONTROL_READ                   (0x02000000)
  353 #define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL          (0x03000000)
  354 
  355 #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK         (0xFC000000)
  356 #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT        (26)
  357 
  358 #define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK     (0x00000700)
  359 #define MPI_SCSIIO32_CONTROL_SIMPLEQ                (0x00000000)
  360 #define MPI_SCSIIO32_CONTROL_HEADOFQ                (0x00000100)
  361 #define MPI_SCSIIO32_CONTROL_ORDEREDQ               (0x00000200)
  362 #define MPI_SCSIIO32_CONTROL_ACAQ                   (0x00000400)
  363 #define MPI_SCSIIO32_CONTROL_UNTAGGED               (0x00000500)
  364 #define MPI_SCSIIO32_CONTROL_NO_DISCONNECT          (0x00000700)
  365 
  366 #define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK        (0x00FF0000)
  367 #define MPI_SCSIIO32_CONTROL_OBSOLETE               (0x00800000)
  368 #define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV          (0x00400000)
  369 #define MPI_SCSIIO32_CONTROL_TARGET_RESET           (0x00200000)
  370 #define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV          (0x00100000)
  371 #define MPI_SCSIIO32_CONTROL_RESERVED               (0x00080000)
  372 #define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV       (0x00040000)
  373 #define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET         (0x00020000)
  374 #define MPI_SCSIIO32_CONTROL_RESERVED2              (0x00010000)
  375 
  376 /* SCSI IO 32 EEDPFlags */
  377 #define MPI_SCSIIO32_EEDPFLAGS_MASK_OP              (0x0007)
  378 #define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP              (0x0000)
  379 #define MPI_SCSIIO32_EEDPFLAGS_CHK_OP               (0x0001)
  380 #define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP             (0x0002)
  381 #define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP             (0x0003)
  382 #define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP            (0x0004)
  383 #define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP           (0x0006)
  384 #define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP          (0x0007)
  385 
  386 #define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG         (0x0008)
  387 #define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE          (0x0010)
  388 
  389 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK         (0x0700)
  390 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD        (0x0100)
  391 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG       (0x0200)
  392 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG       (0x0400)
  393 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT        (8)
  394 
  395 #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG       (0x1000)
  396 #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG       (0x2000)
  397 #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG       (0x4000)
  398 #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG       (0x8000)
  399 
  400 /* SCSIIO32 IO reply structure */
  401 typedef struct _MSG_SCSIIO32_IO_REPLY
  402 {
  403     U8                      Port;                       /* 00h */
  404     U8                      Reserved1;                  /* 01h */
  405     U8                      MsgLength;                  /* 02h */
  406     U8                      Function;                   /* 03h */
  407     U8                      CDBLength;                  /* 04h */
  408     U8                      SenseBufferLength;          /* 05h */
  409     U8                      Flags;                      /* 06h */
  410     U8                      MsgFlags;                   /* 07h */
  411     U32                     MsgContext;                 /* 08h */
  412     U8                      SCSIStatus;                 /* 0Ch */
  413     U8                      SCSIState;                  /* 0Dh */
  414     U16                     IOCStatus;                  /* 0Eh */
  415     U32                     IOCLogInfo;                 /* 10h */
  416     U32                     TransferCount;              /* 14h */
  417     U32                     SenseCount;                 /* 18h */
  418     U32                     ResponseInfo;               /* 1Ch */
  419     U16                     TaskTag;                    /* 20h */
  420     U16                     Reserved2;                  /* 22h */
  421     U32                     BidirectionalTransferCount; /* 24h */
  422 } MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY,
  423   SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t;
  424 
  425 /****************************************************************************/
  426 /*  SCSI Task Management messages                                           */
  427 /****************************************************************************/
  428 
  429 typedef struct _MSG_SCSI_TASK_MGMT
  430 {
  431     U8                      TargetID;           /* 00h */
  432     U8                      Bus;                /* 01h */
  433     U8                      ChainOffset;        /* 02h */
  434     U8                      Function;           /* 03h */
  435     U8                      Reserved;           /* 04h */
  436     U8                      TaskType;           /* 05h */
  437     U8                      Reserved1;          /* 06h */
  438     U8                      MsgFlags;           /* 07h */
  439     U32                     MsgContext;         /* 08h */
  440     U8                      LUN[8];             /* 0Ch */
  441     U32                     Reserved2[7];       /* 14h */
  442     U32                     TaskMsgContext;     /* 30h */
  443 } MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT,
  444   SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t;
  445 
  446 /* TaskType values */
  447 
  448 #define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK            (0x01)
  449 #define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET         (0x02)
  450 #define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET          (0x03)
  451 #define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS             (0x04)
  452 #define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET    (0x05)
  453 #define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET        (0x06)
  454 #define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK            (0x07)
  455 #define MPI_SCSITASKMGMT_TASKTYPE_CLR_ACA               (0x08)
  456 
  457 /* MsgFlags bits */
  458 #define MPI_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU   (0x01)
  459 
  460 #define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION   (0x00)
  461 #define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION      (0x02)
  462 #define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04)
  463 
  464 #define MPI_SCSITASKMGMT_MSGFLAGS_SOFT_RESET_OPTION     (0x08)
  465 
  466 /* SCSI Task Management Reply */
  467 typedef struct _MSG_SCSI_TASK_MGMT_REPLY
  468 {
  469     U8                      TargetID;           /* 00h */
  470     U8                      Bus;                /* 01h */
  471     U8                      MsgLength;          /* 02h */
  472     U8                      Function;           /* 03h */
  473     U8                      ResponseCode;       /* 04h */
  474     U8                      TaskType;           /* 05h */
  475     U8                      Reserved1;          /* 06h */
  476     U8                      MsgFlags;           /* 07h */
  477     U32                     MsgContext;         /* 08h */
  478     U8                      Reserved2[2];       /* 0Ch */
  479     U16                     IOCStatus;          /* 0Eh */
  480     U32                     IOCLogInfo;         /* 10h */
  481     U32                     TerminationCount;   /* 14h */
  482 } MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
  483   SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
  484 
  485 /* ResponseCode values */
  486 #define MPI_SCSITASKMGMT_RSP_TM_COMPLETE                (0x00)
  487 #define MPI_SCSITASKMGMT_RSP_INVALID_FRAME              (0x02)
  488 #define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED           (0x04)
  489 #define MPI_SCSITASKMGMT_RSP_TM_FAILED                  (0x05)
  490 #define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED               (0x08)
  491 #define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN             (0x09)
  492 #define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC           (0x80)
  493 
  494 /****************************************************************************/
  495 /*  SCSI Enclosure Processor messages                                       */
  496 /****************************************************************************/
  497 
  498 typedef struct _MSG_SEP_REQUEST
  499 {
  500     U8                      TargetID;           /* 00h */
  501     U8                      Bus;                /* 01h */
  502     U8                      ChainOffset;        /* 02h */
  503     U8                      Function;           /* 03h */
  504     U8                      Action;             /* 04h */
  505     U8                      Flags;              /* 05h */
  506     U8                      Reserved1;          /* 06h */
  507     U8                      MsgFlags;           /* 07h */
  508     U32                     MsgContext;         /* 08h */
  509     U32                     SlotStatus;         /* 0Ch */
  510     U32                     Reserved2;          /* 10h */
  511     U32                     Reserved3;          /* 14h */
  512     U32                     Reserved4;          /* 18h */
  513     U16                     Slot;               /* 1Ch */
  514     U16                     EnclosureHandle;    /* 1Eh */
  515 } MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
  516   SEPRequest_t, MPI_POINTER pSEPRequest_t;
  517 
  518 /* Action defines */
  519 #define MPI_SEP_REQ_ACTION_WRITE_STATUS                 (0x00)
  520 #define MPI_SEP_REQ_ACTION_READ_STATUS                  (0x01)
  521 
  522 /* Flags defines */
  523 #define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS        (0x01)
  524 #define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS          (0x00)
  525 
  526 /* SlotStatus bits for MSG_SEP_REQUEST */
  527 #define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR                 (0x00000001)
  528 #define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY               (0x00000002)
  529 #define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING           (0x00000004)
  530 #define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY          (0x00000008)
  531 #define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY        (0x00000010)
  532 #define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK             (0x00000020)
  533 #define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT          (0x00000040)
  534 #define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED             (0x00000080)
  535 #define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE                (0x00000100)
  536 #define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED          (0x00000200)
  537 #define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK    (0x00001000)
  538 #define MPI_SEP_REQ_SLOTSTATUS_DISABLE                  (0x00002000)
  539 #define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE      (0x00004000)
  540 #define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST         (0x00020000)
  541 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE           (0x00040000)
  542 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT           (0x00080000)
  543 #define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE              (0x00400000)
  544 #define MPI_SEP_REQ_SLOTSTATUS_ACTIVE                   (0x00800000)
  545 #define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS          (0x04000000)
  546 #define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS          (0x08000000)
  547 #define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF                  (0x10000000)
  548 #define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET               (0x80000000)
  549 
  550 typedef struct _MSG_SEP_REPLY
  551 {
  552     U8                      TargetID;           /* 00h */
  553     U8                      Bus;                /* 01h */
  554     U8                      MsgLength;          /* 02h */
  555     U8                      Function;           /* 03h */
  556     U8                      Action;             /* 04h */
  557     U8                      Reserved1;          /* 05h */
  558     U8                      Reserved2;          /* 06h */
  559     U8                      MsgFlags;           /* 07h */
  560     U32                     MsgContext;         /* 08h */
  561     U16                     Reserved3;          /* 0Ch */
  562     U16                     IOCStatus;          /* 0Eh */
  563     U32                     IOCLogInfo;         /* 10h */
  564     U32                     SlotStatus;         /* 14h */
  565     U32                     Reserved4;          /* 18h */
  566     U16                     Slot;               /* 1Ch */
  567     U16                     EnclosureHandle;    /* 1Eh */
  568 } MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
  569   SEPReply_t, MPI_POINTER pSEPReply_t;
  570 
  571 /* SlotStatus bits for MSG_SEP_REPLY */
  572 #define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR               (0x00000001)
  573 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY             (0x00000002)
  574 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING         (0x00000004)
  575 #define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY        (0x00000008)
  576 #define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY      (0x00000010)
  577 #define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK           (0x00000020)
  578 #define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT        (0x00000040)
  579 #define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED           (0x00000080)
  580 #define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE              (0x00000100)
  581 #define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED        (0x00000200)
  582 #define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK      (0x00001000)
  583 #define MPI_SEP_REPLY_SLOTSTATUS_DISABLE                (0x00002000)
  584 #define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE        (0x00004000)
  585 #define MPI_SEP_REPLY_SLOTSTATUS_REPORT                 (0x00010000)
  586 #define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST       (0x00020000)
  587 #define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY           (0x00040000)
  588 #define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY           (0x00080000)
  589 #define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE          (0x00400000)
  590 #define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE                 (0x00800000)
  591 #define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED       (0x01000000)
  592 #define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED       (0x02000000)
  593 #define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS        (0x04000000)
  594 #define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS        (0x08000000)
  595 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF                (0x10000000)
  596 #define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED           (0x40000000)
  597 #define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED                (0x80000000)
  598 
  599 #endif

Cache object: 74ff745f69efa298db66c9e43837e38c


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.