The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mpt/mpt_freebsd.h

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    1 /* $FreeBSD: releng/5.0/sys/dev/mpt/mpt_freebsd.h 103914 2002-09-24 21:33:43Z mjacob $ */
    2 /*
    3  * LSI MPT Host Adapter FreeBSD Wrapper Definitions (CAM version)
    4  *
    5  * Copyright (c) 2000, 2001 by Greg Ansley, Adam Prewett
    6  *
    7  * Partially derived from Matty Jacobs ISP driver.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice immediately at the beginning of the file, without modification,
   14  *    this list of conditions, and the following disclaimer.
   15  * 2. The name of the author may not be used to endorse or promote products
   16  *    derived from this software without specific prior written permission.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
   22  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  */
   28 /*
   29  * Additional Copyright (c) 2002 by Matthew Jacob under same license.
   30  */
   31 
   32 #ifndef  _MPT_FREEBSD_H_
   33 #define  _MPT_FREEBSD_H_
   34 
   35 /* #define RELENG_4     1 */
   36 
   37 #include <sys/param.h>
   38 #include <sys/systm.h>
   39 #ifdef  RELENG_4
   40 #include <sys/kernel.h>
   41 #include <sys/queue.h>
   42 #include <sys/malloc.h>
   43 #else
   44 #include <sys/endian.h>
   45 #include <sys/lock.h>
   46 #include <sys/kernel.h>
   47 #include <sys/queue.h>
   48 #include <sys/malloc.h>
   49 #include <sys/mutex.h>
   50 #include <sys/condvar.h>
   51 #endif
   52 #include <sys/proc.h>
   53 #include <sys/bus.h>
   54 
   55 #include <machine/bus_memio.h>
   56 #include <machine/bus_pio.h>
   57 #include <machine/bus.h>
   58 #include <machine/clock.h>
   59 #include <machine/cpu.h>
   60 
   61 #include <cam/cam.h>
   62 #include <cam/cam_debug.h>
   63 #include <cam/cam_ccb.h>
   64 #include <cam/cam_sim.h>
   65 #include <cam/cam_xpt.h>
   66 #include <cam/cam_xpt_sim.h>
   67 #include <cam/cam_debug.h>
   68 #include <cam/scsi/scsi_all.h>
   69 #include <cam/scsi/scsi_message.h>
   70 
   71 #include "opt_ddb.h"
   72 
   73 #include "dev/mpt/mpilib/mpi_type.h"
   74 #include "dev/mpt/mpilib/mpi.h"
   75 #include "dev/mpt/mpilib/mpi_cnfg.h"
   76 #include "dev/mpt/mpilib/mpi_fc.h"
   77 #include "dev/mpt/mpilib/mpi_init.h"
   78 #include "dev/mpt/mpilib/mpi_ioc.h"
   79 #include "dev/mpt/mpilib/mpi_lan.h"
   80 #include "dev/mpt/mpilib/mpi_targ.h"
   81 
   82 
   83 #define INLINE __inline
   84 
   85 #ifdef  RELENG_4
   86 #define MPT_IFLAGS              INTR_TYPE_CAM
   87 #define MPT_LOCK(mpt)           mpt_lockspl(mpt)
   88 #define MPT_UNLOCK(mpt)         mpt_unlockspl(mpt)
   89 #define MPTLOCK_2_CAMLOCK       MPT_UNLOCK
   90 #define CAMLOCK_2_MPTLOCK       MPT_LOCK
   91 #define MPT_LOCK_SETUP(mpt)
   92 #define MPT_LOCK_DESTROY(mpt)
   93 #else
   94 #if     LOCKING_WORKED_AS_IT_SHOULD
   95 #define MPT_IFLAGS              INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE
   96 #define MPT_LOCK_SETUP(mpt)                                             \
   97                 mtx_init(&mpt->mpt_lock, "mpt", NULL, MTX_DEF);         \
   98                 mpt->mpt_locksetup = 1
   99 #define MPT_LOCK_DESTROY(mpt)                                           \
  100         if (mpt->mpt_locksetup) {                                       \
  101                 mtx_destroy(&mpt->mpt_lock);                            \
  102                 mpt->mpt_locksetup = 0;                                 \
  103         }
  104 
  105 #define MPT_LOCK(mpt)           mtx_lock(&(mpt)->mpt_lock)
  106 #define MPT_UNLOCK(mpt)         mtx_unlock(&(mpt)->mpt_lock)
  107 #define MPTLOCK_2_CAMLOCK(mpt)  \
  108         mtx_unlock(&(mpt)->mpt_lock); mtx_lock(&Giant)
  109 #define CAMLOCK_2_MPTLOCK(mpt)  \
  110         mtx_unlock(&Giant); mtx_lock(&(mpt)->mpt_lock)
  111 #else
  112 #define MPT_IFLAGS              INTR_TYPE_CAM | INTR_ENTROPY
  113 #define MPT_LOCK_SETUP(mpt)     do { } while (0)
  114 #define MPT_LOCK_DESTROY(mpt)   do { } while (0)
  115 #define MPT_LOCK(mpt)           do { } while (0)
  116 #define MPT_UNLOCK(mpt)         do { } while (0)
  117 #define MPTLOCK_2_CAMLOCK(mpt)  do { } while (0)
  118 #define CAMLOCK_2_MPTLOCK(mpt)  do { } while (0)
  119 #endif
  120 #endif
  121         
  122 
  123 
  124 /* Max MPT Reply we are willing to accept (must be power of 2) */
  125 #define MPT_REPLY_SIZE          128
  126 
  127 #define MPT_MAX_REQUESTS(mpt)   ((mpt)->is_fc? 1024 : 256)
  128 #define MPT_REQUEST_AREA 512
  129 #define MPT_SENSE_SIZE    32    /* included in MPT_REQUEST_SIZE */
  130 #define MPT_REQ_MEM_SIZE(mpt)   (MPT_MAX_REQUESTS(mpt) * MPT_REQUEST_AREA)
  131 
  132 /*
  133  * We cannot tell prior to getting IOC facts how big the IOC's request
  134  * area is. Because of this we cannot tell at compile time how many
  135  * simple SG elements we can fit within an IOC request prior to having
  136  * to put in a chain element.
  137  * 
  138  * Experimentally we know that the Ultra4 parts have a 96 byte request
  139  * element size and the Fibre Channel units have a 144 byte request
  140  * element size. Therefore, if we have 512-32 (== 480) bytes of request
  141  * area to play with, we have room for between 3 and 5 request sized
  142  * regions- the first of which is the command  plus a simple SG list,
  143  * the rest of which are chained continuation SG lists. Given that the
  144  * normal request we use is 48 bytes w/o the first SG element, we can
  145  * assume we have 480-48 == 432 bytes to have simple SG elements and/or
  146  * chain elements. If we assume 32 bit addressing, this works out to
  147  * 54 SG or chain elements. If we assume 5 chain elements, then we have
  148  * a maximum of 49 seperate actual SG segments.
  149  */
  150 
  151 #define MPT_SGL_MAX             49
  152 
  153 #define MPT_RQSL(mpt)           (mpt->request_frame_size << 2)
  154 #define MPT_NSGL(mpt)           (MPT_RQSL(mpt) / sizeof (SGE_SIMPLE32))
  155 
  156 #define MPT_NSGL_FIRST(mpt)                             \
  157         (((mpt->request_frame_size << 2) -              \
  158         sizeof (MSG_SCSI_IO_REQUEST) -                  \
  159         sizeof (SGE_IO_UNION)) / sizeof (SGE_SIMPLE32))
  160 
  161 /*
  162  * Convert a physical address returned from IOC to kvm address
  163  * needed to access the data.
  164  */
  165 #define MPT_REPLY_PTOV(m, x)            \
  166         ((void *)(&m->reply[((x << 1) - m->reply_phys)]))
  167 
  168 #define ccb_mpt_ptr sim_priv.entries[0].ptr
  169 #define ccb_req_ptr sim_priv.entries[1].ptr
  170 
  171 enum mpt_req_state {
  172     REQ_FREE, REQ_IN_PROGRESS, REQ_TIMEOUT, REQ_ON_CHIP, REQ_DONE
  173 };
  174 typedef struct req_entry {
  175         u_int16_t       index;          /* Index of this entry */
  176         union ccb *     ccb;            /* CAM request */
  177         void *          req_vbuf;       /* Virtual Address of Entry */
  178         void *          sense_vbuf;     /* Virtual Address of sense data */
  179         bus_addr_t      req_pbuf;       /* Physical Address of Entry */
  180         bus_addr_t      sense_pbuf;     /* Physical Address of sense data */
  181         bus_dmamap_t    dmap;           /* DMA map for data buffer */
  182         SLIST_ENTRY(req_entry) link;    /* Pointer to next in list */
  183         enum mpt_req_state debug;       /* Debugging */
  184         u_int32_t       sequence;       /* Sequence Number */
  185 } request_t;
  186 
  187 
  188 /* Structure for saving proper values for modifyable PCI configuration registers */
  189 struct mpt_pci_cfg {
  190         u_int16_t Command;
  191         u_int16_t LatencyTimer_LineSize;
  192         u_int32_t IO_BAR;
  193         u_int32_t Mem0_BAR[2];
  194         u_int32_t Mem1_BAR[2];
  195         u_int32_t ROM_BAR;
  196         u_int8_t  IntLine;
  197         u_int32_t PMCSR;
  198 };
  199 
  200 typedef struct mpt_softc {
  201         device_t                dev;
  202 #ifdef  RELENG_4
  203         int                     mpt_splsaved;
  204         u_int32_t               mpt_islocked;   
  205 #else
  206         struct mtx              mpt_lock;
  207 #endif
  208         u_int32_t               : 16,
  209                 unit            : 8,
  210                 verbose         : 3,
  211                 outofbeer       : 1,
  212                 mpt_locksetup   : 1,
  213                 disabled        : 1,
  214                 is_fc           : 1,
  215                 bus             : 1;    /* FC929/1030 have two busses */
  216 
  217         /*
  218          * IOC Facts
  219          */
  220         u_int16_t               mpt_global_credits;
  221         u_int16_t               request_frame_size;
  222         u_int8_t                mpt_max_devices;
  223         u_int8_t                mpt_max_buses;
  224 
  225         /*
  226          * Port Facts
  227          */
  228         u_int16_t               mpt_ini_id;
  229 
  230 
  231         /*
  232          * Device Configuration Information
  233          */
  234         union {
  235                 struct mpt_spi_cfg {
  236                         fCONFIG_PAGE_SCSI_PORT_0        _port_page0;
  237                         fCONFIG_PAGE_SCSI_PORT_1        _port_page1;
  238                         fCONFIG_PAGE_SCSI_PORT_2        _port_page2;
  239                         fCONFIG_PAGE_SCSI_DEVICE_0      _dev_page0[16];
  240                         fCONFIG_PAGE_SCSI_DEVICE_1      _dev_page1[16];
  241                         uint16_t                        _tag_enable;
  242                         uint16_t                        _disc_enable;
  243                         uint16_t                        _update_params0;
  244                         uint16_t                        _update_params1;
  245                 } spi;
  246 #define mpt_port_page0          cfg.spi._port_page0
  247 #define mpt_port_page1          cfg.spi._port_page1
  248 #define mpt_port_page2          cfg.spi._port_page2
  249 #define mpt_dev_page0           cfg.spi._dev_page0
  250 #define mpt_dev_page1           cfg.spi._dev_page1
  251 #define mpt_tag_enable          cfg.spi._tag_enable
  252 #define mpt_disc_enable         cfg.spi._disc_enable
  253 #define mpt_update_params0      cfg.spi._update_params0
  254 #define mpt_update_params1      cfg.spi._update_params1
  255                 struct mpi_fc_cfg {
  256                         u_int8_t        nada;
  257                 } fc;
  258         } cfg;
  259 
  260         /*
  261          * PCI Hardware info
  262          */
  263         struct resource *       pci_irq;        /* Interrupt map for chip */
  264         void *                  ih;             /* Interupt handle */
  265         struct mpt_pci_cfg      pci_cfg;        /* saved PCI conf registers */
  266 
  267         /*
  268          * DMA Mapping Stuff
  269          */
  270 
  271         struct resource *       pci_reg;        /* Register map for chip */
  272         int                     pci_reg_id;     /* Resource ID */
  273         bus_space_tag_t         pci_st;         /* Bus tag for registers */
  274         bus_space_handle_t      pci_sh;         /* Bus handle for registers */
  275         vm_offset_t             pci_pa;         /* Physical Address */
  276 
  277         bus_dma_tag_t           parent_dmat;    /* DMA tag for parent PCI bus */
  278         bus_dma_tag_t           reply_dmat;     /* DMA tag for reply memory */
  279         bus_dmamap_t            reply_dmap;     /* DMA map for reply memory */
  280         char *                  reply;          /* KVA of reply memory */
  281         bus_addr_t              reply_phys;     /* BusAddr of reply memory */
  282 
  283 
  284         bus_dma_tag_t           buffer_dmat;    /* DMA tag for buffers */
  285         bus_dma_tag_t           request_dmat;   /* DMA tag for request memroy */
  286         bus_dmamap_t            request_dmap;   /* DMA map for request memroy */
  287         char *                  request;        /* KVA of Request memory */
  288         bus_addr_t              request_phys;   /* BusADdr of request memory */
  289 
  290         /*
  291          * CAM && Software Management
  292          */
  293 
  294         request_t *             request_pool;
  295         SLIST_HEAD(req_queue, req_entry) request_free_list;
  296 
  297         struct cam_sim *        sim;
  298         struct cam_path *       path;
  299 
  300         u_int32_t               sequence;       /* Sequence Number */
  301         u_int32_t               timeouts;       /* timeout count */
  302         u_int32_t               success;        /* successes afer timeout */
  303 
  304         /* Opposing port in a 929 or 1030, or NULL */
  305         struct mpt_softc *      mpt2;
  306 
  307 } mpt_softc_t;
  308 
  309 #include <dev/mpt/mpt.h>
  310 
  311 
  312 static INLINE void mpt_write(mpt_softc_t *, size_t, u_int32_t);
  313 static INLINE u_int32_t mpt_read(mpt_softc_t *, int);
  314 
  315 static INLINE void
  316 mpt_write(mpt_softc_t *mpt, size_t offset, u_int32_t val)
  317 {
  318         bus_space_write_4(mpt->pci_st, mpt->pci_sh, offset, val);
  319 }
  320 
  321 static INLINE u_int32_t
  322 mpt_read(mpt_softc_t *mpt, int offset)
  323 {
  324         return (bus_space_read_4(mpt->pci_st, mpt->pci_sh, offset));
  325 }
  326 
  327 void mpt_cam_attach(mpt_softc_t *);
  328 void mpt_cam_detach(mpt_softc_t *);
  329 void mpt_done(mpt_softc_t *, u_int32_t);
  330 void mpt_prt(mpt_softc_t *, const char *, ...);
  331 void mpt_set_config_regs(mpt_softc_t *);
  332 
  333 #ifdef  RELENG_4
  334 static INLINE void mpt_lockspl(mpt_softc_t *);
  335 static INLINE void mpt_unlockspl(mpt_softc_t *);
  336 
  337 static INLINE void
  338 mpt_lockspl(mpt_softc_t *mpt)
  339 {
  340        int s = splcam();
  341        if (mpt->mpt_islocked++ == 0) {  
  342                mpt->mpt_splsaved = s;
  343        } else {
  344                splx(s);
  345        }
  346 }
  347 
  348 static INLINE void
  349 mpt_unlockspl(mpt_softc_t *mpt)
  350 {
  351        if (mpt->mpt_islocked) {
  352                if (--mpt->mpt_islocked == 0) {
  353                        splx(mpt->mpt_splsaved);
  354                }
  355        }
  356 }
  357 #endif
  358 
  359 #endif  /* _MPT_FREEBSD_H */

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