FreeBSD/Linux Kernel Cross Reference
sys/dev/mpt/mpt_pci.c
1 /* $FreeBSD: releng/5.0/sys/dev/mpt/mpt_pci.c 103914 2002-09-24 21:33:43Z mjacob $ */
2 /*
3 * PCI specific probe and attach routines for LSI Fusion Adapters
4 * FreeBSD Version.
5 *
6 * Copyright (c) 2000, 2001 by Greg Ansley
7 * Partially derived from Matt Jacob's ISP driver.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice immediately at the beginning of the file, without modification,
14 * this list of conditions, and the following disclaimer.
15 * 2. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
22 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30 /*
31 * Additional Copyright (c) 2002 by Matthew Jacob under same license.
32 */
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/bus.h>
39
40 #include <pci/pcireg.h>
41 #include <pci/pcivar.h>
42
43 #include <machine/bus_memio.h>
44 #include <machine/bus_pio.h>
45 #include <machine/bus.h>
46 #include <machine/resource.h>
47 #include <sys/rman.h>
48 #include <sys/malloc.h>
49
50 #include <dev/mpt/mpt_freebsd.h>
51
52 #ifndef PCI_VENDOR_LSI
53 #define PCI_VENDOR_LSI 0x1000
54 #endif
55
56 #ifndef PCI_PRODUCT_LSI_FC909
57 #define PCI_PRODUCT_LSI_FC909 0x0620
58 #endif
59
60 #ifndef PCI_PRODUCT_LSI_FC909A
61 #define PCI_PRODUCT_LSI_FC909A 0x0621
62 #endif
63
64 #ifndef PCI_PRODUCT_LSI_FC919
65 #define PCI_PRODUCT_LSI_FC919 0x0624
66 #endif
67
68 #ifndef PCI_PRODUCT_LSI_FC929
69 #define PCI_PRODUCT_LSI_FC929 0x0622
70 #endif
71
72 #ifndef PCI_PRODUCT_LSI_1030
73 #define PCI_PRODUCT_LSI_1030 0x0030
74 #endif
75
76 #ifndef PCIM_CMD_SERRESPEN
77 #define PCIM_CMD_SERRESPEN 0x0100
78 #endif
79
80
81
82 #define MEM_MAP_REG 0x14
83 #define MEM_MAP_SRAM 0x1C
84
85 static int mpt_probe(device_t);
86 static int mpt_attach(device_t);
87 static void mpt_free_bus_resources(mpt_softc_t *mpt);
88 static int mpt_detach(device_t);
89 static int mpt_shutdown(device_t);
90 static int mpt_dma_mem_alloc(mpt_softc_t *mpt);
91 static void mpt_dma_mem_free(mpt_softc_t *mpt);
92 static void mpt_read_config_regs(mpt_softc_t *mpt);
93 static void mpt_pci_intr(void *);
94
95 static device_method_t mpt_methods[] = {
96 /* Device interface */
97 DEVMETHOD(device_probe, mpt_probe),
98 DEVMETHOD(device_attach, mpt_attach),
99 DEVMETHOD(device_detach, mpt_detach),
100 DEVMETHOD(device_shutdown, mpt_shutdown),
101 { 0, 0 }
102 };
103
104 static driver_t mpt_driver = {
105 "mpt", mpt_methods, sizeof (mpt_softc_t)
106 };
107 static devclass_t mpt_devclass;
108 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
109 MODULE_VERSION(mpt, 1);
110
111 int
112 mpt_intr(void *dummy)
113 {
114 int nrepl = 0;
115 u_int32_t reply;
116 mpt_softc_t *mpt = (mpt_softc_t *)dummy;
117
118 if ((mpt_read(mpt, MPT_OFFSET_INTR_STATUS) & MPT_INTR_REPLY_READY) == 0)
119 return (0);
120 reply = mpt_pop_reply_queue(mpt);
121 while (reply != MPT_REPLY_EMPTY) {
122 nrepl++;
123 if (mpt->verbose > 1) {
124 if ((reply & MPT_CONTEXT_REPLY) != 0) {
125 /* Address reply; IOC has something to say */
126 mpt_print_reply(MPT_REPLY_PTOV(mpt, reply));
127 } else {
128 /* Context reply ; all went well */
129 mpt_prt(mpt, "context %u reply OK", reply);
130 }
131 }
132 mpt_done(mpt, reply);
133 reply = mpt_pop_reply_queue(mpt);
134 }
135 return (nrepl != 0);
136 }
137
138 static int
139 mpt_probe(device_t dev)
140 {
141 char *desc;
142
143 if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
144 return (ENXIO);
145
146 switch ((pci_get_device(dev) & ~1)) {
147 case PCI_PRODUCT_LSI_FC909:
148 desc = "LSILogic FC909 FC Adapter";
149 break;
150 case PCI_PRODUCT_LSI_FC909A:
151 desc = "LSILogic FC909A FC Adapter";
152 break;
153 case PCI_PRODUCT_LSI_FC919:
154 desc = "LSILogic FC919 FC Adapter";
155 break;
156 case PCI_PRODUCT_LSI_FC929:
157 desc = "LSILogic FC929 FC Adapter";
158 break;
159 case PCI_PRODUCT_LSI_1030:
160 desc = "LSILogic 1030 Ultra4 Adapter";
161 break;
162 default:
163 return (ENXIO);
164 }
165
166 device_set_desc(dev, desc);
167 return (0);
168 }
169
170 #ifdef RELENG_4
171 static void
172 mpt_set_options(mpt_softc_t *mpt)
173 {
174 int bitmap;
175
176 bitmap = 0;
177 if (getenv_int("mpt_disable", &bitmap)) {
178 if (bitmap & (1 << mpt->unit)) {
179 mpt->disabled = 1;
180 }
181 }
182
183 bitmap = 0;
184 if (getenv_int("mpt_debug", &bitmap)) {
185 if (bitmap & (1 << mpt->unit)) {
186 mpt->verbose = 2;
187 }
188 }
189
190 }
191 #else
192 static void
193 mpt_set_options(mpt_softc_t *mpt)
194 {
195 int tval;
196
197 tval = 0;
198 if (resource_int_value(device_get_name(mpt->dev),
199 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
200 mpt->disabled = 1;
201 }
202 tval = 0;
203 if (resource_int_value(device_get_name(mpt->dev),
204 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
205 mpt->verbose += tval;
206 }
207 }
208 #endif
209
210
211 static void
212 mpt_link_peer(mpt_softc_t *mpt)
213 {
214 mpt_softc_t *mpt2;
215
216 if (mpt->unit == 0) {
217 return;
218 }
219
220 /*
221 * XXX: depends on probe order
222 */
223 mpt2 = (mpt_softc_t *) devclass_get_softc(mpt_devclass, mpt->unit-1);
224
225 if (mpt2 == NULL) {
226 return;
227 }
228 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
229 return;
230 }
231 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
232 return;
233 }
234 mpt->mpt2 = mpt2;
235 mpt2->mpt2 = mpt;
236 if (mpt->verbose) {
237 mpt_prt(mpt, "linking with peer (mpt%d)",
238 device_get_unit(mpt2->dev));
239 }
240 }
241
242
243 static int
244 mpt_attach(device_t dev)
245 {
246 int iqd;
247 u_int32_t data, cmd;
248 mpt_softc_t *mpt;
249
250 /* Allocate the softc structure */
251 mpt = (mpt_softc_t*) device_get_softc(dev);
252 if (mpt == NULL) {
253 device_printf(dev, "cannot allocate softc\n");
254 return (ENOMEM);
255 }
256 bzero(mpt, sizeof (mpt_softc_t));
257 switch ((pci_get_device(dev) & ~1)) {
258 case PCI_PRODUCT_LSI_FC909:
259 case PCI_PRODUCT_LSI_FC909A:
260 case PCI_PRODUCT_LSI_FC919:
261 case PCI_PRODUCT_LSI_FC929:
262 mpt->is_fc = 1;
263 break;
264 default:
265 break;
266 }
267 mpt->dev = dev;
268 mpt->unit = device_get_unit(dev);
269 mpt_set_options(mpt);
270 mpt->verbose += (bootverbose != 0)? 1 : 0;
271
272 /* Make sure memory access decoders are enabled */
273 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
274 if ((cmd & PCIM_CMD_MEMEN) == 0) {
275 device_printf(dev, "Memory accesses disabled");
276 goto bad;
277 }
278
279 /*
280 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
281 */
282 cmd |=
283 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
284 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
285 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
286
287 /*
288 * Make sure we've disabled the ROM.
289 */
290 data = pci_read_config(dev, PCIR_BIOS, 4);
291 data &= ~1;
292 pci_write_config(dev, PCIR_BIOS, data, 4);
293
294
295 /*
296 * Is this part a dual?
297 * If so, link with our partner (around yet)
298 */
299 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
300 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
301 mpt_link_peer(mpt);
302 }
303
304 /* Set up the memory regions */
305 /* Allocate kernel virtual memory for the 9x9's Mem0 region */
306 mpt->pci_reg_id = MEM_MAP_REG;
307 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
308 &mpt->pci_reg_id, 0, ~0, 0, RF_ACTIVE);
309 if (mpt->pci_reg == NULL) {
310 device_printf(dev, "unable to map any ports\n");
311 goto bad;
312 }
313 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
314 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
315 /* Get the Physical Address */
316 mpt->pci_pa = rman_get_start(mpt->pci_reg);
317
318 /* Get a handle to the interrupt */
319 iqd = 0;
320 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0,
321 1, RF_ACTIVE | RF_SHAREABLE);
322 if (mpt->pci_irq == NULL) {
323 device_printf(dev, "could not allocate interrupt\n");
324 goto bad;
325 }
326
327 /* Register the interrupt handler */
328 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
329 mpt, &mpt->ih)) {
330 device_printf(dev, "could not setup interrupt\n");
331 goto bad;
332 }
333
334 MPT_LOCK_SETUP(mpt);
335
336 /* Disable interrupts at the part */
337 mpt_disable_ints(mpt);
338
339 /* Allocate dma memory */
340 if (mpt_dma_mem_alloc(mpt)) {
341 device_printf(dev, "Could not allocate DMA memory\n");
342 goto bad;
343 }
344
345 /*
346 * Save the PCI config register values
347 *
348 * Hard resets are known to screw up the BAR for diagnostic
349 * memory accesses (Mem1).
350 *
351 * Using Mem1 is known to make the chip stop responding to
352 * configuration space transfers, so we need to save it now
353 */
354
355 mpt_read_config_regs(mpt);
356
357 /* Initialize the hardware */
358 if (mpt->disabled == 0) {
359 MPT_LOCK(mpt);
360 if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0) {
361 MPT_UNLOCK(mpt);
362 goto bad;
363 }
364
365 /*
366 * Attach to CAM
367 */
368 MPTLOCK_2_CAMLOCK(mpt);
369 mpt_cam_attach(mpt);
370 CAMLOCK_2_MPTLOCK(mpt);
371 MPT_UNLOCK(mpt);
372 }
373
374 return (0);
375
376 bad:
377 mpt_dma_mem_free(mpt);
378 mpt_free_bus_resources(mpt);
379
380 /*
381 * but return zero to preserve unit numbering
382 */
383 return (0);
384 }
385
386 /*
387 * Free bus resources
388 */
389 static void
390 mpt_free_bus_resources(mpt_softc_t *mpt)
391 {
392 if (mpt->ih) {
393 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
394 mpt->ih = 0;
395 }
396
397 if (mpt->pci_irq) {
398 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
399 mpt->pci_irq = 0;
400 }
401
402 if (mpt->pci_reg) {
403 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_reg_id,
404 mpt->pci_reg);
405 mpt->pci_reg = 0;
406 }
407 MPT_LOCK_DESTROY(mpt);
408 }
409
410
411 /*
412 * Disconnect ourselves from the system.
413 */
414 static int
415 mpt_detach(device_t dev)
416 {
417 mpt_softc_t *mpt;
418 mpt = (mpt_softc_t*) device_get_softc(dev);
419
420 mpt_prt(mpt, "mpt_detach");
421
422 if (mpt) {
423 mpt_disable_ints(mpt);
424 mpt_cam_detach(mpt);
425 mpt_reset(mpt);
426 mpt_dma_mem_free(mpt);
427 mpt_free_bus_resources(mpt);
428 }
429 return(0);
430 }
431
432
433 /*
434 * Disable the hardware
435 */
436 static int
437 mpt_shutdown(device_t dev)
438 {
439 mpt_softc_t *mpt;
440 mpt = (mpt_softc_t*) device_get_softc(dev);
441
442 if (mpt) {
443 mpt_reset(mpt);
444 }
445 return(0);
446 }
447
448
449 struct imush {
450 mpt_softc_t *mpt;
451 int error;
452 u_int32_t phys;
453 };
454
455 static void
456 mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error)
457 {
458 struct imush *imushp = (struct imush *) arg;
459 imushp->error = error;
460 imushp->phys = segs->ds_addr;
461 }
462
463
464 static int
465 mpt_dma_mem_alloc(mpt_softc_t *mpt)
466 {
467 int i, error;
468 u_char *vptr;
469 u_int32_t pptr, end;
470 size_t len;
471 struct imush im;
472 device_t dev = mpt->dev;
473
474 /* Check if we alreay have allocated the reply memory */
475 if (mpt->reply_phys != NULL) {
476 return 0;
477 }
478
479 len = sizeof (request_t *) * MPT_REQ_MEM_SIZE(mpt);
480 #ifdef RELENG_4
481 mpt->request_pool = (request_t *) malloc(len, M_DEVBUF, M_WAITOK);
482 if (mpt->request_pool == NULL) {
483 device_printf(dev, "cannot allocate request pool\n");
484 return (1);
485 }
486 bzero(mpt->request_pool, len);
487 #else
488 mpt->request_pool = (request_t *)
489 malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
490 if (mpt->request_pool == NULL) {
491 device_printf(dev, "cannot allocate request pool\n");
492 return (1);
493 }
494 #endif
495
496 /*
497 * Create a dma tag for this device
498 *
499 * Align at page boundaries, limit to 32-bit addressing
500 * (The chip supports 64-bit addressing, but this driver doesn't)
501 */
502 if (bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT,
503 BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT,
504 BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED, 0,
505 &mpt->parent_dmat) != 0) {
506 device_printf(dev, "cannot create parent dma tag\n");
507 return (1);
508 }
509
510 /* Create a child tag for reply buffers */
511 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
512 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
513 NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
514 &mpt->reply_dmat) != 0) {
515 device_printf(dev, "cannot create a dma tag for replies\n");
516 return (1);
517 }
518
519 /* Allocate some DMA accessable memory for replies */
520 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
521 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
522 device_printf(dev, "cannot allocate %d bytes of reply memory\n",
523 PAGE_SIZE);
524 return (1);
525 }
526
527 im.mpt = mpt;
528 im.error = 0;
529
530 /* Load and lock it into "bus space" */
531 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
532 PAGE_SIZE, mpt_map_rquest, &im, 0);
533
534 if (im.error) {
535 device_printf(dev,
536 "error %d loading dma map for DMA reply queue\n", im.error);
537 return (1);
538 }
539 mpt->reply_phys = im.phys;
540
541 /* Create a child tag for data buffers */
542 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
543 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
544 NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0,
545 &mpt->buffer_dmat) != 0) {
546 device_printf(dev,
547 "cannot create a dma tag for data buffers\n");
548 return (1);
549 }
550
551 /* Create a child tag for request buffers */
552 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
553 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
554 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
555 &mpt->request_dmat) != 0) {
556 device_printf(dev, "cannot create a dma tag for requests\n");
557 return (1);
558 }
559
560 /* Allocate some DMA accessable memory for requests */
561 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
562 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
563 device_printf(dev,
564 "cannot allocate %d bytes of request memory\n",
565 MPT_REQ_MEM_SIZE(mpt));
566 return (1);
567 }
568
569 im.mpt = mpt;
570 im.error = 0;
571
572 /* Load and lock it into "bus space" */
573 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
574 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &im, 0);
575
576 if (im.error) {
577 device_printf(dev,
578 "error %d loading dma map for DMA request queue\n",
579 im.error);
580 return (1);
581 }
582 mpt->request_phys = im.phys;
583
584 i = 0;
585 pptr = mpt->request_phys;
586 vptr = mpt->request;
587 end = pptr + MPT_REQ_MEM_SIZE(mpt);
588 while(pptr < end) {
589 request_t *req = &mpt->request_pool[i];
590 req->index = i++;
591
592 /* Store location of Request Data */
593 req->req_pbuf = pptr;
594 req->req_vbuf = vptr;
595
596 pptr += MPT_REQUEST_AREA;
597 vptr += MPT_REQUEST_AREA;
598
599 req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
600 req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
601
602 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
603 if (error) {
604 device_printf(dev,
605 "error %d creating per-cmd DMA maps\n", error);
606 return (1);
607 }
608 }
609 return (0);
610 }
611
612
613
614 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
615 */
616 static void
617 mpt_dma_mem_free(mpt_softc_t *mpt)
618 {
619 int i;
620
621 /* Make sure we aren't double destroying */
622 if (mpt->reply_dmat == 0) {
623 if (mpt->verbose)
624 device_printf(mpt->dev,"Already released dma memory\n");
625 return;
626 }
627
628 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
629 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
630 }
631 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
632 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
633 bus_dma_tag_destroy(mpt->request_dmat);
634 bus_dma_tag_destroy(mpt->buffer_dmat);
635 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
636 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
637 bus_dma_tag_destroy(mpt->reply_dmat);
638 bus_dma_tag_destroy(mpt->parent_dmat);
639 mpt->reply_dmat = 0;
640 free(mpt->request_pool, M_DEVBUF);
641 mpt->request_pool = 0;
642
643 }
644
645
646
647 /* Reads modifiable (via PCI transactions) config registers */
648 static void
649 mpt_read_config_regs(mpt_softc_t *mpt)
650 {
651 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
652 mpt->pci_cfg.LatencyTimer_LineSize =
653 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
654 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_MAPS, 4);
655 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0x4, 4);
656 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x8, 4);
657 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0xC, 4);
658 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x10, 4);
659 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
660 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
661 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
662 }
663
664 /* Sets modifiable config registers */
665 void
666 mpt_set_config_regs(mpt_softc_t *mpt)
667 {
668 u_int32_t val;
669
670 #define MPT_CHECK(reg, offset, size) \
671 val = pci_read_config(mpt->dev, offset, size); \
672 if (mpt->pci_cfg.reg != val) { \
673 mpt_prt(mpt, \
674 "Restoring " #reg " to 0x%X from 0x%X\n", \
675 mpt->pci_cfg.reg, val); \
676 }
677
678 if (mpt->verbose) {
679 MPT_CHECK(Command, PCIR_COMMAND, 2);
680 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
681 MPT_CHECK(IO_BAR, PCIR_MAPS, 4);
682 MPT_CHECK(Mem0_BAR[0], PCIR_MAPS+0x4, 4);
683 MPT_CHECK(Mem0_BAR[1], PCIR_MAPS+0x8, 4);
684 MPT_CHECK(Mem1_BAR[0], PCIR_MAPS+0xC, 4);
685 MPT_CHECK(Mem1_BAR[1], PCIR_MAPS+0x10, 4);
686 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
687 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
688 MPT_CHECK(PMCSR, 0x44, 4);
689 }
690 #undef MPT_CHECK
691
692 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
693 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
694 mpt->pci_cfg.LatencyTimer_LineSize, 2);
695 pci_write_config(mpt->dev, PCIR_MAPS, mpt->pci_cfg.IO_BAR, 4);
696 pci_write_config(mpt->dev, PCIR_MAPS+0x4, mpt->pci_cfg.Mem0_BAR[0], 4);
697 pci_write_config(mpt->dev, PCIR_MAPS+0x8, mpt->pci_cfg.Mem0_BAR[1], 4);
698 pci_write_config(mpt->dev, PCIR_MAPS+0xC, mpt->pci_cfg.Mem1_BAR[0], 4);
699 pci_write_config(mpt->dev, PCIR_MAPS+0x10, mpt->pci_cfg.Mem1_BAR[1], 4);
700 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
701 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
702 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
703 }
704
705 static void
706 mpt_pci_intr(void *arg)
707 {
708 mpt_softc_t *mpt = arg;
709 MPT_LOCK(mpt);
710 (void) mpt_intr(mpt);
711 MPT_UNLOCK(mpt);
712 }
Cache object: 2250916eb4e79bfeb1d2374c455c006c
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