FreeBSD/Linux Kernel Cross Reference
sys/dev/mpt/mpt_pci.c
1 /*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
4 *
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice immediately at the beginning of the file, without modification,
16 * this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32 /*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
45 * redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 *
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
67 */
68 /*
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
73 *
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 * substantially similar to the "NO WARRANTY" disclaimer below
81 * ("Disclaimer") and any redistribution must be conditioned upon including
82 * a substantially similar Disclaimer requirement for further binary
83 * redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 * of any contributors may be used to endorse or promote products derived
86 * from this software without specific prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99 */
100
101 #include <sys/cdefs.h>
102 __FBSDID("$FreeBSD: releng/8.3/sys/dev/mpt/mpt_pci.c 233955 2012-04-06 17:21:31Z marius $");
103
104 #include <dev/mpt/mpt.h>
105 #include <dev/mpt/mpt_cam.h>
106 #include <dev/mpt/mpt_raid.h>
107
108 #if __FreeBSD_version < 700000
109 #define pci_msix_count(x) 0
110 #define pci_msi_count(x) 0
111 #define pci_alloc_msi(x, y) 1
112 #define pci_alloc_msix(x, y) 1
113 #define pci_release_msi(x) do { ; } while (0)
114 #endif
115
116 #ifndef PCI_VENDOR_LSI
117 #define PCI_VENDOR_LSI 0x1000
118 #endif
119
120 #ifndef PCI_PRODUCT_LSI_FC909
121 #define PCI_PRODUCT_LSI_FC909 0x0620
122 #endif
123
124 #ifndef PCI_PRODUCT_LSI_FC909A
125 #define PCI_PRODUCT_LSI_FC909A 0x0621
126 #endif
127
128 #ifndef PCI_PRODUCT_LSI_FC919
129 #define PCI_PRODUCT_LSI_FC919 0x0624
130 #endif
131
132 #ifndef PCI_PRODUCT_LSI_FC919_LAN
133 #define PCI_PRODUCT_LSI_FC919_LAN 0x0625
134 #endif
135
136 #ifndef PCI_PRODUCT_LSI_FC929
137 #define PCI_PRODUCT_LSI_FC929 0x0622
138 #endif
139
140 #ifndef PCI_PRODUCT_LSI_FC929_LAN
141 #define PCI_PRODUCT_LSI_FC929_LAN 0x0623
142 #endif
143
144 #ifndef PCI_PRODUCT_LSI_FC929X
145 #define PCI_PRODUCT_LSI_FC929X 0x0626
146 #endif
147
148 #ifndef PCI_PRODUCT_LSI_FC929X_LAN
149 #define PCI_PRODUCT_LSI_FC929X_LAN 0x0627
150 #endif
151
152 #ifndef PCI_PRODUCT_LSI_FC919X
153 #define PCI_PRODUCT_LSI_FC919X 0x0628
154 #endif
155
156 #ifndef PCI_PRODUCT_LSI_FC919X_LAN
157 #define PCI_PRODUCT_LSI_FC919X_LAN 0x0629
158 #endif
159
160 #ifndef PCI_PRODUCT_LSI_FC7X04X
161 #define PCI_PRODUCT_LSI_FC7X04X 0x0640
162 #endif
163
164 #ifndef PCI_PRODUCT_LSI_FC646
165 #define PCI_PRODUCT_LSI_FC646 0x0646
166 #endif
167
168 #ifndef PCI_PRODUCT_LSI_1030
169 #define PCI_PRODUCT_LSI_1030 0x0030
170 #endif
171
172 #ifndef PCI_PRODUCT_LSI_1030ZC
173 #define PCI_PRODUCT_LSI_1030ZC 0x0031
174 #endif
175
176 #ifndef PCI_PRODUCT_LSI_SAS1064
177 #define PCI_PRODUCT_LSI_SAS1064 0x0050
178 #endif
179
180 #ifndef PCI_PRODUCT_LSI_SAS1064A
181 #define PCI_PRODUCT_LSI_SAS1064A 0x005C
182 #endif
183
184 #ifndef PCI_PRODUCT_LSI_SAS1064E
185 #define PCI_PRODUCT_LSI_SAS1064E 0x0056
186 #endif
187
188 #ifndef PCI_PRODUCT_LSI_SAS1066
189 #define PCI_PRODUCT_LSI_SAS1066 0x005E
190 #endif
191
192 #ifndef PCI_PRODUCT_LSI_SAS1066E
193 #define PCI_PRODUCT_LSI_SAS1066E 0x005A
194 #endif
195
196 #ifndef PCI_PRODUCT_LSI_SAS1068
197 #define PCI_PRODUCT_LSI_SAS1068 0x0054
198 #endif
199
200 #ifndef PCI_PRODUCT_LSI_SAS1068A
201 #define PCI_PRODUCT_LSI_SAS1068A 0x0055
202 #endif
203
204 #ifndef PCI_PRODUCT_LSI_SAS1068E
205 #define PCI_PRODUCT_LSI_SAS1068E 0x0058
206 #endif
207
208 #ifndef PCI_PRODUCT_LSI_SAS1068E2
209 #define PCI_PRODUCT_LSI_SAS1068E2 0x0059
210 #endif
211
212 #ifndef PCI_PRODUCT_LSI_SAS1078
213 #define PCI_PRODUCT_LSI_SAS1078 0x0062
214 #endif
215
216 #ifndef PCI_PRODUCT_LSI_SAS1078DE
217 #define PCI_PRODUCT_LSI_SAS1078DE 0x007C
218 #endif
219
220 #ifndef PCIM_CMD_SERRESPEN
221 #define PCIM_CMD_SERRESPEN 0x0100
222 #endif
223
224 static int mpt_pci_probe(device_t);
225 static int mpt_pci_attach(device_t);
226 static void mpt_free_bus_resources(struct mpt_softc *mpt);
227 static int mpt_pci_detach(device_t);
228 static int mpt_pci_shutdown(device_t);
229 static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
230 static void mpt_dma_mem_free(struct mpt_softc *mpt);
231 static void mpt_read_config_regs(struct mpt_softc *mpt);
232 #if 0
233 static void mpt_set_config_regs(struct mpt_softc *mpt);
234 #endif
235 static void mpt_pci_intr(void *);
236
237 static device_method_t mpt_methods[] = {
238 /* Device interface */
239 DEVMETHOD(device_probe, mpt_pci_probe),
240 DEVMETHOD(device_attach, mpt_pci_attach),
241 DEVMETHOD(device_detach, mpt_pci_detach),
242 DEVMETHOD(device_shutdown, mpt_pci_shutdown),
243 { 0, 0 }
244 };
245
246 static driver_t mpt_driver = {
247 "mpt", mpt_methods, sizeof(struct mpt_softc)
248 };
249 static devclass_t mpt_devclass;
250 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
251 MODULE_DEPEND(mpt, pci, 1, 1, 1);
252 MODULE_VERSION(mpt, 1);
253
254 static int
255 mpt_pci_probe(device_t dev)
256 {
257 char *desc;
258
259 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) {
260 return (ENXIO);
261 }
262
263 switch (pci_get_device(dev)) {
264 case PCI_PRODUCT_LSI_FC909:
265 desc = "LSILogic FC909 FC Adapter";
266 break;
267 case PCI_PRODUCT_LSI_FC909A:
268 desc = "LSILogic FC909A FC Adapter";
269 break;
270 case PCI_PRODUCT_LSI_FC919:
271 desc = "LSILogic FC919 FC Adapter";
272 break;
273 case PCI_PRODUCT_LSI_FC919_LAN:
274 desc = "LSILogic FC919 LAN Adapter";
275 break;
276 case PCI_PRODUCT_LSI_FC929:
277 desc = "Dual LSILogic FC929 FC Adapter";
278 break;
279 case PCI_PRODUCT_LSI_FC929_LAN:
280 desc = "Dual LSILogic FC929 LAN Adapter";
281 break;
282 case PCI_PRODUCT_LSI_FC919X:
283 desc = "LSILogic FC919 FC PCI-X Adapter";
284 break;
285 case PCI_PRODUCT_LSI_FC919X_LAN:
286 desc = "LSILogic FC919 LAN PCI-X Adapter";
287 break;
288 case PCI_PRODUCT_LSI_FC929X:
289 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
290 break;
291 case PCI_PRODUCT_LSI_FC929X_LAN:
292 desc = "Dual LSILogic FC929X LAN PCI-X Adapter";
293 break;
294 case PCI_PRODUCT_LSI_FC646:
295 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
296 break;
297 case PCI_PRODUCT_LSI_FC7X04X:
298 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
299 break;
300 case PCI_PRODUCT_LSI_1030:
301 case PCI_PRODUCT_LSI_1030ZC:
302 desc = "LSILogic 1030 Ultra4 Adapter";
303 break;
304 case PCI_PRODUCT_LSI_SAS1064:
305 case PCI_PRODUCT_LSI_SAS1064A:
306 case PCI_PRODUCT_LSI_SAS1064E:
307 case PCI_PRODUCT_LSI_SAS1066:
308 case PCI_PRODUCT_LSI_SAS1066E:
309 case PCI_PRODUCT_LSI_SAS1068:
310 case PCI_PRODUCT_LSI_SAS1068A:
311 case PCI_PRODUCT_LSI_SAS1068E:
312 case PCI_PRODUCT_LSI_SAS1068E2:
313 case PCI_PRODUCT_LSI_SAS1078:
314 case PCI_PRODUCT_LSI_SAS1078DE:
315 desc = "LSILogic SAS/SATA Adapter";
316 break;
317 default:
318 return (ENXIO);
319 }
320
321 device_set_desc(dev, desc);
322 return (0);
323 }
324
325 #if __FreeBSD_version < 500000
326 static void
327 mpt_set_options(struct mpt_softc *mpt)
328 {
329 int bitmap;
330
331 bitmap = 0;
332 if (getenv_int("mpt_disable", &bitmap)) {
333 if (bitmap & (1 << mpt->unit)) {
334 mpt->disabled = 1;
335 }
336 }
337 bitmap = 0;
338 if (getenv_int("mpt_debug", &bitmap)) {
339 if (bitmap & (1 << mpt->unit)) {
340 mpt->verbose = MPT_PRT_DEBUG;
341 }
342 }
343 bitmap = 0;
344 if (getenv_int("mpt_debug1", &bitmap)) {
345 if (bitmap & (1 << mpt->unit)) {
346 mpt->verbose = MPT_PRT_DEBUG1;
347 }
348 }
349 bitmap = 0;
350 if (getenv_int("mpt_debug2", &bitmap)) {
351 if (bitmap & (1 << mpt->unit)) {
352 mpt->verbose = MPT_PRT_DEBUG2;
353 }
354 }
355 bitmap = 0;
356 if (getenv_int("mpt_debug3", &bitmap)) {
357 if (bitmap & (1 << mpt->unit)) {
358 mpt->verbose = MPT_PRT_DEBUG3;
359 }
360 }
361
362 mpt->cfg_role = MPT_ROLE_DEFAULT;
363 bitmap = 0;
364 if (getenv_int("mpt_nil_role", &bitmap)) {
365 if (bitmap & (1 << mpt->unit)) {
366 mpt->cfg_role = 0;
367 }
368 mpt->do_cfg_role = 1;
369 }
370 bitmap = 0;
371 if (getenv_int("mpt_tgt_role", &bitmap)) {
372 if (bitmap & (1 << mpt->unit)) {
373 mpt->cfg_role |= MPT_ROLE_TARGET;
374 }
375 mpt->do_cfg_role = 1;
376 }
377 bitmap = 0;
378 if (getenv_int("mpt_ini_role", &bitmap)) {
379 if (bitmap & (1 << mpt->unit)) {
380 mpt->cfg_role |= MPT_ROLE_INITIATOR;
381 }
382 mpt->do_cfg_role = 1;
383 }
384 mpt->msi_enable = 0;
385 }
386 #else
387 static void
388 mpt_set_options(struct mpt_softc *mpt)
389 {
390 int tval;
391
392 tval = 0;
393 if (resource_int_value(device_get_name(mpt->dev),
394 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
395 mpt->disabled = 1;
396 }
397 tval = 0;
398 if (resource_int_value(device_get_name(mpt->dev),
399 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
400 mpt->verbose = tval;
401 }
402 tval = -1;
403 if (resource_int_value(device_get_name(mpt->dev),
404 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 &&
405 tval <= 3) {
406 mpt->cfg_role = tval;
407 mpt->do_cfg_role = 1;
408 }
409 tval = 0;
410 mpt->msi_enable = 0;
411 if (mpt->is_sas)
412 mpt->msi_enable = 1;
413 if (resource_int_value(device_get_name(mpt->dev),
414 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) {
415 mpt->msi_enable = tval;
416 }
417 }
418 #endif
419
420 static void
421 mpt_link_peer(struct mpt_softc *mpt)
422 {
423 struct mpt_softc *mpt2;
424
425 if (mpt->unit == 0) {
426 return;
427 }
428 /*
429 * XXX: depends on probe order
430 */
431 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
432
433 if (mpt2 == NULL) {
434 return;
435 }
436 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
437 return;
438 }
439 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
440 return;
441 }
442 mpt->mpt2 = mpt2;
443 mpt2->mpt2 = mpt;
444 if (mpt->verbose >= MPT_PRT_DEBUG) {
445 mpt_prt(mpt, "linking with peer (mpt%d)\n",
446 device_get_unit(mpt2->dev));
447 }
448 }
449
450 static void
451 mpt_unlink_peer(struct mpt_softc *mpt)
452 {
453
454 if (mpt->mpt2) {
455 mpt->mpt2->mpt2 = NULL;
456 }
457 }
458
459 static int
460 mpt_pci_attach(device_t dev)
461 {
462 struct mpt_softc *mpt;
463 int iqd;
464 uint32_t data, cmd;
465 int mpt_io_bar, mpt_mem_bar;
466
467 /* Allocate the softc structure */
468 mpt = (struct mpt_softc*)device_get_softc(dev);
469 if (mpt == NULL) {
470 device_printf(dev, "cannot allocate softc\n");
471 return (ENOMEM);
472 }
473 memset(mpt, 0, sizeof(struct mpt_softc));
474 switch (pci_get_device(dev)) {
475 case PCI_PRODUCT_LSI_FC909:
476 case PCI_PRODUCT_LSI_FC909A:
477 case PCI_PRODUCT_LSI_FC919:
478 case PCI_PRODUCT_LSI_FC919_LAN:
479 case PCI_PRODUCT_LSI_FC929:
480 case PCI_PRODUCT_LSI_FC929_LAN:
481 case PCI_PRODUCT_LSI_FC929X:
482 case PCI_PRODUCT_LSI_FC929X_LAN:
483 case PCI_PRODUCT_LSI_FC919X:
484 case PCI_PRODUCT_LSI_FC919X_LAN:
485 case PCI_PRODUCT_LSI_FC646:
486 case PCI_PRODUCT_LSI_FC7X04X:
487 mpt->is_fc = 1;
488 break;
489 case PCI_PRODUCT_LSI_SAS1078:
490 case PCI_PRODUCT_LSI_SAS1078DE:
491 mpt->is_1078 = 1;
492 /* FALLTHROUGH */
493 case PCI_PRODUCT_LSI_SAS1064:
494 case PCI_PRODUCT_LSI_SAS1064A:
495 case PCI_PRODUCT_LSI_SAS1064E:
496 case PCI_PRODUCT_LSI_SAS1066:
497 case PCI_PRODUCT_LSI_SAS1066E:
498 case PCI_PRODUCT_LSI_SAS1068:
499 case PCI_PRODUCT_LSI_SAS1068A:
500 case PCI_PRODUCT_LSI_SAS1068E:
501 case PCI_PRODUCT_LSI_SAS1068E2:
502 mpt->is_sas = 1;
503 break;
504 default:
505 mpt->is_spi = 1;
506 break;
507 }
508 mpt->dev = dev;
509 mpt->unit = device_get_unit(dev);
510 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
511 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
512 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
513 mpt->verbose = MPT_PRT_NONE;
514 mpt->role = MPT_ROLE_NONE;
515 mpt->mpt_ini_id = MPT_INI_ID_NONE;
516 #ifdef __sparc64__
517 if (mpt->is_spi)
518 mpt->mpt_ini_id = OF_getscsinitid(dev);
519 #endif
520 mpt_set_options(mpt);
521 if (mpt->verbose == MPT_PRT_NONE) {
522 mpt->verbose = MPT_PRT_WARN;
523 /* Print INFO level (if any) if bootverbose is set */
524 mpt->verbose += (bootverbose != 0)? 1 : 0;
525 }
526 /* Make sure memory access decoders are enabled */
527 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
528 if ((cmd & PCIM_CMD_MEMEN) == 0) {
529 device_printf(dev, "Memory accesses disabled");
530 return (ENXIO);
531 }
532
533 /*
534 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
535 */
536 cmd |=
537 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
538 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
539 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
540
541 /*
542 * Make sure we've disabled the ROM.
543 */
544 data = pci_read_config(dev, PCIR_BIOS, 4);
545 data &= ~1;
546 pci_write_config(dev, PCIR_BIOS, data, 4);
547
548 /*
549 * Is this part a dual?
550 * If so, link with our partner (around yet)
551 */
552 switch (pci_get_device(dev)) {
553 case PCI_PRODUCT_LSI_FC929:
554 case PCI_PRODUCT_LSI_FC929_LAN:
555 case PCI_PRODUCT_LSI_FC646:
556 case PCI_PRODUCT_LSI_FC7X04X:
557 case PCI_PRODUCT_LSI_1030:
558 case PCI_PRODUCT_LSI_1030ZC:
559 mpt_link_peer(mpt);
560 break;
561 default:
562 break;
563 }
564
565 /*
566 * Figure out which are the I/O and MEM Bars
567 */
568 data = pci_read_config(dev, PCIR_BAR(0), 4);
569 if (PCI_BAR_IO(data)) {
570 /* BAR0 is IO, BAR1 is memory */
571 mpt_io_bar = 0;
572 mpt_mem_bar = 1;
573 } else {
574 /* BAR0 is memory, BAR1 is IO */
575 mpt_mem_bar = 0;
576 mpt_io_bar = 1;
577 }
578
579 /*
580 * Set up register access. PIO mode is required for
581 * certain reset operations (but must be disabled for
582 * some cards otherwise).
583 */
584 mpt_io_bar = PCIR_BAR(mpt_io_bar);
585 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
586 &mpt_io_bar, RF_ACTIVE);
587 if (mpt->pci_pio_reg == NULL) {
588 if (bootverbose) {
589 device_printf(dev,
590 "unable to map registers in PIO mode\n");
591 }
592 } else {
593 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
594 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
595 }
596
597 /* Allocate kernel virtual memory for the 9x9's Mem0 region */
598 mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
599 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
600 &mpt_mem_bar, RF_ACTIVE);
601 if (mpt->pci_reg == NULL) {
602 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) {
603 device_printf(dev,
604 "Unable to memory map registers.\n");
605 }
606 if (mpt->is_sas || mpt->pci_pio_reg == NULL) {
607 device_printf(dev, "Giving Up.\n");
608 goto bad;
609 }
610 if (bootverbose) {
611 device_printf(dev, "Falling back to PIO mode.\n");
612 }
613 mpt->pci_st = mpt->pci_pio_st;
614 mpt->pci_sh = mpt->pci_pio_sh;
615 } else {
616 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
617 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
618 }
619
620 /* Get a handle to the interrupt */
621 iqd = 0;
622 if (mpt->msi_enable) {
623 /*
624 * First try to alloc an MSI-X message. If that
625 * fails, then try to alloc an MSI message instead.
626 */
627 if (pci_msix_count(dev) == 1) {
628 mpt->pci_msi_count = 1;
629 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
630 iqd = 1;
631 } else {
632 mpt->pci_msi_count = 0;
633 }
634 }
635 if (iqd == 0 && pci_msi_count(dev) == 1) {
636 mpt->pci_msi_count = 1;
637 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
638 iqd = 1;
639 } else {
640 mpt->pci_msi_count = 0;
641 }
642 }
643 }
644 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
645 RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE));
646 if (mpt->pci_irq == NULL) {
647 device_printf(dev, "could not allocate interrupt\n");
648 goto bad;
649 }
650
651 MPT_LOCK_SETUP(mpt);
652
653 /* Disable interrupts at the part */
654 mpt_disable_ints(mpt);
655
656 /* Register the interrupt handler */
657 if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
658 mpt, &mpt->ih)) {
659 device_printf(dev, "could not setup interrupt\n");
660 goto bad;
661 }
662
663 /* Allocate dma memory */
664 if (mpt_dma_mem_alloc(mpt)) {
665 mpt_prt(mpt, "Could not allocate DMA memory\n");
666 goto bad;
667 }
668
669 /*
670 * Save the PCI config register values
671 *
672 * Hard resets are known to screw up the BAR for diagnostic
673 * memory accesses (Mem1).
674 *
675 * Using Mem1 is known to make the chip stop responding to
676 * configuration space transfers, so we need to save it now
677 */
678
679 mpt_read_config_regs(mpt);
680
681 /*
682 * Disable PIO until we need it
683 */
684 if (mpt->is_sas) {
685 pci_disable_io(dev, SYS_RES_IOPORT);
686 }
687
688 /* Initialize the hardware */
689 if (mpt->disabled == 0) {
690 if (mpt_attach(mpt) != 0) {
691 goto bad;
692 }
693 } else {
694 mpt_prt(mpt, "device disabled at user request\n");
695 goto bad;
696 }
697
698 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
699 dev, SHUTDOWN_PRI_DEFAULT);
700
701 if (mpt->eh == NULL) {
702 mpt_prt(mpt, "shutdown event registration failed\n");
703 (void) mpt_detach(mpt);
704 goto bad;
705 }
706 return (0);
707
708 bad:
709 mpt_dma_mem_free(mpt);
710 mpt_free_bus_resources(mpt);
711 mpt_unlink_peer(mpt);
712
713 MPT_LOCK_DESTROY(mpt);
714
715 /*
716 * but return zero to preserve unit numbering
717 */
718 return (0);
719 }
720
721 /*
722 * Free bus resources
723 */
724 static void
725 mpt_free_bus_resources(struct mpt_softc *mpt)
726 {
727
728 if (mpt->ih) {
729 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
730 mpt->ih = NULL;
731 }
732
733 if (mpt->pci_irq) {
734 bus_release_resource(mpt->dev, SYS_RES_IRQ,
735 rman_get_rid(mpt->pci_irq), mpt->pci_irq);
736 mpt->pci_irq = NULL;
737 }
738
739 if (mpt->pci_msi_count) {
740 pci_release_msi(mpt->dev);
741 mpt->pci_msi_count = 0;
742 }
743
744 if (mpt->pci_pio_reg) {
745 bus_release_resource(mpt->dev, SYS_RES_IOPORT,
746 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg);
747 mpt->pci_pio_reg = NULL;
748 }
749 if (mpt->pci_reg) {
750 bus_release_resource(mpt->dev, SYS_RES_MEMORY,
751 rman_get_rid(mpt->pci_reg), mpt->pci_reg);
752 mpt->pci_reg = NULL;
753 }
754 MPT_LOCK_DESTROY(mpt);
755 }
756
757 /*
758 * Disconnect ourselves from the system.
759 */
760 static int
761 mpt_pci_detach(device_t dev)
762 {
763 struct mpt_softc *mpt;
764
765 mpt = (struct mpt_softc*)device_get_softc(dev);
766
767 if (mpt) {
768 mpt_disable_ints(mpt);
769 mpt_detach(mpt);
770 mpt_reset(mpt, /*reinit*/FALSE);
771 mpt_dma_mem_free(mpt);
772 mpt_free_bus_resources(mpt);
773 mpt_raid_free_mem(mpt);
774 if (mpt->eh != NULL) {
775 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
776 }
777 }
778 return(0);
779 }
780
781 /*
782 * Disable the hardware
783 */
784 static int
785 mpt_pci_shutdown(device_t dev)
786 {
787 struct mpt_softc *mpt;
788
789 mpt = (struct mpt_softc *)device_get_softc(dev);
790 if (mpt) {
791 int r;
792 r = mpt_shutdown(mpt);
793 return (r);
794 }
795 return(0);
796 }
797
798 static int
799 mpt_dma_mem_alloc(struct mpt_softc *mpt)
800 {
801 size_t len;
802 struct mpt_map_info mi;
803
804 /* Check if we alreay have allocated the reply memory */
805 if (mpt->reply_phys != 0) {
806 return 0;
807 }
808
809 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
810 #ifdef RELENG_4
811 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
812 if (mpt->request_pool == NULL) {
813 mpt_prt(mpt, "cannot allocate request pool\n");
814 return (1);
815 }
816 memset(mpt->request_pool, 0, len);
817 #else
818 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
819 if (mpt->request_pool == NULL) {
820 mpt_prt(mpt, "cannot allocate request pool\n");
821 return (1);
822 }
823 #endif
824
825 /*
826 * Create a parent dma tag for this device.
827 *
828 * Align at byte boundaries,
829 * Limit to 32-bit addressing for request/reply queues.
830 */
831 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev),
832 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
833 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
834 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
835 /*nsegments*/BUS_SPACE_UNRESTRICTED,
836 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
837 &mpt->parent_dmat) != 0) {
838 mpt_prt(mpt, "cannot create parent dma tag\n");
839 return (1);
840 }
841
842 /* Create a child tag for reply buffers */
843 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
844 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
845 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
846 &mpt->reply_dmat) != 0) {
847 mpt_prt(mpt, "cannot create a dma tag for replies\n");
848 return (1);
849 }
850
851 /* Allocate some DMA accessible memory for replies */
852 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
853 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
854 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
855 (u_long) (2 * PAGE_SIZE));
856 return (1);
857 }
858
859 mi.mpt = mpt;
860 mi.error = 0;
861
862 /* Load and lock it into "bus space" */
863 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
864 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
865
866 if (mi.error) {
867 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
868 mi.error);
869 return (1);
870 }
871 mpt->reply_phys = mi.phys;
872
873 return (0);
874 }
875
876 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
877 */
878 static void
879 mpt_dma_mem_free(struct mpt_softc *mpt)
880 {
881
882 /* Make sure we aren't double destroying */
883 if (mpt->reply_dmat == 0) {
884 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
885 return;
886 }
887
888 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
889 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
890 bus_dma_tag_destroy(mpt->reply_dmat);
891 bus_dma_tag_destroy(mpt->parent_dmat);
892 mpt->reply_dmat = NULL;
893 free(mpt->request_pool, M_DEVBUF);
894 mpt->request_pool = NULL;
895 }
896
897 /* Reads modifiable (via PCI transactions) config registers */
898 static void
899 mpt_read_config_regs(struct mpt_softc *mpt)
900 {
901
902 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
903 mpt->pci_cfg.LatencyTimer_LineSize =
904 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
905 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
906 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
907 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
908 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
909 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
910 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
911 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
912 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
913 }
914
915 #if 0
916 /* Sets modifiable config registers */
917 static void
918 mpt_set_config_regs(struct mpt_softc *mpt)
919 {
920 uint32_t val;
921
922 #define MPT_CHECK(reg, offset, size) \
923 val = pci_read_config(mpt->dev, offset, size); \
924 if (mpt->pci_cfg.reg != val) { \
925 mpt_prt(mpt, \
926 "Restoring " #reg " to 0x%X from 0x%X\n", \
927 mpt->pci_cfg.reg, val); \
928 }
929
930 if (mpt->verbose >= MPT_PRT_DEBUG) {
931 MPT_CHECK(Command, PCIR_COMMAND, 2);
932 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
933 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
934 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
935 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
936 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
937 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
938 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
939 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
940 MPT_CHECK(PMCSR, 0x44, 4);
941 }
942 #undef MPT_CHECK
943
944 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
945 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
946 mpt->pci_cfg.LatencyTimer_LineSize, 2);
947 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
948 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
949 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
950 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
951 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
952 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
953 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
954 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
955 }
956 #endif
957
958 static void
959 mpt_pci_intr(void *arg)
960 {
961 struct mpt_softc *mpt;
962
963 mpt = (struct mpt_softc *)arg;
964 MPT_LOCK(mpt);
965 mpt_intr(mpt);
966 MPT_UNLOCK(mpt);
967 }
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