The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/mvme/if_ie_mvme.c

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    1 /*      $NetBSD: if_ie_mvme.c,v 1.13 2008/04/28 20:23:54 martin Exp $   */
    2 
    3 /*-
    4  * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Steve C. Woodford.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  *
   19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   29  * POSSIBILITY OF SUCH DAMAGE.
   30  */
   31 
   32 #include <sys/cdefs.h>
   33 __KERNEL_RCSID(0, "$NetBSD: if_ie_mvme.c,v 1.13 2008/04/28 20:23:54 martin Exp $");
   34 
   35 #include <sys/param.h>
   36 #include <sys/systm.h>
   37 #include <sys/mbuf.h>
   38 #include <sys/errno.h>
   39 #include <sys/device.h>
   40 #include <sys/protosw.h>
   41 #include <sys/socket.h>
   42 
   43 #include <net/if.h>
   44 #include <net/if_dl.h>
   45 #include <net/if_types.h>
   46 #include <net/if_ether.h>
   47 #include <net/if_media.h>
   48 
   49 #include <uvm/uvm_extern.h>
   50 
   51 #include <machine/autoconf.h>
   52 #include <sys/cpu.h>
   53 #include <sys/bus.h>
   54 
   55 #include <dev/ic/i82586reg.h>
   56 #include <dev/ic/i82586var.h>
   57 
   58 #include <dev/mvme/if_iereg.h>
   59 #include <dev/mvme/pcctwovar.h>
   60 #include <dev/mvme/pcctworeg.h>
   61 
   62 
   63 int ie_pcctwo_match(struct device *, struct cfdata *, void *);
   64 void ie_pcctwo_attach(struct device *, struct device *, void *);
   65 
   66 struct ie_pcctwo_softc {
   67         struct ie_softc ps_ie;
   68         bus_space_tag_t ps_bust;
   69         bus_space_handle_t ps_bush;
   70         struct evcnt ps_evcnt;
   71 };
   72 
   73 CFATTACH_DECL(ie_pcctwo, sizeof(struct ie_pcctwo_softc),
   74     ie_pcctwo_match, ie_pcctwo_attach, NULL, NULL);
   75 
   76 extern struct cfdriver ie_cd;
   77 
   78 
   79 /* Functions required by the i82586 MI driver */
   80 static void ie_reset(struct ie_softc *, int);
   81 static int ie_intrhook(struct ie_softc *, int);
   82 static void ie_hwinit(struct ie_softc *);
   83 static void ie_atten(struct ie_softc *, int);
   84 
   85 static void ie_copyin(struct ie_softc *, void *, int, size_t);
   86 static void ie_copyout(struct ie_softc *, const void *, int, size_t);
   87 
   88 static u_int16_t ie_read_16(struct ie_softc *, int);
   89 static void ie_write_16(struct ie_softc *, int, u_int16_t);
   90 static void ie_write_24(struct ie_softc *, int, int);
   91 
   92 /*
   93  * i82596 Support Routines for MVME1[67][27] and MVME187 Boards
   94  */
   95 static void
   96 ie_reset(sc, why)
   97         struct ie_softc *sc;
   98         int why;
   99 {
  100         struct ie_pcctwo_softc *ps;
  101         u_int32_t scp_addr;
  102 
  103         ps = (struct ie_pcctwo_softc *) sc;
  104 
  105         switch (why) {
  106         case CHIP_PROBE:
  107         case CARD_RESET:
  108                 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER,
  109                     IE_PORT_RESET);
  110                 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER, 0);
  111                 delay(1000);
  112 
  113                 /*
  114                  * Set the BUSY and BUS_USE bytes here, since the MI code
  115                  * incorrectly assumes it can use byte addressing to set it.
  116                  * (due to wrong-endianess of the chip)
  117                  */
  118                 ie_write_16(sc, IE_ISCP_BUSY(sc->iscp), 1);
  119                 ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE);
  120 
  121                 scp_addr = sc->scp + (u_int) sc->sc_iobase;
  122                 scp_addr |= IE_PORT_ALT_SCP;
  123 
  124                 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER,
  125                     scp_addr & 0xffff);
  126                 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER,
  127                     (scp_addr >> 16) & 0xffff);
  128                 delay(1000);
  129                 break;
  130         }
  131 }
  132 
  133 /* ARGSUSED */
  134 static int
  135 ie_intrhook(sc, when)
  136         struct ie_softc *sc;
  137         int when;
  138 {
  139         struct ie_pcctwo_softc *ps;
  140         u_int8_t reg;
  141 
  142         ps = (struct ie_pcctwo_softc *) sc;
  143 
  144         if (when == INTR_EXIT) {
  145                 reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR);
  146                 reg |= PCCTWO_ICR_ICLR;
  147                 pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg);
  148         }
  149         return (0);
  150 }
  151 
  152 /* ARGSUSED */
  153 static void
  154 ie_hwinit(sc)
  155         struct ie_softc *sc;
  156 {
  157         u_int8_t reg;
  158 
  159         reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR);
  160         reg |= PCCTWO_ICR_IEN | PCCTWO_ICR_ICLR;
  161         pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg);
  162 }
  163 
  164 /* ARGSUSED */
  165 static void
  166 ie_atten(sc, reason)
  167         struct ie_softc *sc;
  168         int reason;
  169 {
  170         struct ie_pcctwo_softc *ps;
  171 
  172         ps = (struct ie_pcctwo_softc *) sc;
  173         bus_space_write_4(ps->ps_bust, ps->ps_bush, IE_MPUREG_CA, 0);
  174 }
  175 
  176 static void
  177 ie_copyin(sc, dst, offset, size)
  178         struct ie_softc *sc;
  179         void *dst;
  180         int offset;
  181         size_t size;
  182 {
  183         if (size == 0)          /* This *can* happen! */
  184                 return;
  185 
  186 #if 0
  187         bus_space_read_region_1(sc->bt, sc->bh, offset, dst, size);
  188 #else
  189         /* A minor optimisation ;-) */
  190         memcpy(dst, (void *) ((u_long) sc->bh + (u_long) offset), size);
  191 #endif
  192 }
  193 
  194 static void
  195 ie_copyout(sc, src, offset, size)
  196         struct ie_softc *sc;
  197         const void *src;
  198         int offset;
  199         size_t size;
  200 {
  201         if (size == 0)          /* This *can* happen! */
  202                 return;
  203 
  204 #if 0
  205         bus_space_write_region_1(sc->bt, sc->bh, offset, src, size);
  206 #else
  207         /* A minor optimisation ;-) */
  208         memcpy((void *) ((u_long) sc->bh + (u_long) offset), src, size);
  209 #endif
  210 }
  211 
  212 static u_int16_t
  213 ie_read_16(sc, offset)
  214         struct ie_softc *sc;
  215         int offset;
  216 {
  217 
  218         return (bus_space_read_2(sc->bt, sc->bh, offset));
  219 }
  220 
  221 static void
  222 ie_write_16(sc, offset, value)
  223         struct ie_softc *sc;
  224         int offset;
  225         u_int16_t value;
  226 {
  227 
  228         bus_space_write_2(sc->bt, sc->bh, offset, value);
  229 }
  230 
  231 static void
  232 ie_write_24(sc, offset, addr)
  233         struct ie_softc *sc;
  234         int offset;
  235         int addr;
  236 {
  237 
  238         addr += (int) sc->sc_iobase;
  239 
  240         bus_space_write_2(sc->bt, sc->bh, offset, addr & 0xffff);
  241         bus_space_write_2(sc->bt, sc->bh, offset + 2, (addr >> 16) & 0x00ff);
  242 }
  243 
  244 /* ARGSUSED */
  245 int
  246 ie_pcctwo_match(parent, cf, args)
  247         struct device *parent;
  248         struct cfdata *cf;
  249         void *args;
  250 {
  251         struct pcctwo_attach_args *pa;
  252 
  253         pa = args;
  254 
  255         if (strcmp(pa->pa_name, ie_cd.cd_name))
  256                 return (0);
  257 
  258         pa->pa_ipl = cf->pcctwocf_ipl;
  259 
  260         return (1);
  261 }
  262 
  263 /* ARGSUSED */
  264 void
  265 ie_pcctwo_attach(parent, self, args)
  266         struct device *parent;
  267         struct device *self;
  268         void *args;
  269 {
  270         struct pcctwo_attach_args *pa;
  271         struct ie_pcctwo_softc *ps;
  272         struct ie_softc *sc;
  273         bus_dma_segment_t seg;
  274         int rseg;
  275 
  276         pa = (struct pcctwo_attach_args *) args;
  277         ps = device_private(self);
  278         sc = device_private(self);
  279 
  280         /* Map the MPU controller registers in PCCTWO space */
  281         ps->ps_bust = pa->pa_bust;
  282         bus_space_map(pa->pa_bust, pa->pa_offset, IE_MPUREG_SIZE,
  283             0, &ps->ps_bush);
  284 
  285         /* Get contiguous DMA-able memory for the IE chip */
  286         if (bus_dmamem_alloc(pa->pa_dmat, ether_data_buff_size, PAGE_SIZE, 0,
  287                 &seg, 1, &rseg,
  288                 BUS_DMA_NOWAIT | BUS_DMA_ONBOARD_RAM | BUS_DMA_24BIT) != 0) {
  289                 aprint_error_dev(self, "Failed to allocate ether buffer\n");
  290                 return;
  291         }
  292         if (bus_dmamem_map(pa->pa_dmat, &seg, rseg, ether_data_buff_size,
  293             (void **) & sc->sc_maddr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) {
  294                 aprint_error_dev(self, "Failed to map ether buffer\n");
  295                 bus_dmamem_free(pa->pa_dmat, &seg, rseg);
  296                 return;
  297         }
  298         sc->bt = pa->pa_bust;
  299         sc->bh = (bus_space_handle_t) sc->sc_maddr;     /* XXXSCW Better way? */
  300         sc->sc_iobase = (void *) seg.ds_addr;
  301         sc->sc_msize = ether_data_buff_size;
  302         memset(sc->sc_maddr, 0, ether_data_buff_size);
  303 
  304         sc->hwreset = ie_reset;
  305         sc->hwinit = ie_hwinit;
  306         sc->chan_attn = ie_atten;
  307         sc->intrhook = ie_intrhook;
  308         sc->memcopyin = ie_copyin;
  309         sc->memcopyout = ie_copyout;
  310         sc->ie_bus_barrier = NULL;
  311         sc->ie_bus_read16 = ie_read_16;
  312         sc->ie_bus_write16 = ie_write_16;
  313         sc->ie_bus_write24 = ie_write_24;
  314         sc->sc_mediachange = NULL;
  315         sc->sc_mediastatus = NULL;
  316 
  317         sc->scp = 0;
  318         sc->iscp = sc->scp + ((IE_SCP_SZ + 15) & ~15);
  319         sc->scb = sc->iscp + IE_ISCP_SZ;
  320         sc->buf_area = sc->scb + IE_SCB_SZ;
  321         sc->buf_area_sz = sc->sc_msize - (sc->buf_area - sc->scp);
  322 
  323         /*
  324          * BUS_USE -> Interrupt Active High (edge-triggered),
  325          *            Lock function enabled,
  326          *            Internal bus throttle timer triggering,
  327          *            82586 operating mode.
  328          */
  329         ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE);
  330         ie_write_24(sc, IE_SCP_ISCP(sc->scp), sc->iscp);
  331         ie_write_16(sc, IE_ISCP_SCB(sc->iscp), sc->scb);
  332         ie_write_24(sc, IE_ISCP_BASE(sc->iscp), sc->scp);
  333 
  334         /* This has the side-effect of resetting the chip */
  335         i82586_proberam(sc);
  336 
  337         /* Attach the MI back-end */
  338         i82586_attach(sc, "onboard", mvme_ea, NULL, 0, 0);
  339 
  340         /* Register the event counter */
  341         evcnt_attach_dynamic(&ps->ps_evcnt, EVCNT_TYPE_INTR,
  342             pcctwointr_evcnt(pa->pa_ipl), "ether", device_xname(&sc->sc_dev));
  343 
  344         /* Finally, hook the hardware interrupt */
  345         pcctwointr_establish(PCCTWOV_LANC_IRQ, i82586_intr, pa->pa_ipl, sc,
  346             &ps->ps_evcnt);
  347 }

Cache object: e9946d8ecda33ecb3d6699434d55db49


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