The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/my/if_my.c

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    1 /*-
    2  * Written by: yen_cw@myson.com.tw
    3  * Copyright (c) 2002 Myson Technology Inc.
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions, and the following disclaimer,
   11  *    without modification, immediately at the beginning of the file.
   12  * 2. The name of the author may not be used to endorse or promote products
   13  *    derived from this software without specific prior written permission.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
   19  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  * Myson fast ethernet PCI NIC driver, available at: http://www.myson.com.tw/
   28  */
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD: src/sys/dev/my/if_my.c,v 1.26.2.1 2006/01/29 15:39:05 emaste Exp $");
   32 
   33 #include <sys/param.h>
   34 #include <sys/systm.h>
   35 #include <sys/sockio.h>
   36 #include <sys/mbuf.h>
   37 #include <sys/malloc.h>
   38 #include <sys/kernel.h>
   39 #include <sys/socket.h>
   40 #include <sys/queue.h>
   41 #include <sys/types.h>
   42 #include <sys/bus.h>
   43 #include <sys/module.h>
   44 #include <sys/lock.h>
   45 #include <sys/mutex.h>
   46 
   47 #define NBPFILTER       1
   48 
   49 #include <net/if.h>
   50 #include <net/if_arp.h>
   51 #include <net/ethernet.h>
   52 #include <net/if_media.h>
   53 #include <net/if_dl.h>
   54 #include <net/bpf.h>
   55 
   56 #include <vm/vm.h>              /* for vtophys */
   57 #include <vm/pmap.h>            /* for vtophys */
   58 #include <machine/clock.h>      /* for DELAY */
   59 #include <machine/bus_memio.h>
   60 #include <machine/bus_pio.h>
   61 #include <machine/bus.h>
   62 #include <machine/resource.h>
   63 #include <sys/bus.h>
   64 #include <sys/rman.h>
   65 
   66 #include <dev/pci/pcireg.h>
   67 #include <dev/pci/pcivar.h>
   68 
   69 #include <dev/mii/mii.h>
   70 #include <dev/mii/miivar.h>
   71 
   72 #include "miibus_if.h"
   73 
   74 /*
   75  * #define MY_USEIOSPACE
   76  */
   77 
   78 static int      MY_USEIOSPACE = 1;
   79 
   80 #if (MY_USEIOSPACE)
   81 #define MY_RES                  SYS_RES_IOPORT
   82 #define MY_RID                  MY_PCI_LOIO
   83 #else
   84 #define MY_RES                  SYS_RES_MEMORY
   85 #define MY_RID                  MY_PCI_LOMEM
   86 #endif
   87 
   88 
   89 #include <dev/my/if_myreg.h>
   90 
   91 #ifndef lint
   92 static          const char rcsid[] =
   93 "$Id$";
   94 #endif
   95 
   96 /*
   97  * Various supported device vendors/types and their names.
   98  */
   99 struct my_type *my_info_tmp;
  100 static struct my_type my_devs[] = {
  101         {MYSONVENDORID, MTD800ID, "Myson MTD80X Based Fast Ethernet Card"},
  102         {MYSONVENDORID, MTD803ID, "Myson MTD80X Based Fast Ethernet Card"},
  103         {MYSONVENDORID, MTD891ID, "Myson MTD89X Based Giga Ethernet Card"},
  104         {0, 0, NULL}
  105 };
  106 
  107 /*
  108  * Various supported PHY vendors/types and their names. Note that this driver
  109  * will work with pretty much any MII-compliant PHY, so failure to positively
  110  * identify the chip is not a fatal error.
  111  */
  112 static struct my_type my_phys[] = {
  113         {MysonPHYID0, MysonPHYID0, "<MYSON MTD981>"},
  114         {SeeqPHYID0, SeeqPHYID0, "<SEEQ 80225>"},
  115         {AhdocPHYID0, AhdocPHYID0, "<AHDOC 101>"},
  116         {MarvellPHYID0, MarvellPHYID0, "<MARVELL 88E1000>"},
  117         {LevelOnePHYID0, LevelOnePHYID0, "<LevelOne LXT1000>"},
  118         {0, 0, "<MII-compliant physical interface>"}
  119 };
  120 
  121 static int      my_probe(device_t);
  122 static int      my_attach(device_t);
  123 static int      my_detach(device_t);
  124 static int      my_newbuf(struct my_softc *, struct my_chain_onefrag *);
  125 static int      my_encap(struct my_softc *, struct my_chain *, struct mbuf *);
  126 static void     my_rxeof(struct my_softc *);
  127 static void     my_txeof(struct my_softc *);
  128 static void     my_txeoc(struct my_softc *);
  129 static void     my_intr(void *);
  130 static void     my_start(struct ifnet *);
  131 static int      my_ioctl(struct ifnet *, u_long, caddr_t);
  132 static void     my_init(void *);
  133 static void     my_stop(struct my_softc *);
  134 static void     my_watchdog(struct ifnet *);
  135 static void     my_shutdown(device_t);
  136 static int      my_ifmedia_upd(struct ifnet *);
  137 static void     my_ifmedia_sts(struct ifnet *, struct ifmediareq *);
  138 static u_int16_t my_phy_readreg(struct my_softc *, int);
  139 static void     my_phy_writereg(struct my_softc *, int, int);
  140 static void     my_autoneg_xmit(struct my_softc *);
  141 static void     my_autoneg_mii(struct my_softc *, int, int);
  142 static void     my_setmode_mii(struct my_softc *, int);
  143 static void     my_getmode_mii(struct my_softc *);
  144 static void     my_setcfg(struct my_softc *, int);
  145 static void     my_setmulti(struct my_softc *);
  146 static void     my_reset(struct my_softc *);
  147 static int      my_list_rx_init(struct my_softc *);
  148 static int      my_list_tx_init(struct my_softc *);
  149 static long     my_send_cmd_to_phy(struct my_softc *, int, int);
  150 
  151 #define MY_SETBIT(sc, reg, x) CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x))
  152 #define MY_CLRBIT(sc, reg, x) CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x))
  153 
  154 static device_method_t my_methods[] = {
  155         /* Device interface */
  156         DEVMETHOD(device_probe, my_probe),
  157         DEVMETHOD(device_attach, my_attach),
  158         DEVMETHOD(device_detach, my_detach),
  159         DEVMETHOD(device_shutdown, my_shutdown),
  160 
  161         {0, 0}
  162 };
  163 
  164 static driver_t my_driver = {
  165         "my",
  166         my_methods,
  167         sizeof(struct my_softc)
  168 };
  169 
  170 static devclass_t my_devclass;
  171 
  172 DRIVER_MODULE(my, pci, my_driver, my_devclass, 0, 0);
  173 MODULE_DEPEND(my, pci, 1, 1, 1);
  174 MODULE_DEPEND(my, ether, 1, 1, 1);
  175 
  176 static long
  177 my_send_cmd_to_phy(struct my_softc * sc, int opcode, int regad)
  178 {
  179         long            miir;
  180         int             i;
  181         int             mask, data;
  182 
  183         MY_LOCK(sc);
  184 
  185         /* enable MII output */
  186         miir = CSR_READ_4(sc, MY_MANAGEMENT);
  187         miir &= 0xfffffff0;
  188 
  189         miir |= MY_MASK_MIIR_MII_WRITE + MY_MASK_MIIR_MII_MDO;
  190 
  191         /* send 32 1's preamble */
  192         for (i = 0; i < 32; i++) {
  193                 /* low MDC; MDO is already high (miir) */
  194                 miir &= ~MY_MASK_MIIR_MII_MDC;
  195                 CSR_WRITE_4(sc, MY_MANAGEMENT, miir);
  196 
  197                 /* high MDC */
  198                 miir |= MY_MASK_MIIR_MII_MDC;
  199                 CSR_WRITE_4(sc, MY_MANAGEMENT, miir);
  200         }
  201 
  202         /* calculate ST+OP+PHYAD+REGAD+TA */
  203         data = opcode | (sc->my_phy_addr << 7) | (regad << 2);
  204 
  205         /* sent out */
  206         mask = 0x8000;
  207         while (mask) {
  208                 /* low MDC, prepare MDO */
  209                 miir &= ~(MY_MASK_MIIR_MII_MDC + MY_MASK_MIIR_MII_MDO);
  210                 if (mask & data)
  211                         miir |= MY_MASK_MIIR_MII_MDO;
  212 
  213                 CSR_WRITE_4(sc, MY_MANAGEMENT, miir);
  214                 /* high MDC */
  215                 miir |= MY_MASK_MIIR_MII_MDC;
  216                 CSR_WRITE_4(sc, MY_MANAGEMENT, miir);
  217                 DELAY(30);
  218 
  219                 /* next */
  220                 mask >>= 1;
  221                 if (mask == 0x2 && opcode == MY_OP_READ)
  222                         miir &= ~MY_MASK_MIIR_MII_WRITE;
  223         }
  224 
  225         MY_UNLOCK(sc);
  226         return miir;
  227 }
  228 
  229 
  230 static          u_int16_t
  231 my_phy_readreg(struct my_softc * sc, int reg)
  232 {
  233         long            miir;
  234         int             mask, data;
  235 
  236         MY_LOCK(sc);
  237 
  238         if (sc->my_info->my_did == MTD803ID)
  239                 data = CSR_READ_2(sc, MY_PHYBASE + reg * 2);
  240         else {
  241                 miir = my_send_cmd_to_phy(sc, MY_OP_READ, reg);
  242 
  243                 /* read data */
  244                 mask = 0x8000;
  245                 data = 0;
  246                 while (mask) {
  247                         /* low MDC */
  248                         miir &= ~MY_MASK_MIIR_MII_MDC;
  249                         CSR_WRITE_4(sc, MY_MANAGEMENT, miir);
  250 
  251                         /* read MDI */
  252                         miir = CSR_READ_4(sc, MY_MANAGEMENT);
  253                         if (miir & MY_MASK_MIIR_MII_MDI)
  254                                 data |= mask;
  255 
  256                         /* high MDC, and wait */
  257                         miir |= MY_MASK_MIIR_MII_MDC;
  258                         CSR_WRITE_4(sc, MY_MANAGEMENT, miir);
  259                         DELAY(30);
  260 
  261                         /* next */
  262                         mask >>= 1;
  263                 }
  264 
  265                 /* low MDC */
  266                 miir &= ~MY_MASK_MIIR_MII_MDC;
  267                 CSR_WRITE_4(sc, MY_MANAGEMENT, miir);
  268         }
  269 
  270         MY_UNLOCK(sc);
  271         return (u_int16_t) data;
  272 }
  273 
  274 
  275 static void
  276 my_phy_writereg(struct my_softc * sc, int reg, int data)
  277 {
  278         long            miir;
  279         int             mask;
  280 
  281         MY_LOCK(sc);
  282 
  283         if (sc->my_info->my_did == MTD803ID)
  284                 CSR_WRITE_2(sc, MY_PHYBASE + reg * 2, data);
  285         else {
  286                 miir = my_send_cmd_to_phy(sc, MY_OP_WRITE, reg);
  287 
  288                 /* write data */
  289                 mask = 0x8000;
  290                 while (mask) {
  291                         /* low MDC, prepare MDO */
  292                         miir &= ~(MY_MASK_MIIR_MII_MDC + MY_MASK_MIIR_MII_MDO);
  293                         if (mask & data)
  294                                 miir |= MY_MASK_MIIR_MII_MDO;
  295                         CSR_WRITE_4(sc, MY_MANAGEMENT, miir);
  296                         DELAY(1);
  297 
  298                         /* high MDC */
  299                         miir |= MY_MASK_MIIR_MII_MDC;
  300                         CSR_WRITE_4(sc, MY_MANAGEMENT, miir);
  301                         DELAY(1);
  302 
  303                         /* next */
  304                         mask >>= 1;
  305                 }
  306 
  307                 /* low MDC */
  308                 miir &= ~MY_MASK_MIIR_MII_MDC;
  309                 CSR_WRITE_4(sc, MY_MANAGEMENT, miir);
  310         }
  311         MY_UNLOCK(sc);
  312         return;
  313 }
  314 
  315 
  316 /*
  317  * Program the 64-bit multicast hash filter.
  318  */
  319 static void
  320 my_setmulti(struct my_softc * sc)
  321 {
  322         struct ifnet   *ifp;
  323         int             h = 0;
  324         u_int32_t       hashes[2] = {0, 0};
  325         struct ifmultiaddr *ifma;
  326         u_int32_t       rxfilt;
  327         int             mcnt = 0;
  328 
  329         MY_LOCK(sc);
  330 
  331         ifp = &sc->arpcom.ac_if;
  332 
  333         rxfilt = CSR_READ_4(sc, MY_TCRRCR);
  334 
  335         if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
  336                 rxfilt |= MY_AM;
  337                 CSR_WRITE_4(sc, MY_TCRRCR, rxfilt);
  338                 CSR_WRITE_4(sc, MY_MAR0, 0xFFFFFFFF);
  339                 CSR_WRITE_4(sc, MY_MAR1, 0xFFFFFFFF);
  340 
  341                 MY_UNLOCK(sc);
  342 
  343                 return;
  344         }
  345         /* first, zot all the existing hash bits */
  346         CSR_WRITE_4(sc, MY_MAR0, 0);
  347         CSR_WRITE_4(sc, MY_MAR1, 0);
  348 
  349         /* now program new ones */
  350         IF_ADDR_LOCK(ifp);
  351         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
  352                 if (ifma->ifma_addr->sa_family != AF_LINK)
  353                         continue;
  354                 h = ~ether_crc32_be(LLADDR((struct sockaddr_dl *)
  355                     ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
  356                 if (h < 32)
  357                         hashes[0] |= (1 << h);
  358                 else
  359                         hashes[1] |= (1 << (h - 32));
  360                 mcnt++;
  361         }
  362         IF_ADDR_UNLOCK(ifp);
  363 
  364         if (mcnt)
  365                 rxfilt |= MY_AM;
  366         else
  367                 rxfilt &= ~MY_AM;
  368         CSR_WRITE_4(sc, MY_MAR0, hashes[0]);
  369         CSR_WRITE_4(sc, MY_MAR1, hashes[1]);
  370         CSR_WRITE_4(sc, MY_TCRRCR, rxfilt);
  371         MY_UNLOCK(sc);
  372         return;
  373 }
  374 
  375 /*
  376  * Initiate an autonegotiation session.
  377  */
  378 static void
  379 my_autoneg_xmit(struct my_softc * sc)
  380 {
  381         u_int16_t       phy_sts = 0;
  382 
  383         MY_LOCK(sc);
  384 
  385         my_phy_writereg(sc, PHY_BMCR, PHY_BMCR_RESET);
  386         DELAY(500);
  387         while (my_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_RESET);
  388 
  389         phy_sts = my_phy_readreg(sc, PHY_BMCR);
  390         phy_sts |= PHY_BMCR_AUTONEGENBL | PHY_BMCR_AUTONEGRSTR;
  391         my_phy_writereg(sc, PHY_BMCR, phy_sts);
  392 
  393         MY_UNLOCK(sc);
  394         return;
  395 }
  396 
  397 
  398 /*
  399  * Invoke autonegotiation on a PHY.
  400  */
  401 static void
  402 my_autoneg_mii(struct my_softc * sc, int flag, int verbose)
  403 {
  404         u_int16_t       phy_sts = 0, media, advert, ability;
  405         u_int16_t       ability2 = 0;
  406         struct ifnet   *ifp;
  407         struct ifmedia *ifm;
  408 
  409         MY_LOCK(sc);
  410 
  411         ifm = &sc->ifmedia;
  412         ifp = &sc->arpcom.ac_if;
  413 
  414         ifm->ifm_media = IFM_ETHER | IFM_AUTO;
  415 
  416 #ifndef FORCE_AUTONEG_TFOUR
  417         /*
  418          * First, see if autoneg is supported. If not, there's no point in
  419          * continuing.
  420          */
  421         phy_sts = my_phy_readreg(sc, PHY_BMSR);
  422         if (!(phy_sts & PHY_BMSR_CANAUTONEG)) {
  423                 if (verbose)
  424                         printf("my%d: autonegotiation not supported\n",
  425                             sc->my_unit);
  426                 ifm->ifm_media = IFM_ETHER | IFM_10_T | IFM_HDX;
  427                 MY_UNLOCK(sc);
  428                 return;
  429         }
  430 #endif
  431         switch (flag) {
  432         case MY_FLAG_FORCEDELAY:
  433                 /*
  434                  * XXX Never use this option anywhere but in the probe
  435                  * routine: making the kernel stop dead in its tracks for
  436                  * three whole seconds after we've gone multi-user is really
  437                  * bad manners.
  438                  */
  439                 my_autoneg_xmit(sc);
  440                 DELAY(5000000);
  441                 break;
  442         case MY_FLAG_SCHEDDELAY:
  443                 /*
  444                  * Wait for the transmitter to go idle before starting an
  445                  * autoneg session, otherwise my_start() may clobber our
  446                  * timeout, and we don't want to allow transmission during an
  447                  * autoneg session since that can screw it up.
  448                  */
  449                 if (sc->my_cdata.my_tx_head != NULL) {
  450                         sc->my_want_auto = 1;
  451                         MY_UNLOCK(sc);
  452                         return;
  453                 }
  454                 my_autoneg_xmit(sc);
  455                 ifp->if_timer = 5;
  456                 sc->my_autoneg = 1;
  457                 sc->my_want_auto = 0;
  458                 MY_UNLOCK(sc);
  459                 return;
  460         case MY_FLAG_DELAYTIMEO:
  461                 ifp->if_timer = 0;
  462                 sc->my_autoneg = 0;
  463                 break;
  464         default:
  465                 printf("my%d: invalid autoneg flag: %d\n", sc->my_unit, flag);
  466                 MY_UNLOCK(sc);
  467                 return;
  468         }
  469 
  470         if (my_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_AUTONEGCOMP) {
  471                 if (verbose)
  472                         printf("my%d: autoneg complete, ", sc->my_unit);
  473                 phy_sts = my_phy_readreg(sc, PHY_BMSR);
  474         } else {
  475                 if (verbose)
  476                         printf("my%d: autoneg not complete, ", sc->my_unit);
  477         }
  478 
  479         media = my_phy_readreg(sc, PHY_BMCR);
  480 
  481         /* Link is good. Report modes and set duplex mode. */
  482         if (my_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT) {
  483                 if (verbose)
  484                         printf("my%d: link status good. ", sc->my_unit);
  485                 advert = my_phy_readreg(sc, PHY_ANAR);
  486                 ability = my_phy_readreg(sc, PHY_LPAR);
  487                 if ((sc->my_pinfo->my_vid == MarvellPHYID0) ||
  488                     (sc->my_pinfo->my_vid == LevelOnePHYID0)) {
  489                         ability2 = my_phy_readreg(sc, PHY_1000SR);
  490                         if (ability2 & PHY_1000SR_1000BTXFULL) {
  491                                 advert = 0;
  492                                 ability = 0;
  493                                 /*
  494                                  * this version did not support 1000M,
  495                                  * ifm->ifm_media =
  496                                  * IFM_ETHER|IFM_1000_T|IFM_FDX;
  497                                  */
  498                                 ifm->ifm_media =
  499                                     IFM_ETHER | IFM_100_TX | IFM_FDX;
  500                                 media &= ~PHY_BMCR_SPEEDSEL;
  501                                 media |= PHY_BMCR_1000;
  502                                 media |= PHY_BMCR_DUPLEX;
  503                                 printf("(full-duplex, 1000Mbps)\n");
  504                         } else if (ability2 & PHY_1000SR_1000BTXHALF) {
  505                                 advert = 0;
  506                                 ability = 0;
  507                                 /*
  508                                  * this version did not support 1000M,
  509                                  * ifm->ifm_media = IFM_ETHER|IFM_1000_T;
  510                                  */
  511                                 ifm->ifm_media = IFM_ETHER | IFM_100_TX;
  512                                 media &= ~PHY_BMCR_SPEEDSEL;
  513                                 media &= ~PHY_BMCR_DUPLEX;
  514                                 media |= PHY_BMCR_1000;
  515                                 printf("(half-duplex, 1000Mbps)\n");
  516                         }
  517                 }
  518                 if (advert & PHY_ANAR_100BT4 && ability & PHY_ANAR_100BT4) {
  519                         ifm->ifm_media = IFM_ETHER | IFM_100_T4;
  520                         media |= PHY_BMCR_SPEEDSEL;
  521                         media &= ~PHY_BMCR_DUPLEX;
  522                         printf("(100baseT4)\n");
  523                 } else if (advert & PHY_ANAR_100BTXFULL &&
  524                            ability & PHY_ANAR_100BTXFULL) {
  525                         ifm->ifm_media = IFM_ETHER | IFM_100_TX | IFM_FDX;
  526                         media |= PHY_BMCR_SPEEDSEL;
  527                         media |= PHY_BMCR_DUPLEX;
  528                         printf("(full-duplex, 100Mbps)\n");
  529                 } else if (advert & PHY_ANAR_100BTXHALF &&
  530                            ability & PHY_ANAR_100BTXHALF) {
  531                         ifm->ifm_media = IFM_ETHER | IFM_100_TX | IFM_HDX;
  532                         media |= PHY_BMCR_SPEEDSEL;
  533                         media &= ~PHY_BMCR_DUPLEX;
  534                         printf("(half-duplex, 100Mbps)\n");
  535                 } else if (advert & PHY_ANAR_10BTFULL &&
  536                            ability & PHY_ANAR_10BTFULL) {
  537                         ifm->ifm_media = IFM_ETHER | IFM_10_T | IFM_FDX;
  538                         media &= ~PHY_BMCR_SPEEDSEL;
  539                         media |= PHY_BMCR_DUPLEX;
  540                         printf("(full-duplex, 10Mbps)\n");
  541                 } else if (advert) {
  542                         ifm->ifm_media = IFM_ETHER | IFM_10_T | IFM_HDX;
  543                         media &= ~PHY_BMCR_SPEEDSEL;
  544                         media &= ~PHY_BMCR_DUPLEX;
  545                         printf("(half-duplex, 10Mbps)\n");
  546                 }
  547                 media &= ~PHY_BMCR_AUTONEGENBL;
  548 
  549                 /* Set ASIC's duplex mode to match the PHY. */
  550                 my_phy_writereg(sc, PHY_BMCR, media);
  551                 my_setcfg(sc, media);
  552         } else {
  553                 if (verbose)
  554                         printf("my%d: no carrier\n", sc->my_unit);
  555         }
  556 
  557         my_init(sc);
  558         if (sc->my_tx_pend) {
  559                 sc->my_autoneg = 0;
  560                 sc->my_tx_pend = 0;
  561                 my_start(ifp);
  562         }
  563         MY_UNLOCK(sc);
  564         return;
  565 }
  566 
  567 /*
  568  * To get PHY ability.
  569  */
  570 static void
  571 my_getmode_mii(struct my_softc * sc)
  572 {
  573         u_int16_t       bmsr;
  574         struct ifnet   *ifp;
  575 
  576         MY_LOCK(sc);
  577         ifp = &sc->arpcom.ac_if;
  578         bmsr = my_phy_readreg(sc, PHY_BMSR);
  579         if (bootverbose)
  580                 printf("my%d: PHY status word: %x\n", sc->my_unit, bmsr);
  581 
  582         /* fallback */
  583         sc->ifmedia.ifm_media = IFM_ETHER | IFM_10_T | IFM_HDX;
  584 
  585         if (bmsr & PHY_BMSR_10BTHALF) {
  586                 if (bootverbose)
  587                         printf("my%d: 10Mbps half-duplex mode supported\n",
  588                                sc->my_unit);
  589                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_10_T | IFM_HDX,
  590                     0, NULL);
  591                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_10_T, 0, NULL);
  592         }
  593         if (bmsr & PHY_BMSR_10BTFULL) {
  594                 if (bootverbose)
  595                         printf("my%d: 10Mbps full-duplex mode supported\n",
  596                             sc->my_unit);
  597 
  598                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_10_T | IFM_FDX,
  599                     0, NULL);
  600                 sc->ifmedia.ifm_media = IFM_ETHER | IFM_10_T | IFM_FDX;
  601         }
  602         if (bmsr & PHY_BMSR_100BTXHALF) {
  603                 if (bootverbose)
  604                         printf("my%d: 100Mbps half-duplex mode supported\n",
  605                                sc->my_unit);
  606                 ifp->if_baudrate = 100000000;
  607                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_100_TX, 0, NULL);
  608                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_100_TX | IFM_HDX,
  609                             0, NULL);
  610                 sc->ifmedia.ifm_media = IFM_ETHER | IFM_100_TX | IFM_HDX;
  611         }
  612         if (bmsr & PHY_BMSR_100BTXFULL) {
  613                 if (bootverbose)
  614                         printf("my%d: 100Mbps full-duplex mode supported\n",
  615                             sc->my_unit);
  616                 ifp->if_baudrate = 100000000;
  617                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_100_TX | IFM_FDX,
  618                     0, NULL);
  619                 sc->ifmedia.ifm_media = IFM_ETHER | IFM_100_TX | IFM_FDX;
  620         }
  621         /* Some also support 100BaseT4. */
  622         if (bmsr & PHY_BMSR_100BT4) {
  623                 if (bootverbose)
  624                         printf("my%d: 100baseT4 mode supported\n", sc->my_unit);
  625                 ifp->if_baudrate = 100000000;
  626                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_100_T4, 0, NULL);
  627                 sc->ifmedia.ifm_media = IFM_ETHER | IFM_100_T4;
  628 #ifdef FORCE_AUTONEG_TFOUR
  629                 if (bootverbose)
  630                         printf("my%d: forcing on autoneg support for BT4\n",
  631                             sc->my_unit);
  632                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_AUTO, 0 NULL):
  633                 sc->ifmedia.ifm_media = IFM_ETHER | IFM_AUTO;
  634 #endif
  635         }
  636 #if 0                           /* this version did not support 1000M, */
  637         if (sc->my_pinfo->my_vid == MarvellPHYID0) {
  638                 if (bootverbose)
  639                         printf("my%d: 1000Mbps half-duplex mode supported\n",
  640                                sc->my_unit);
  641 
  642                 ifp->if_baudrate = 1000000000;
  643                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_1000_T, 0, NULL);
  644                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_1000_T | IFM_HDX,
  645                     0, NULL);
  646                 if (bootverbose)
  647                         printf("my%d: 1000Mbps full-duplex mode supported\n",
  648                            sc->my_unit);
  649                 ifp->if_baudrate = 1000000000;
  650                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_1000_T | IFM_FDX,
  651                     0, NULL);
  652                 sc->ifmedia.ifm_media = IFM_ETHER | IFM_1000_T | IFM_FDX;
  653         }
  654 #endif
  655         if (bmsr & PHY_BMSR_CANAUTONEG) {
  656                 if (bootverbose)
  657                         printf("my%d: autoneg supported\n", sc->my_unit);
  658                 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL);
  659                 sc->ifmedia.ifm_media = IFM_ETHER | IFM_AUTO;
  660         }
  661         MY_UNLOCK(sc);
  662         return;
  663 }
  664 
  665 /*
  666  * Set speed and duplex mode.
  667  */
  668 static void
  669 my_setmode_mii(struct my_softc * sc, int media)
  670 {
  671         u_int16_t       bmcr;
  672         struct ifnet   *ifp;
  673 
  674         MY_LOCK(sc);
  675         ifp = &sc->arpcom.ac_if;
  676         /*
  677          * If an autoneg session is in progress, stop it.
  678          */
  679         if (sc->my_autoneg) {
  680                 printf("my%d: canceling autoneg session\n", sc->my_unit);
  681                 ifp->if_timer = sc->my_autoneg = sc->my_want_auto = 0;
  682                 bmcr = my_phy_readreg(sc, PHY_BMCR);
  683                 bmcr &= ~PHY_BMCR_AUTONEGENBL;
  684                 my_phy_writereg(sc, PHY_BMCR, bmcr);
  685         }
  686         printf("my%d: selecting MII, ", sc->my_unit);
  687         bmcr = my_phy_readreg(sc, PHY_BMCR);
  688         bmcr &= ~(PHY_BMCR_AUTONEGENBL | PHY_BMCR_SPEEDSEL | PHY_BMCR_1000 |
  689                   PHY_BMCR_DUPLEX | PHY_BMCR_LOOPBK);
  690 
  691 #if 0                           /* this version did not support 1000M, */
  692         if (IFM_SUBTYPE(media) == IFM_1000_T) {
  693                 printf("1000Mbps/T4, half-duplex\n");
  694                 bmcr &= ~PHY_BMCR_SPEEDSEL;
  695                 bmcr &= ~PHY_BMCR_DUPLEX;
  696                 bmcr |= PHY_BMCR_1000;
  697         }
  698 #endif
  699         if (IFM_SUBTYPE(media) == IFM_100_T4) {
  700                 printf("100Mbps/T4, half-duplex\n");
  701                 bmcr |= PHY_BMCR_SPEEDSEL;
  702                 bmcr &= ~PHY_BMCR_DUPLEX;
  703         }
  704         if (IFM_SUBTYPE(media) == IFM_100_TX) {
  705                 printf("100Mbps, ");
  706                 bmcr |= PHY_BMCR_SPEEDSEL;
  707         }
  708         if (IFM_SUBTYPE(media) == IFM_10_T) {
  709                 printf("10Mbps, ");
  710                 bmcr &= ~PHY_BMCR_SPEEDSEL;
  711         }
  712         if ((media & IFM_GMASK) == IFM_FDX) {
  713                 printf("full duplex\n");
  714                 bmcr |= PHY_BMCR_DUPLEX;
  715         } else {
  716                 printf("half duplex\n");
  717                 bmcr &= ~PHY_BMCR_DUPLEX;
  718         }
  719         my_phy_writereg(sc, PHY_BMCR, bmcr);
  720         my_setcfg(sc, bmcr);
  721         MY_UNLOCK(sc);
  722         return;
  723 }
  724 
  725 /*
  726  * The Myson manual states that in order to fiddle with the 'full-duplex' and
  727  * '100Mbps' bits in the netconfig register, we first have to put the
  728  * transmit and/or receive logic in the idle state.
  729  */
  730 static void
  731 my_setcfg(struct my_softc * sc, int bmcr)
  732 {
  733         int             i, restart = 0;
  734 
  735         MY_LOCK(sc);
  736         if (CSR_READ_4(sc, MY_TCRRCR) & (MY_TE | MY_RE)) {
  737                 restart = 1;
  738                 MY_CLRBIT(sc, MY_TCRRCR, (MY_TE | MY_RE));
  739                 for (i = 0; i < MY_TIMEOUT; i++) {
  740                         DELAY(10);
  741                         if (!(CSR_READ_4(sc, MY_TCRRCR) &
  742                             (MY_TXRUN | MY_RXRUN)))
  743                                 break;
  744                 }
  745                 if (i == MY_TIMEOUT)
  746                         printf("my%d: failed to force tx and rx to idle \n",
  747                             sc->my_unit);
  748         }
  749         MY_CLRBIT(sc, MY_TCRRCR, MY_PS1000);
  750         MY_CLRBIT(sc, MY_TCRRCR, MY_PS10);
  751         if (bmcr & PHY_BMCR_1000)
  752                 MY_SETBIT(sc, MY_TCRRCR, MY_PS1000);
  753         else if (!(bmcr & PHY_BMCR_SPEEDSEL))
  754                 MY_SETBIT(sc, MY_TCRRCR, MY_PS10);
  755         if (bmcr & PHY_BMCR_DUPLEX)
  756                 MY_SETBIT(sc, MY_TCRRCR, MY_FD);
  757         else
  758                 MY_CLRBIT(sc, MY_TCRRCR, MY_FD);
  759         if (restart)
  760                 MY_SETBIT(sc, MY_TCRRCR, MY_TE | MY_RE);
  761         MY_UNLOCK(sc);
  762         return;
  763 }
  764 
  765 static void
  766 my_reset(struct my_softc * sc)
  767 {
  768         register int    i;
  769 
  770         MY_LOCK(sc);
  771         MY_SETBIT(sc, MY_BCR, MY_SWR);
  772         for (i = 0; i < MY_TIMEOUT; i++) {
  773                 DELAY(10);
  774                 if (!(CSR_READ_4(sc, MY_BCR) & MY_SWR))
  775                         break;
  776         }
  777         if (i == MY_TIMEOUT)
  778                 printf("m0x%d: reset never completed!\n", sc->my_unit);
  779 
  780         /* Wait a little while for the chip to get its brains in order. */
  781         DELAY(1000);
  782         MY_UNLOCK(sc);
  783         return;
  784 }
  785 
  786 /*
  787  * Probe for a Myson chip. Check the PCI vendor and device IDs against our
  788  * list and return a device name if we find a match.
  789  */
  790 static int
  791 my_probe(device_t dev)
  792 {
  793         struct my_type *t;
  794 
  795         t = my_devs;
  796         while (t->my_name != NULL) {
  797                 if ((pci_get_vendor(dev) == t->my_vid) &&
  798                     (pci_get_device(dev) == t->my_did)) {
  799                         device_set_desc(dev, t->my_name);
  800                         my_info_tmp = t;
  801                         return (0);
  802                 }
  803                 t++;
  804         }
  805         return (ENXIO);
  806 }
  807 
  808 /*
  809  * Attach the interface. Allocate softc structures, do ifmedia setup and
  810  * ethernet/BPF attach.
  811  */
  812 static int
  813 my_attach(device_t dev)
  814 {
  815         int             s, i;
  816         u_char          eaddr[ETHER_ADDR_LEN];
  817         u_int32_t       command, iobase;
  818         struct my_softc *sc;
  819         struct ifnet   *ifp;
  820         int             media = IFM_ETHER | IFM_100_TX | IFM_FDX;
  821         unsigned int    round;
  822         caddr_t         roundptr;
  823         struct my_type *p;
  824         u_int16_t       phy_vid, phy_did, phy_sts = 0;
  825         int             rid, unit, error = 0;
  826 
  827         s = splimp();
  828         sc = device_get_softc(dev);
  829         unit = device_get_unit(dev);
  830         if (sc == NULL) {
  831                 printf("my%d: no memory for softc struct!\n", unit);
  832                 error = ENXIO;
  833                 goto fail;
  834 
  835         }
  836         bzero(sc, sizeof(struct my_softc));
  837         mtx_init(&sc->my_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
  838             MTX_DEF | MTX_RECURSE);
  839         MY_LOCK(sc);
  840 
  841         /*
  842          * Map control/status registers.
  843          */
  844 #if 0
  845         command = pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4);
  846         command |= (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
  847         pci_write_config(dev, PCI_COMMAND_STATUS_REG, command & 0x000000ff, 4);
  848         command = pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4);
  849 #endif
  850         command = pci_read_config(dev, PCIR_COMMAND, 4);
  851         command |= (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
  852         pci_write_config(dev, PCIR_COMMAND, command & 0x000000ff, 4);
  853         command = pci_read_config(dev, PCIR_COMMAND, 4);
  854 
  855         if (my_info_tmp->my_did == MTD800ID) {
  856                 iobase = pci_read_config(dev, MY_PCI_LOIO, 4);
  857                 if (iobase & 0x300)
  858                         MY_USEIOSPACE = 0;
  859         }
  860         if (MY_USEIOSPACE) {
  861                 if (!(command & PCIM_CMD_PORTEN)) {
  862                         printf("my%d: failed to enable I/O ports!\n", unit);
  863                         free(sc, M_DEVBUF);
  864                         error = ENXIO;
  865                         goto fail;
  866                 }
  867 #if 0
  868                 if (!pci_map_port(config_id, MY_PCI_LOIO, (u_int16_t *) & (sc->my_bhandle))) {
  869                         printf("my%d: couldn't map ports\n", unit);
  870                         error = ENXIO;
  871                         goto fail;
  872                 }
  873                   
  874                 sc->my_btag = I386_BUS_SPACE_IO;
  875 #endif
  876         } else {
  877                 if (!(command & PCIM_CMD_MEMEN)) {
  878                         printf("my%d: failed to enable memory mapping!\n",
  879                             unit);
  880                         error = ENXIO;
  881                         goto fail;
  882                 }
  883 #if 0
  884                  if (!pci_map_mem(config_id, MY_PCI_LOMEM, &vbase, &pbase)) {
  885                         printf ("my%d: couldn't map memory\n", unit);
  886                         error = ENXIO;
  887                         goto fail;
  888                 }
  889                 sc->my_btag = I386_BUS_SPACE_MEM;
  890                 sc->my_bhandle = vbase;
  891 #endif
  892         }
  893 
  894         rid = MY_RID;
  895         sc->my_res = bus_alloc_resource_any(dev, MY_RES, &rid, RF_ACTIVE);
  896 
  897         if (sc->my_res == NULL) {
  898                 printf("my%d: couldn't map ports/memory\n", unit);
  899                 error = ENXIO;
  900                 goto fail;
  901         }
  902         sc->my_btag = rman_get_bustag(sc->my_res);
  903         sc->my_bhandle = rman_get_bushandle(sc->my_res);
  904 
  905         rid = 0;
  906         sc->my_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
  907                                             RF_SHAREABLE | RF_ACTIVE);
  908 
  909         if (sc->my_irq == NULL) {
  910                 printf("my%d: couldn't map interrupt\n", unit);
  911                 bus_release_resource(dev, MY_RES, MY_RID, sc->my_res);
  912                 error = ENXIO;
  913                 goto fail;
  914         }
  915         error = bus_setup_intr(dev, sc->my_irq, INTR_TYPE_NET,
  916                                my_intr, sc, &sc->my_intrhand);
  917 
  918         if (error) {
  919                 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->my_irq);
  920                 bus_release_resource(dev, MY_RES, MY_RID, sc->my_res);
  921                 printf("my%d: couldn't set up irq\n", unit);
  922                 goto fail;
  923         }
  924         callout_handle_init(&sc->my_stat_ch);
  925 
  926         sc->my_info = my_info_tmp;
  927 
  928         /* Reset the adapter. */
  929         my_reset(sc);
  930 
  931         /*
  932          * Get station address
  933          */
  934         for (i = 0; i < ETHER_ADDR_LEN; ++i)
  935                 eaddr[i] = CSR_READ_1(sc, MY_PAR0 + i);
  936 
  937         sc->my_unit = unit;
  938         bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
  939 
  940         sc->my_ldata_ptr = malloc(sizeof(struct my_list_data) + 8,
  941                                   M_DEVBUF, M_NOWAIT);
  942         if (sc->my_ldata_ptr == NULL) {
  943                 free(sc, M_DEVBUF);
  944                 printf("my%d: no memory for list buffers!\n", unit);
  945                 error = ENXIO;
  946                 goto fail;
  947         }
  948         sc->my_ldata = (struct my_list_data *) sc->my_ldata_ptr;
  949         round = (uintptr_t)sc->my_ldata_ptr & 0xF;
  950         roundptr = sc->my_ldata_ptr;
  951         for (i = 0; i < 8; i++) {
  952                 if (round % 8) {
  953                         round++;
  954                         roundptr++;
  955                 } else
  956                         break;
  957         }
  958         sc->my_ldata = (struct my_list_data *) roundptr;
  959         bzero(sc->my_ldata, sizeof(struct my_list_data));
  960 
  961         ifp = &sc->arpcom.ac_if;
  962         ifp->if_softc = sc;
  963         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
  964         ifp->if_mtu = ETHERMTU;
  965         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
  966         ifp->if_ioctl = my_ioctl;
  967         ifp->if_start = my_start;
  968         ifp->if_watchdog = my_watchdog;
  969         ifp->if_init = my_init;
  970         ifp->if_baudrate = 10000000;
  971         ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
  972 
  973         if (sc->my_info->my_did == MTD803ID)
  974                 sc->my_pinfo = my_phys;
  975         else {
  976                 if (bootverbose)
  977                         printf("my%d: probing for a PHY\n", sc->my_unit);
  978                 for (i = MY_PHYADDR_MIN; i < MY_PHYADDR_MAX + 1; i++) {
  979                         if (bootverbose)
  980                                 printf("my%d: checking address: %d\n",
  981                                     sc->my_unit, i);
  982                         sc->my_phy_addr = i;
  983                         phy_sts = my_phy_readreg(sc, PHY_BMSR);
  984                         if ((phy_sts != 0) && (phy_sts != 0xffff))
  985                                 break;
  986                         else
  987                                 phy_sts = 0;
  988                 }
  989                 if (phy_sts) {
  990                         phy_vid = my_phy_readreg(sc, PHY_VENID);
  991                         phy_did = my_phy_readreg(sc, PHY_DEVID);
  992                         if (bootverbose) {
  993                                 printf("my%d: found PHY at address %d, ",
  994                                     sc->my_unit, sc->my_phy_addr);
  995                                 printf("vendor id: %x device id: %x\n",
  996                                     phy_vid, phy_did);
  997                         }
  998                         p = my_phys;
  999                         while (p->my_vid) {
 1000                                 if (phy_vid == p->my_vid) {
 1001                                         sc->my_pinfo = p;
 1002                                         break;
 1003                                 }
 1004                                 p++;
 1005                         }
 1006                         if (sc->my_pinfo == NULL)
 1007                                 sc->my_pinfo = &my_phys[PHY_UNKNOWN];
 1008                         if (bootverbose)
 1009                                 printf("my%d: PHY type: %s\n",
 1010                                        sc->my_unit, sc->my_pinfo->my_name);
 1011                 } else {
 1012                         printf("my%d: MII without any phy!\n", sc->my_unit);
 1013                         error = ENXIO;
 1014                         goto fail;
 1015                 }
 1016         }
 1017 
 1018         /* Do ifmedia setup. */
 1019         ifmedia_init(&sc->ifmedia, 0, my_ifmedia_upd, my_ifmedia_sts);
 1020         my_getmode_mii(sc);
 1021         my_autoneg_mii(sc, MY_FLAG_FORCEDELAY, 1);
 1022         media = sc->ifmedia.ifm_media;
 1023         my_stop(sc);
 1024         ifmedia_set(&sc->ifmedia, media);
 1025 
 1026         ether_ifattach(ifp, eaddr);
 1027 
 1028 #if 0
 1029         at_shutdown(my_shutdown, sc, SHUTDOWN_POST_SYNC);
 1030         shutdownhook_establish(my_shutdown, sc);
 1031 #endif
 1032          
 1033         MY_UNLOCK(sc);
 1034         return (0);
 1035 
 1036 fail:
 1037         MY_UNLOCK(sc);
 1038         mtx_destroy(&sc->my_mtx);
 1039         splx(s);
 1040         return (error);
 1041 }
 1042 
 1043 static int
 1044 my_detach(device_t dev)
 1045 {
 1046         struct my_softc *sc;
 1047         struct ifnet   *ifp;
 1048         int             s;
 1049 
 1050         s = splimp();
 1051         sc = device_get_softc(dev);
 1052         MY_LOCK(sc);
 1053         ifp = &sc->arpcom.ac_if;
 1054         ether_ifdetach(ifp);
 1055         my_stop(sc);
 1056 
 1057 #if 0
 1058         bus_generic_detach(dev);
 1059         device_delete_child(dev, sc->rl_miibus);
 1060 #endif
 1061 
 1062         bus_teardown_intr(dev, sc->my_irq, sc->my_intrhand);
 1063         bus_release_resource(dev, SYS_RES_IRQ, 0, sc->my_irq);
 1064         bus_release_resource(dev, MY_RES, MY_RID, sc->my_res);
 1065 #if 0
 1066         contigfree(sc->my_cdata.my_rx_buf, MY_RXBUFLEN + 32, M_DEVBUF);
 1067 #endif
 1068         free(sc, M_DEVBUF);
 1069         MY_UNLOCK(sc);
 1070         splx(s);
 1071         mtx_destroy(&sc->my_mtx);
 1072         return (0);
 1073 }
 1074 
 1075 
 1076 /*
 1077  * Initialize the transmit descriptors.
 1078  */
 1079 static int
 1080 my_list_tx_init(struct my_softc * sc)
 1081 {
 1082         struct my_chain_data *cd;
 1083         struct my_list_data *ld;
 1084         int             i;
 1085 
 1086         MY_LOCK(sc);
 1087         cd = &sc->my_cdata;
 1088         ld = sc->my_ldata;
 1089         for (i = 0; i < MY_TX_LIST_CNT; i++) {
 1090                 cd->my_tx_chain[i].my_ptr = &ld->my_tx_list[i];
 1091                 if (i == (MY_TX_LIST_CNT - 1))
 1092                         cd->my_tx_chain[i].my_nextdesc = &cd->my_tx_chain[0];
 1093                 else
 1094                         cd->my_tx_chain[i].my_nextdesc =
 1095                             &cd->my_tx_chain[i + 1];
 1096         }
 1097         cd->my_tx_free = &cd->my_tx_chain[0];
 1098         cd->my_tx_tail = cd->my_tx_head = NULL;
 1099         MY_UNLOCK(sc);
 1100         return (0);
 1101 }
 1102 
 1103 /*
 1104  * Initialize the RX descriptors and allocate mbufs for them. Note that we
 1105  * arrange the descriptors in a closed ring, so that the last descriptor
 1106  * points back to the first.
 1107  */
 1108 static int
 1109 my_list_rx_init(struct my_softc * sc)
 1110 {
 1111         struct my_chain_data *cd;
 1112         struct my_list_data *ld;
 1113         int             i;
 1114 
 1115         MY_LOCK(sc);
 1116         cd = &sc->my_cdata;
 1117         ld = sc->my_ldata;
 1118         for (i = 0; i < MY_RX_LIST_CNT; i++) {
 1119                 cd->my_rx_chain[i].my_ptr =
 1120                     (struct my_desc *) & ld->my_rx_list[i];
 1121                 if (my_newbuf(sc, &cd->my_rx_chain[i]) == ENOBUFS) {
 1122                         MY_UNLOCK(sc);
 1123                         return (ENOBUFS);
 1124                 }
 1125                 if (i == (MY_RX_LIST_CNT - 1)) {
 1126                         cd->my_rx_chain[i].my_nextdesc = &cd->my_rx_chain[0];
 1127                         ld->my_rx_list[i].my_next = vtophys(&ld->my_rx_list[0]);
 1128                 } else {
 1129                         cd->my_rx_chain[i].my_nextdesc =
 1130                             &cd->my_rx_chain[i + 1];
 1131                         ld->my_rx_list[i].my_next =
 1132                             vtophys(&ld->my_rx_list[i + 1]);
 1133                 }
 1134         }
 1135         cd->my_rx_head = &cd->my_rx_chain[0];
 1136         MY_UNLOCK(sc);
 1137         return (0);
 1138 }
 1139 
 1140 /*
 1141  * Initialize an RX descriptor and attach an MBUF cluster.
 1142  */
 1143 static int
 1144 my_newbuf(struct my_softc * sc, struct my_chain_onefrag * c)
 1145 {
 1146         struct mbuf    *m_new = NULL;
 1147 
 1148         MY_LOCK(sc);
 1149         MGETHDR(m_new, M_DONTWAIT, MT_DATA);
 1150         if (m_new == NULL) {
 1151                 printf("my%d: no memory for rx list -- packet dropped!\n",
 1152                        sc->my_unit);
 1153                 MY_UNLOCK(sc);
 1154                 return (ENOBUFS);
 1155         }
 1156         MCLGET(m_new, M_DONTWAIT);
 1157         if (!(m_new->m_flags & M_EXT)) {
 1158                 printf("my%d: no memory for rx list -- packet dropped!\n",
 1159                        sc->my_unit);
 1160                 m_freem(m_new);
 1161                 MY_UNLOCK(sc);
 1162                 return (ENOBUFS);
 1163         }
 1164         c->my_mbuf = m_new;
 1165         c->my_ptr->my_data = vtophys(mtod(m_new, caddr_t));
 1166         c->my_ptr->my_ctl = (MCLBYTES - 1) << MY_RBSShift;
 1167         c->my_ptr->my_status = MY_OWNByNIC;
 1168         MY_UNLOCK(sc);
 1169         return (0);
 1170 }
 1171 
 1172 /*
 1173  * A frame has been uploaded: pass the resulting mbuf chain up to the higher
 1174  * level protocols.
 1175  */
 1176 static void
 1177 my_rxeof(struct my_softc * sc)
 1178 {
 1179         struct ether_header *eh;
 1180         struct mbuf    *m;
 1181         struct ifnet   *ifp;
 1182         struct my_chain_onefrag *cur_rx;
 1183         int             total_len = 0;
 1184         u_int32_t       rxstat;
 1185 
 1186         MY_LOCK(sc);
 1187         ifp = &sc->arpcom.ac_if;
 1188         while (!((rxstat = sc->my_cdata.my_rx_head->my_ptr->my_status)
 1189             & MY_OWNByNIC)) {
 1190                 cur_rx = sc->my_cdata.my_rx_head;
 1191                 sc->my_cdata.my_rx_head = cur_rx->my_nextdesc;
 1192 
 1193                 if (rxstat & MY_ES) {   /* error summary: give up this rx pkt */
 1194                         ifp->if_ierrors++;
 1195                         cur_rx->my_ptr->my_status = MY_OWNByNIC;
 1196                         continue;
 1197                 }
 1198                 /* No errors; receive the packet. */
 1199                 total_len = (rxstat & MY_FLNGMASK) >> MY_FLNGShift;
 1200                 total_len -= ETHER_CRC_LEN;
 1201 
 1202                 if (total_len < MINCLSIZE) {
 1203                         m = m_devget(mtod(cur_rx->my_mbuf, char *),
 1204                             total_len, 0, ifp, NULL);
 1205                         cur_rx->my_ptr->my_status = MY_OWNByNIC;
 1206                         if (m == NULL) {
 1207                                 ifp->if_ierrors++;
 1208                                 continue;
 1209                         }
 1210                 } else {
 1211                         m = cur_rx->my_mbuf;
 1212                         /*
 1213                          * Try to conjure up a new mbuf cluster. If that
 1214                          * fails, it means we have an out of memory condition
 1215                          * and should leave the buffer in place and continue.
 1216                          * This will result in a lost packet, but there's
 1217                          * little else we can do in this situation.
 1218                          */
 1219                         if (my_newbuf(sc, cur_rx) == ENOBUFS) {
 1220                                 ifp->if_ierrors++;
 1221                                 cur_rx->my_ptr->my_status = MY_OWNByNIC;
 1222                                 continue;
 1223                         }
 1224                         m->m_pkthdr.rcvif = ifp;
 1225                         m->m_pkthdr.len = m->m_len = total_len;
 1226                 }
 1227                 ifp->if_ipackets++;
 1228                 eh = mtod(m, struct ether_header *);
 1229 #if NBPFILTER > 0
 1230                 /*
 1231                  * Handle BPF listeners. Let the BPF user see the packet, but
 1232                  * don't pass it up to the ether_input() layer unless it's a
 1233                  * broadcast packet, multicast packet, matches our ethernet
 1234                  * address or the interface is in promiscuous mode.
 1235                  */
 1236                 if (ifp->if_bpf) {
 1237                         BPF_MTAP(ifp, m);
 1238                         if (ifp->if_flags & IFF_PROMISC &&
 1239                             (bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr,
 1240                                 ETHER_ADDR_LEN) &&
 1241                              (eh->ether_dhost[0] & 1) == 0)) {
 1242                                 m_freem(m);
 1243                                 continue;
 1244                         }
 1245                 }
 1246 #endif
 1247                 MY_UNLOCK(sc);
 1248                 (*ifp->if_input)(ifp, m);
 1249                 MY_LOCK(sc);
 1250         }
 1251         MY_UNLOCK(sc);
 1252         return;
 1253 }
 1254 
 1255 
 1256 /*
 1257  * A frame was downloaded to the chip. It's safe for us to clean up the list
 1258  * buffers.
 1259  */
 1260 static void
 1261 my_txeof(struct my_softc * sc)
 1262 {
 1263         struct my_chain *cur_tx;
 1264         struct ifnet   *ifp;
 1265 
 1266         MY_LOCK(sc);
 1267         ifp = &sc->arpcom.ac_if;
 1268         /* Clear the timeout timer. */
 1269         ifp->if_timer = 0;
 1270         if (sc->my_cdata.my_tx_head == NULL) {
 1271                 MY_UNLOCK(sc);
 1272                 return;
 1273         }
 1274         /*
 1275          * Go through our tx list and free mbufs for those frames that have
 1276          * been transmitted.
 1277          */
 1278         while (sc->my_cdata.my_tx_head->my_mbuf != NULL) {
 1279                 u_int32_t       txstat;
 1280 
 1281                 cur_tx = sc->my_cdata.my_tx_head;
 1282                 txstat = MY_TXSTATUS(cur_tx);
 1283                 if ((txstat & MY_OWNByNIC) || txstat == MY_UNSENT)
 1284                         break;
 1285                 if (!(CSR_READ_4(sc, MY_TCRRCR) & MY_Enhanced)) {
 1286                         if (txstat & MY_TXERR) {
 1287                                 ifp->if_oerrors++;
 1288                                 if (txstat & MY_EC) /* excessive collision */
 1289                                         ifp->if_collisions++;
 1290                                 if (txstat & MY_LC)     /* late collision */
 1291                                         ifp->if_collisions++;
 1292                         }
 1293                         ifp->if_collisions += (txstat & MY_NCRMASK) >>
 1294                             MY_NCRShift;
 1295                 }
 1296                 ifp->if_opackets++;
 1297                 m_freem(cur_tx->my_mbuf);
 1298                 cur_tx->my_mbuf = NULL;
 1299                 if (sc->my_cdata.my_tx_head == sc->my_cdata.my_tx_tail) {
 1300                         sc->my_cdata.my_tx_head = NULL;
 1301                         sc->my_cdata.my_tx_tail = NULL;
 1302                         break;
 1303                 }
 1304                 sc->my_cdata.my_tx_head = cur_tx->my_nextdesc;
 1305         }
 1306         if (CSR_READ_4(sc, MY_TCRRCR) & MY_Enhanced) {
 1307                 ifp->if_collisions += (CSR_READ_4(sc, MY_TSR) & MY_NCRMask);
 1308         }
 1309         MY_UNLOCK(sc);
 1310         return;
 1311 }
 1312 
 1313 /*
 1314  * TX 'end of channel' interrupt handler.
 1315  */
 1316 static void
 1317 my_txeoc(struct my_softc * sc)
 1318 {
 1319         struct ifnet   *ifp;
 1320 
 1321         MY_LOCK(sc);
 1322         ifp = &sc->arpcom.ac_if;
 1323         ifp->if_timer = 0;
 1324         if (sc->my_cdata.my_tx_head == NULL) {
 1325                 ifp->if_flags &= ~IFF_OACTIVE;
 1326                 sc->my_cdata.my_tx_tail = NULL;
 1327                 if (sc->my_want_auto)
 1328                         my_autoneg_mii(sc, MY_FLAG_SCHEDDELAY, 1);
 1329         } else {
 1330                 if (MY_TXOWN(sc->my_cdata.my_tx_head) == MY_UNSENT) {
 1331                         MY_TXOWN(sc->my_cdata.my_tx_head) = MY_OWNByNIC;
 1332                         ifp->if_timer = 5;
 1333                         CSR_WRITE_4(sc, MY_TXPDR, 0xFFFFFFFF);
 1334                 }
 1335         }
 1336         MY_UNLOCK(sc);
 1337         return;
 1338 }
 1339 
 1340 static void
 1341 my_intr(void *arg)
 1342 {
 1343         struct my_softc *sc;
 1344         struct ifnet   *ifp;
 1345         u_int32_t       status;
 1346 
 1347         sc = arg;
 1348         MY_LOCK(sc);
 1349         ifp = &sc->arpcom.ac_if;
 1350         if (!(ifp->if_flags & IFF_UP)) {
 1351                 MY_UNLOCK(sc);
 1352                 return;
 1353         }
 1354         /* Disable interrupts. */
 1355         CSR_WRITE_4(sc, MY_IMR, 0x00000000);
 1356 
 1357         for (;;) {
 1358                 status = CSR_READ_4(sc, MY_ISR);
 1359                 status &= MY_INTRS;
 1360                 if (status)
 1361                         CSR_WRITE_4(sc, MY_ISR, status);
 1362                 else
 1363                         break;
 1364 
 1365                 if (status & MY_RI)     /* receive interrupt */
 1366                         my_rxeof(sc);
 1367 
 1368                 if ((status & MY_RBU) || (status & MY_RxErr)) {
 1369                         /* rx buffer unavailable or rx error */
 1370                         ifp->if_ierrors++;
 1371 #ifdef foo
 1372                         my_stop(sc);
 1373                         my_reset(sc);
 1374                         my_init(sc);
 1375 #endif
 1376                 }
 1377                 if (status & MY_TI)     /* tx interrupt */
 1378                         my_txeof(sc);
 1379                 if (status & MY_ETI)    /* tx early interrupt */
 1380                         my_txeof(sc);
 1381                 if (status & MY_TBU)    /* tx buffer unavailable */
 1382                         my_txeoc(sc);
 1383 
 1384 #if 0                           /* 90/1/18 delete */
 1385                 if (status & MY_FBE) {
 1386                         my_reset(sc);
 1387                         my_init(sc);
 1388                 }
 1389 #endif
 1390 
 1391         }
 1392 
 1393         /* Re-enable interrupts. */
 1394         CSR_WRITE_4(sc, MY_IMR, MY_INTRS);
 1395         if (ifp->if_snd.ifq_head != NULL)
 1396                 my_start(ifp);
 1397         MY_UNLOCK(sc);
 1398         return;
 1399 }
 1400 
 1401 /*
 1402  * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
 1403  * pointers to the fragment pointers.
 1404  */
 1405 static int
 1406 my_encap(struct my_softc * sc, struct my_chain * c, struct mbuf * m_head)
 1407 {
 1408         struct my_desc *f = NULL;
 1409         int             total_len;
 1410         struct mbuf    *m, *m_new = NULL;
 1411 
 1412         MY_LOCK(sc);
 1413         /* calculate the total tx pkt length */
 1414         total_len = 0;
 1415         for (m = m_head; m != NULL; m = m->m_next)
 1416                 total_len += m->m_len;
 1417         /*
 1418          * Start packing the mbufs in this chain into the fragment pointers.
 1419          * Stop when we run out of fragments or hit the end of the mbuf
 1420          * chain.
 1421          */
 1422         m = m_head;
 1423         MGETHDR(m_new, M_DONTWAIT, MT_DATA);
 1424         if (m_new == NULL) {
 1425                 printf("my%d: no memory for tx list", sc->my_unit);
 1426                 MY_UNLOCK(sc);
 1427                 return (1);
 1428         }
 1429         if (m_head->m_pkthdr.len > MHLEN) {
 1430                 MCLGET(m_new, M_DONTWAIT);
 1431                 if (!(m_new->m_flags & M_EXT)) {
 1432                         m_freem(m_new);
 1433                         printf("my%d: no memory for tx list", sc->my_unit);
 1434                         MY_UNLOCK(sc);
 1435                         return (1);
 1436                 }
 1437         }
 1438         m_copydata(m_head, 0, m_head->m_pkthdr.len, mtod(m_new, caddr_t));
 1439         m_new->m_pkthdr.len = m_new->m_len = m_head->m_pkthdr.len;
 1440         m_freem(m_head);
 1441         m_head = m_new;
 1442         f = &c->my_ptr->my_frag[0];
 1443         f->my_status = 0;
 1444         f->my_data = vtophys(mtod(m_new, caddr_t));
 1445         total_len = m_new->m_len;
 1446         f->my_ctl = MY_TXFD | MY_TXLD | MY_CRCEnable | MY_PADEnable;
 1447         f->my_ctl |= total_len << MY_PKTShift;  /* pkt size */
 1448         f->my_ctl |= total_len; /* buffer size */
 1449         /* 89/12/29 add, for mtd891 *//* [ 89? ] */
 1450         if (sc->my_info->my_did == MTD891ID)
 1451                 f->my_ctl |= MY_ETIControl | MY_RetryTxLC;
 1452         c->my_mbuf = m_head;
 1453         c->my_lastdesc = 0;
 1454         MY_TXNEXT(c) = vtophys(&c->my_nextdesc->my_ptr->my_frag[0]);
 1455         MY_UNLOCK(sc);
 1456         return (0);
 1457 }
 1458 
 1459 /*
 1460  * Main transmit routine. To avoid having to do mbuf copies, we put pointers
 1461  * to the mbuf data regions directly in the transmit lists. We also save a
 1462  * copy of the pointers since the transmit list fragment pointers are
 1463  * physical addresses.
 1464  */
 1465 static void
 1466 my_start(struct ifnet * ifp)
 1467 {
 1468         struct my_softc *sc;
 1469         struct mbuf    *m_head = NULL;
 1470         struct my_chain *cur_tx = NULL, *start_tx;
 1471 
 1472         sc = ifp->if_softc;
 1473         MY_LOCK(sc);
 1474         if (sc->my_autoneg) {
 1475                 sc->my_tx_pend = 1;
 1476                 MY_UNLOCK(sc);
 1477                 return;
 1478         }
 1479         /*
 1480          * Check for an available queue slot. If there are none, punt.
 1481          */
 1482         if (sc->my_cdata.my_tx_free->my_mbuf != NULL) {
 1483                 ifp->if_flags |= IFF_OACTIVE;
 1484                 MY_UNLOCK(sc);
 1485                 return;
 1486         }
 1487         start_tx = sc->my_cdata.my_tx_free;
 1488         while (sc->my_cdata.my_tx_free->my_mbuf == NULL) {
 1489                 IF_DEQUEUE(&ifp->if_snd, m_head);
 1490                 if (m_head == NULL)
 1491                         break;
 1492 
 1493                 /* Pick a descriptor off the free list. */
 1494                 cur_tx = sc->my_cdata.my_tx_free;
 1495                 sc->my_cdata.my_tx_free = cur_tx->my_nextdesc;
 1496 
 1497                 /* Pack the data into the descriptor. */
 1498                 my_encap(sc, cur_tx, m_head);
 1499 
 1500                 if (cur_tx != start_tx)
 1501                         MY_TXOWN(cur_tx) = MY_OWNByNIC;
 1502 #if NBPFILTER > 0
 1503                 /*
 1504                  * If there's a BPF listener, bounce a copy of this frame to
 1505                  * him.
 1506                  */
 1507                 BPF_MTAP(ifp, cur_tx->my_mbuf);
 1508 #endif
 1509         }
 1510         /*
 1511          * If there are no packets queued, bail.
 1512          */
 1513         if (cur_tx == NULL) {
 1514                 MY_UNLOCK(sc);
 1515                 return;
 1516         }
 1517         /*
 1518          * Place the request for the upload interrupt in the last descriptor
 1519          * in the chain. This way, if we're chaining several packets at once,
 1520          * we'll only get an interupt once for the whole chain rather than
 1521          * once for each packet.
 1522          */
 1523         MY_TXCTL(cur_tx) |= MY_TXIC;
 1524         cur_tx->my_ptr->my_frag[0].my_ctl |= MY_TXIC;
 1525         sc->my_cdata.my_tx_tail = cur_tx;
 1526         if (sc->my_cdata.my_tx_head == NULL)
 1527                 sc->my_cdata.my_tx_head = start_tx;
 1528         MY_TXOWN(start_tx) = MY_OWNByNIC;
 1529         CSR_WRITE_4(sc, MY_TXPDR, 0xFFFFFFFF);  /* tx polling demand */
 1530 
 1531         /*
 1532          * Set a timeout in case the chip goes out to lunch.
 1533          */
 1534         ifp->if_timer = 5;
 1535         MY_UNLOCK(sc);
 1536         return;
 1537 }
 1538 
 1539 static void
 1540 my_init(void *xsc)
 1541 {
 1542         struct my_softc *sc = xsc;
 1543         struct ifnet   *ifp = &sc->arpcom.ac_if;
 1544         int             s;
 1545         u_int16_t       phy_bmcr = 0;
 1546 
 1547         MY_LOCK(sc);
 1548         if (sc->my_autoneg) {
 1549                 MY_UNLOCK(sc);
 1550                 return;
 1551         }
 1552         s = splimp();
 1553         if (sc->my_pinfo != NULL)
 1554                 phy_bmcr = my_phy_readreg(sc, PHY_BMCR);
 1555         /*
 1556          * Cancel pending I/O and free all RX/TX buffers.
 1557          */
 1558         my_stop(sc);
 1559         my_reset(sc);
 1560 
 1561         /*
 1562          * Set cache alignment and burst length.
 1563          */
 1564 #if 0                           /* 89/9/1 modify,  */
 1565         CSR_WRITE_4(sc, MY_BCR, MY_RPBLE512);
 1566         CSR_WRITE_4(sc, MY_TCRRCR, MY_TFTSF);
 1567 #endif
 1568         CSR_WRITE_4(sc, MY_BCR, MY_PBL8);
 1569         CSR_WRITE_4(sc, MY_TCRRCR, MY_TFTSF | MY_RBLEN | MY_RPBLE512);
 1570         /*
 1571          * 89/12/29 add, for mtd891,
 1572          */
 1573         if (sc->my_info->my_did == MTD891ID) {
 1574                 MY_SETBIT(sc, MY_BCR, MY_PROG);
 1575                 MY_SETBIT(sc, MY_TCRRCR, MY_Enhanced);
 1576         }
 1577         my_setcfg(sc, phy_bmcr);
 1578         /* Init circular RX list. */
 1579         if (my_list_rx_init(sc) == ENOBUFS) {
 1580                 printf("my%d: init failed: no memory for rx buffers\n",
 1581                     sc->my_unit);
 1582                 my_stop(sc);
 1583                 (void)splx(s);
 1584                 MY_UNLOCK(sc);
 1585                 return;
 1586         }
 1587         /* Init TX descriptors. */
 1588         my_list_tx_init(sc);
 1589 
 1590         /* If we want promiscuous mode, set the allframes bit. */
 1591         if (ifp->if_flags & IFF_PROMISC)
 1592                 MY_SETBIT(sc, MY_TCRRCR, MY_PROM);
 1593         else
 1594                 MY_CLRBIT(sc, MY_TCRRCR, MY_PROM);
 1595 
 1596         /*
 1597          * Set capture broadcast bit to capture broadcast frames.
 1598          */
 1599         if (ifp->if_flags & IFF_BROADCAST)
 1600                 MY_SETBIT(sc, MY_TCRRCR, MY_AB);
 1601         else
 1602                 MY_CLRBIT(sc, MY_TCRRCR, MY_AB);
 1603 
 1604         /*
 1605          * Program the multicast filter, if necessary.
 1606          */
 1607         my_setmulti(sc);
 1608 
 1609         /*
 1610          * Load the address of the RX list.
 1611          */
 1612         MY_CLRBIT(sc, MY_TCRRCR, MY_RE);
 1613         CSR_WRITE_4(sc, MY_RXLBA, vtophys(&sc->my_ldata->my_rx_list[0]));
 1614 
 1615         /*
 1616          * Enable interrupts.
 1617          */
 1618         CSR_WRITE_4(sc, MY_IMR, MY_INTRS);
 1619         CSR_WRITE_4(sc, MY_ISR, 0xFFFFFFFF);
 1620 
 1621         /* Enable receiver and transmitter. */
 1622         MY_SETBIT(sc, MY_TCRRCR, MY_RE);
 1623         MY_CLRBIT(sc, MY_TCRRCR, MY_TE);
 1624         CSR_WRITE_4(sc, MY_TXLBA, vtophys(&sc->my_ldata->my_tx_list[0]));
 1625         MY_SETBIT(sc, MY_TCRRCR, MY_TE);
 1626 
 1627         /* Restore state of BMCR */
 1628         if (sc->my_pinfo != NULL)
 1629                 my_phy_writereg(sc, PHY_BMCR, phy_bmcr);
 1630         ifp->if_flags |= IFF_RUNNING;
 1631         ifp->if_flags &= ~IFF_OACTIVE;
 1632         (void)splx(s);
 1633         MY_UNLOCK(sc);
 1634         return;
 1635 }
 1636 
 1637 /*
 1638  * Set media options.
 1639  */
 1640 
 1641 static int
 1642 my_ifmedia_upd(struct ifnet * ifp)
 1643 {
 1644         struct my_softc *sc;
 1645         struct ifmedia *ifm;
 1646 
 1647         sc = ifp->if_softc;
 1648         MY_LOCK(sc);
 1649         ifm = &sc->ifmedia;
 1650         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) {
 1651                 MY_UNLOCK(sc);
 1652                 return (EINVAL);
 1653         }
 1654         if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO)
 1655                 my_autoneg_mii(sc, MY_FLAG_SCHEDDELAY, 1);
 1656         else
 1657                 my_setmode_mii(sc, ifm->ifm_media);
 1658         MY_UNLOCK(sc);
 1659         return (0);
 1660 }
 1661 
 1662 /*
 1663  * Report current media status.
 1664  */
 1665 
 1666 static void
 1667 my_ifmedia_sts(struct ifnet * ifp, struct ifmediareq * ifmr)
 1668 {
 1669         struct my_softc *sc;
 1670         u_int16_t advert = 0, ability = 0;
 1671 
 1672         sc = ifp->if_softc;
 1673         MY_LOCK(sc);
 1674         ifmr->ifm_active = IFM_ETHER;
 1675         if (!(my_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_AUTONEGENBL)) {
 1676 #if 0                           /* this version did not support 1000M, */
 1677                 if (my_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_1000)
 1678                         ifmr->ifm_active = IFM_ETHER | IFM_1000TX;
 1679 #endif
 1680                 if (my_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_SPEEDSEL)
 1681                         ifmr->ifm_active = IFM_ETHER | IFM_100_TX;
 1682                 else
 1683                         ifmr->ifm_active = IFM_ETHER | IFM_10_T;
 1684                 if (my_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_DUPLEX)
 1685                         ifmr->ifm_active |= IFM_FDX;
 1686                 else
 1687                         ifmr->ifm_active |= IFM_HDX;
 1688 
 1689                 MY_UNLOCK(sc);
 1690                 return;
 1691         }
 1692         ability = my_phy_readreg(sc, PHY_LPAR);
 1693         advert = my_phy_readreg(sc, PHY_ANAR);
 1694 
 1695 #if 0                           /* this version did not support 1000M, */
 1696         if (sc->my_pinfo->my_vid = MarvellPHYID0) {
 1697                 ability2 = my_phy_readreg(sc, PHY_1000SR);
 1698                 if (ability2 & PHY_1000SR_1000BTXFULL) {
 1699                         advert = 0;
 1700                         ability = 0;
 1701                         ifmr->ifm_active = IFM_ETHER|IFM_1000_T|IFM_FDX;
 1702                 } else if (ability & PHY_1000SR_1000BTXHALF) {
 1703                         advert = 0;
 1704                         ability = 0;
 1705                         ifmr->ifm_active = IFM_ETHER|IFM_1000_T|IFM_HDX;
 1706                 }
 1707         }
 1708 #endif
 1709         if (advert & PHY_ANAR_100BT4 && ability & PHY_ANAR_100BT4)
 1710                 ifmr->ifm_active = IFM_ETHER | IFM_100_T4;
 1711         else if (advert & PHY_ANAR_100BTXFULL && ability & PHY_ANAR_100BTXFULL)
 1712                 ifmr->ifm_active = IFM_ETHER | IFM_100_TX | IFM_FDX;
 1713         else if (advert & PHY_ANAR_100BTXHALF && ability & PHY_ANAR_100BTXHALF)
 1714                 ifmr->ifm_active = IFM_ETHER | IFM_100_TX | IFM_HDX;
 1715         else if (advert & PHY_ANAR_10BTFULL && ability & PHY_ANAR_10BTFULL)
 1716                 ifmr->ifm_active = IFM_ETHER | IFM_10_T | IFM_FDX;
 1717         else if (advert & PHY_ANAR_10BTHALF && ability & PHY_ANAR_10BTHALF)
 1718                 ifmr->ifm_active = IFM_ETHER | IFM_10_T | IFM_HDX;
 1719         MY_UNLOCK(sc);
 1720         return;
 1721 }
 1722 
 1723 static int
 1724 my_ioctl(struct ifnet * ifp, u_long command, caddr_t data)
 1725 {
 1726         struct my_softc *sc = ifp->if_softc;
 1727         struct ifreq   *ifr = (struct ifreq *) data;
 1728         int             s, error = 0;
 1729 
 1730         s = splimp();
 1731         MY_LOCK(sc);
 1732         switch (command) {
 1733         case SIOCSIFFLAGS:
 1734                 if (ifp->if_flags & IFF_UP)
 1735                         my_init(sc);
 1736                 else if (ifp->if_flags & IFF_RUNNING)
 1737                         my_stop(sc);
 1738                 error = 0;
 1739                 break;
 1740         case SIOCADDMULTI:
 1741         case SIOCDELMULTI:
 1742                 my_setmulti(sc);
 1743                 error = 0;
 1744                 break;
 1745         case SIOCGIFMEDIA:
 1746         case SIOCSIFMEDIA:
 1747                 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command);
 1748                 break;
 1749         default:
 1750                 error = ether_ioctl(ifp, command, data);
 1751                 break;
 1752         }
 1753         MY_UNLOCK(sc);
 1754         (void)splx(s);
 1755         return (error);
 1756 }
 1757 
 1758 static void
 1759 my_watchdog(struct ifnet * ifp)
 1760 {
 1761         struct my_softc *sc;
 1762 
 1763         sc = ifp->if_softc;
 1764         MY_LOCK(sc);
 1765         if (sc->my_autoneg) {
 1766                 my_autoneg_mii(sc, MY_FLAG_DELAYTIMEO, 1);
 1767                 MY_UNLOCK(sc);
 1768                 return;
 1769         }
 1770         ifp->if_oerrors++;
 1771         printf("my%d: watchdog timeout\n", sc->my_unit);
 1772         if (!(my_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT))
 1773                 printf("my%d: no carrier - transceiver cable problem?\n",
 1774                     sc->my_unit);
 1775         my_stop(sc);
 1776         my_reset(sc);
 1777         my_init(sc);
 1778         if (ifp->if_snd.ifq_head != NULL)
 1779                 my_start(ifp);
 1780         MY_LOCK(sc);
 1781         return;
 1782 }
 1783 
 1784 
 1785 /*
 1786  * Stop the adapter and free any mbufs allocated to the RX and TX lists.
 1787  */
 1788 static void
 1789 my_stop(struct my_softc * sc)
 1790 {
 1791         register int    i;
 1792         struct ifnet   *ifp;
 1793 
 1794         MY_LOCK(sc);
 1795         ifp = &sc->arpcom.ac_if;
 1796         ifp->if_timer = 0;
 1797 
 1798         MY_CLRBIT(sc, MY_TCRRCR, (MY_RE | MY_TE));
 1799         CSR_WRITE_4(sc, MY_IMR, 0x00000000);
 1800         CSR_WRITE_4(sc, MY_TXLBA, 0x00000000);
 1801         CSR_WRITE_4(sc, MY_RXLBA, 0x00000000);
 1802 
 1803         /*
 1804          * Free data in the RX lists.
 1805          */
 1806         for (i = 0; i < MY_RX_LIST_CNT; i++) {
 1807                 if (sc->my_cdata.my_rx_chain[i].my_mbuf != NULL) {
 1808                         m_freem(sc->my_cdata.my_rx_chain[i].my_mbuf);
 1809                         sc->my_cdata.my_rx_chain[i].my_mbuf = NULL;
 1810                 }
 1811         }
 1812         bzero((char *)&sc->my_ldata->my_rx_list,
 1813             sizeof(sc->my_ldata->my_rx_list));
 1814         /*
 1815          * Free the TX list buffers.
 1816          */
 1817         for (i = 0; i < MY_TX_LIST_CNT; i++) {
 1818                 if (sc->my_cdata.my_tx_chain[i].my_mbuf != NULL) {
 1819                         m_freem(sc->my_cdata.my_tx_chain[i].my_mbuf);
 1820                         sc->my_cdata.my_tx_chain[i].my_mbuf = NULL;
 1821                 }
 1822         }
 1823         bzero((char *)&sc->my_ldata->my_tx_list,
 1824             sizeof(sc->my_ldata->my_tx_list));
 1825         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
 1826         MY_UNLOCK(sc);
 1827         return;
 1828 }
 1829 
 1830 /*
 1831  * Stop all chip I/O so that the kernel's probe routines don't get confused
 1832  * by errant DMAs when rebooting.
 1833  */
 1834 static void
 1835 my_shutdown(device_t dev)
 1836 {
 1837         struct my_softc *sc;
 1838 
 1839         sc = device_get_softc(dev);
 1840         my_stop(sc);
 1841         return;
 1842 }

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