The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/netif/acx/if_acxreg.h

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    1 /*
    2  * Copyright (c) 2006 The DragonFly Project.  All rights reserved.
    3  * 
    4  * This code is derived from software contributed to The DragonFly Project
    5  * by Sepherosa Ziehau <sepherosa@gmail.com>
    6  * 
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in
   15  *    the documentation and/or other materials provided with the
   16  *    distribution.
   17  * 3. Neither the name of The DragonFly Project nor the names of its
   18  *    contributors may be used to endorse or promote products derived
   19  *    from this software without specific, prior written permission.
   20  * 
   21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
   24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
   25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
   26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
   27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
   29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
   31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   32  * SUCH DAMAGE.
   33  * 
   34  * $DragonFly: src/sys/dev/netif/acx/if_acxreg.h,v 1.1 2006/04/01 02:55:36 sephe Exp $
   35  */
   36 
   37 #ifndef _IF_ACXREG_H
   38 #define _IF_ACXREG_H
   39 
   40 /*
   41  * IO register index
   42  */
   43 #define ACXREG_SOFT_RESET               0
   44 #define ACXREG_FWMEM_ADDR               1
   45 #define ACXREG_FWMEM_DATA               2
   46 #define ACXREG_FWMEM_CTRL               3
   47 #define ACXREG_FWMEM_START              4
   48 #define ACXREG_EVENT_MASK               5
   49 #define ACXREG_INTR_TRIG                6
   50 #define ACXREG_INTR_MASK                7
   51 #define ACXREG_INTR_STATUS              8
   52 #define ACXREG_INTR_STATUS_CLR          9       /* cleared after being read */
   53 #define ACXREG_INTR_ACK                 10
   54 #define ACXREG_HINTR_TRIG               11      /* XXX what's this? */
   55 #define ACXREG_RADIO_ENABLE             12
   56 #define ACXREG_EEPROM_INIT              13
   57 #define ACXREG_EEPROM_CTRL              14
   58 #define ACXREG_EEPROM_ADDR              15
   59 #define ACXREG_EEPROM_DATA              16
   60 #define ACXREG_EEPROM_CONF              17
   61 #define ACXREG_EEPROM_INFO              18
   62 #define ACXREG_PHY_ADDR                 19
   63 #define ACXREG_PHY_DATA                 20
   64 #define ACXREG_PHY_CTRL                 21
   65 #define ACXREG_GPIO_OUT_ENABLE          22
   66 #define ACXREG_GPIO_OUT                 23
   67 #define ACXREG_CMD_REG_OFFSET           24
   68 #define ACXREG_INFO_REG_OFFSET          25
   69 #define ACXREG_RESET_SENSE              26
   70 #define ACXREG_ECPU_CTRL                27
   71 #define ACXREG_MAX                      28
   72 #define ACXREG(reg, val)                [ACXREG_##reg] = val
   73 
   74 /*
   75  * Value read from ACXREG_EEPROM_INFO
   76  * upper 8bits are radio type
   77  * lower 8bits are form factor
   78  */
   79 #define ACX_EEINFO_RADIO_TYPE_SHIFT     8
   80 #define ACX_EEINFO_RADIO_TYPE_MASK      (0xff << ACX_EEINFO_RADIO_TYPE_SHIFT)
   81 #define ACX_EEINFO_FORM_FACTOR_MASK     0xff
   82 
   83 #define ACX_EEINFO_HAS_RADIO_TYPE(info) ((info) & ACX_EEINFO_RADIO_TYPE_MASK)
   84 #define ACX_EEINFO_RADIO_TYPE(info)     ((info) >> ACX_EEINFO_RADIO_TYPE_SHIFT)
   85 #define ACX_EEINFO_FORM_FACTOR(info)    ((info) & ACX_EEINFO_FORM_FACTOR_MASK)
   86 
   87 /*
   88  * Size of command register whose location is obtained
   89  * from ACXREG_CMD_REG_OFFSET IO register
   90  */
   91 #define ACX_CMD_REG_SIZE                4       /* 4 bytes */
   92 
   93 /*
   94  * Size of infomation register whose location is obtained
   95  * from ACXREG_INFO_REG_OFFSET IO register
   96  */
   97 #define ACX_INFO_REG_SIZE               4       /* 4 bytes */
   98 
   99 /*
  100  * Offset of EEPROM variables
  101  */
  102 #define ACX_EE_VERSION_OFS              0x05
  103 
  104 /*
  105  * Possible values for various IO registers
  106  */
  107 
  108 /* ACXREG_SOFT_RESET */
  109 #define ACXRV_SOFT_RESET                0x1
  110 
  111 /* ACXREG_FWMEM_START */
  112 #define ACXRV_FWMEM_START_OP            0x0
  113 
  114 /* ACXREG_FWMEM_CTRL */
  115 #define ACXRV_FWMEM_ADDR_AUTOINC        0x10000
  116 
  117 /* ACXREG_EVENT_MASK */
  118 #define ACXRV_EVENT_DISABLE             0x8000  /* XXX What's this?? */
  119 
  120 /* ACXREG_INTR_TRIG */
  121 #define ACXRV_TRIG_CMD_FINI             0x0001
  122 #define ACXRV_TRIG_TX_FINI              0x0004
  123 
  124 /* ACXREG_INTR_MASK */
  125 #define ACXRV_INTR_RX_DATA              0x0001
  126 #define ACXRV_INTR_TX_FINI              0x0002
  127 #define ACXRV_INTR_TX_XFER              0x0004
  128 #define ACXRV_INTR_RX_FINI              0x0008
  129 #define ACXRV_INTR_DTIM                 0x0010
  130 #define ACXRV_INTR_BEACON               0x0020
  131 #define ACXRV_INTR_TIMER                0x0040
  132 #define ACXRV_INTR_KEY_MISS             0x0080
  133 #define ACXRV_INTR_WEP_FAIL             0x0100
  134 #define ACXRV_INTR_CMD_FINI             0x0200
  135 #define ACXRV_INTR_INFO                 0x0400
  136 #define ACXRV_INTR_OVERFLOW             0x0800  /* XXX */
  137 #define ACXRV_INTR_PROC_ERR             0x1000  /* XXX */
  138 #define ACXRV_INTR_SCAN_FINI            0x2000
  139 #define ACXRV_INTR_FCS_THRESH           0x4000  /* XXX */
  140 #define ACXRV_INTR_UNKN                 0x8000
  141 #define ACXRV_INTR_ALL                  0xffff
  142 
  143 /* ACXREG_EEPROM_INIT */
  144 #define ACXRV_EEPROM_INIT               0x1
  145 
  146 /* ACXREG_EEPROM_CTRL */
  147 #define ACXRV_EEPROM_READ               0x2
  148 
  149 /* ACXREG_PHY_CTRL */
  150 #define ACXRV_PHY_WRITE                 0x1
  151 #define ACXRV_PHY_READ                  0x2
  152 
  153 /* ACXREG_PHY_ADDR */
  154 #define ACXRV_PHYREG_TXPOWER            0x11    /* axc100 */
  155 #define ACXRV_PHYREG_SENSITIVITY        0x30
  156 
  157 /* ACXREG_ECPU_CTRL */
  158 #define ACXRV_ECPU_HALT                 0x1
  159 #define ACXRV_ECPU_START                0x0
  160 
  161 #endif  /* !_IF_ACXREG_H */

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