The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/netif/ar/if_ar.c

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    1 /*-
    2  * Copyright (c) 1995 - 2001 John Hay.  All rights reserved.
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  * 3. Neither the name of the author nor the names of any co-contributors
   13  *    may be used to endorse or promote products derived from this software
   14  *    without specific prior written permission.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY John Hay ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL John Hay BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  * $FreeBSD: src/sys/dev/ar/if_ar.c,v 1.66 2005/01/06 01:42:28 imp Exp $
   29  */
   30 
   31 /*
   32  * Programming assumptions and other issues.
   33  *
   34  * The descriptors of a DMA channel will fit in a 16K memory window.
   35  *
   36  * The buffers of a transmit DMA channel will fit in a 16K memory window.
   37  *
   38  * Only the ISA bus cards with X.21 and V.35 is tested.
   39  *
   40  * When interface is going up, handshaking is set and it is only cleared
   41  * when the interface is down'ed.
   42  *
   43  * There should be a way to set/reset Raw HDLC/PPP, Loopback, DCE/DTE,
   44  * internal/external clock, etc.....
   45  */
   46 
   47 #include "opt_netgraph.h"
   48 
   49 #include <sys/param.h>
   50 #include <sys/systm.h>
   51 #include <sys/kernel.h>
   52 #include <sys/malloc.h>
   53 #include <sys/mbuf.h>
   54 #include <sys/socket.h>
   55 #include <sys/sockio.h>
   56 #include <sys/module.h>
   57 #include <sys/bus.h>
   58 #include <sys/serialize.h>
   59 #include <sys/rman.h>
   60 #include <sys/thread2.h>
   61 
   62 #include <net/if.h>
   63 #include <net/ifq_var.h>
   64 #ifdef NETGRAPH
   65 #include <netgraph/ng_message.h>
   66 #include <netgraph/netgraph.h>
   67 #include <sys/syslog.h>
   68 #include <dev/netif/ar/if_ar.h>
   69 #else /* NETGRAPH */
   70 #include <net/if_arp.h>
   71 #include <net/sppp/if_sppp.h>
   72 #include <net/bpf.h>
   73 #endif /* NETGRAPH */
   74 
   75 #include <machine/md_var.h>
   76 
   77 #include <dev/netif/ic_layer/hd64570.h>
   78 #include <dev/netif/ar/if_arregs.h>
   79 
   80 #ifdef TRACE
   81 #define TRC(x)               x
   82 #else
   83 #define TRC(x)
   84 #endif
   85 
   86 #define TRCL(x)              x
   87 
   88 #define PPP_HEADER_LEN       4
   89 
   90 devclass_t ar_devclass;
   91 
   92 struct ar_softc {
   93 #ifndef NETGRAPH
   94         struct sppp ifsppp;
   95 #endif /* NETGRAPH */
   96         int unit;            /* With regards to all ar devices */
   97         int subunit;         /* With regards to this card */
   98         struct ar_hardc *hc;
   99 
  100         struct buf_block {
  101                 u_int txdesc;        /* On card address */
  102                 u_int txstart;       /* On card address */
  103                 u_int txend;         /* On card address */
  104                 u_int txtail;        /* Index of first unused buffer */
  105                 u_int txmax;         /* number of usable buffers/descriptors */
  106                 u_int txeda;         /* Error descriptor addresses */
  107         }block[AR_TX_BLOCKS];
  108 
  109         char  xmit_busy;     /* Transmitter is busy */
  110         char  txb_inuse;     /* Number of tx blocks currently in use */
  111         u_char txb_new;      /* Index to where new buffer will be added */
  112         u_char txb_next_tx;  /* Index to next block ready to tx */
  113 
  114         u_int rxdesc;        /* On card address */
  115         u_int rxstart;       /* On card address */
  116         u_int rxend;         /* On card address */
  117         u_int rxhind;        /* Index to the head of the rx buffers. */
  118         u_int rxmax;         /* number of usable buffers/descriptors */
  119 
  120         int scano;
  121         int scachan;
  122         sca_regs *sca;
  123 #ifdef NETGRAPH
  124         int     running;        /* something is attached so we are running */
  125         int     dcd;            /* do we have dcd? */
  126         /* ---netgraph bits --- */
  127         char            nodename[NG_NODESIZ]; /* store our node name */
  128         int             datahooks;      /* number of data hooks attached */
  129         node_p          node;           /* netgraph node */
  130         hook_p          hook;           /* data hook */
  131         hook_p          debug_hook;
  132         struct ifqueue  xmitq_hipri;    /* hi-priority transmit queue */
  133         struct ifqueue  xmitq;          /* transmit queue */
  134         int             flags;          /* state */
  135 #define SCF_RUNNING     0x01            /* board is active */
  136 #define SCF_OACTIVE     0x02            /* output is active */
  137         int             out_dog;        /* watchdog cycles output count-down */
  138         struct callout  timer;          /* watchdog timer */
  139         u_long          inbytes, outbytes;      /* stats */
  140         u_long          lastinbytes, lastoutbytes; /* a second ago */
  141         u_long          inrate, outrate;        /* highest rate seen */
  142         u_long          inlast;         /* last input N secs ago */
  143         u_long          out_deficit;    /* output since last input */
  144         u_long          oerrors, ierrors[6];
  145         u_long          opackets, ipackets;
  146 #endif /* NETGRAPH */
  147 };
  148 
  149 static int      next_ar_unit = 0;
  150 static struct lwkt_serialize ar_serializer;
  151 
  152 #ifdef NETGRAPH
  153 #define DOG_HOLDOFF     6       /* dog holds off for 6 secs */
  154 #define QUITE_A_WHILE   300     /* 5 MINUTES */
  155 #define LOTS_OF_PACKETS 100
  156 #endif /* NETGRAPH */
  157 
  158 /*
  159  * This translate from irq numbers to
  160  * the value that the arnet card needs
  161  * in the lower part of the AR_INT_SEL
  162  * register.
  163  */
  164 static int irqtable[16] = {
  165         0,      /*  0 */
  166         0,      /*  1 */
  167         0,      /*  2 */
  168         1,      /*  3 */
  169         0,      /*  4 */
  170         2,      /*  5 */
  171         0,      /*  6 */
  172         3,      /*  7 */
  173         0,      /*  8 */
  174         0,      /*  9 */
  175         4,      /* 10 */
  176         5,      /* 11 */
  177         6,      /* 12 */
  178         0,      /* 13 */
  179         0,      /* 14 */
  180         7       /* 15 */
  181 };
  182 
  183 #ifndef NETGRAPH
  184 DECLARE_DUMMY_MODULE(if_ar);
  185 MODULE_DEPEND(if_ar, sppp, 1, 1, 1);
  186 #else
  187 MODULE_DEPEND(ng_sync_ar, netgraph, NG_ABI_VERSION, NG_ABI_VERSION, NG_ABI_VERSION);
  188 #endif
  189 
  190 static void arintr(void *arg);
  191 static void ar_xmit(struct ar_softc *sc);
  192 #ifndef NETGRAPH
  193 static void arstart(struct ifnet *ifp, struct ifaltq_subque *);
  194 static int arioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *);
  195 static void arwatchdog(struct ifnet *ifp);
  196 #else   /* NETGRAPH */
  197 static void arstart(struct ar_softc *sc);
  198 static void arwatchdog(struct ar_softc *sc);
  199 #endif  /* NETGRAPH */
  200 static int ar_packet_avail(struct ar_softc *sc, int *len, u_char *rxstat);
  201 static void ar_copy_rxbuf(struct mbuf *m, struct ar_softc *sc, int len);
  202 static void ar_eat_packet(struct ar_softc *sc, int single);
  203 static void ar_get_packets(struct ar_softc *sc);
  204 
  205 static int ar_read_pim_iface(volatile struct ar_hardc *hc, int channel);
  206 static void ar_up(struct ar_softc *sc);
  207 static void ar_down(struct ar_softc *sc);
  208 static void arc_init(struct ar_hardc *hc);
  209 static void ar_init_sca(struct ar_hardc *hc, int scano);
  210 static void ar_init_msci(struct ar_softc *sc);
  211 static void ar_init_rx_dmac(struct ar_softc *sc);
  212 static void ar_init_tx_dmac(struct ar_softc *sc);
  213 static void ar_dmac_intr(struct ar_hardc *hc, int scano, u_char isr);
  214 static void ar_msci_intr(struct ar_hardc *hc, int scano, u_char isr);
  215 static void ar_timer_intr(struct ar_hardc *hc, int scano, u_char isr);
  216 
  217 #ifdef  NETGRAPH
  218 static  void    ngar_watchdog_frame(void * arg);
  219 static  void    ngar_init(void* ignored);
  220 
  221 static ng_constructor_t ngar_constructor;
  222 static ng_rcvmsg_t      ngar_rcvmsg;
  223 static ng_shutdown_t    ngar_shutdown;
  224 static ng_newhook_t     ngar_newhook;
  225 /*static ng_findhook_t  ngar_findhook; */
  226 static ng_connect_t     ngar_connect;
  227 static ng_rcvdata_t     ngar_rcvdata;
  228 static ng_disconnect_t  ngar_disconnect;
  229         
  230 static struct ng_type typestruct = {
  231         NG_VERSION,
  232         NG_AR_NODE_TYPE,
  233         NULL,
  234         ngar_constructor,
  235         ngar_rcvmsg,
  236         ngar_shutdown,
  237         ngar_newhook,
  238         NULL,
  239         ngar_connect,
  240         ngar_rcvdata,
  241         ngar_rcvdata,
  242         ngar_disconnect,
  243         NULL
  244 };
  245 
  246 static int      ngar_done_init = 0;
  247 #endif /* NETGRAPH */
  248 
  249 int
  250 ar_attach(device_t device)
  251 {
  252         struct ar_hardc *hc;
  253         struct ar_softc *sc;
  254 #ifndef NETGRAPH
  255         struct ifnet *ifp;
  256         char *iface;
  257 #endif  /* NETGRAPH */
  258         int unit;
  259         int error;
  260 
  261         hc = (struct ar_hardc *)device_get_softc(device);
  262         lwkt_serialize_init(&ar_serializer);
  263 
  264         kprintf("arc%d: %uK RAM, %u ports, rev %u.\n",
  265                 hc->cunit,
  266                 hc->memsize/1024,
  267                 hc->numports,
  268                 hc->revision);
  269         
  270         arc_init(hc);
  271 
  272         error = BUS_SETUP_INTR(device_get_parent(device), device, hc->res_irq,
  273                                0, arintr, hc,
  274                                &hc->intr_cookie, &ar_serializer, NULL);
  275         if (error)
  276                 return (1);
  277 
  278         sc = hc->sc;
  279 
  280         for(unit=0;unit<hc->numports;unit+=NCHAN)
  281                 ar_init_sca(hc, unit / NCHAN);
  282 
  283         /*
  284          * Now configure each port on the card.
  285          */
  286         for(unit=0;unit<hc->numports;sc++,unit++) {
  287                 sc->hc = hc;
  288                 sc->subunit = unit;
  289                 sc->unit = next_ar_unit;
  290                 next_ar_unit++;
  291                 sc->scano = unit / NCHAN;
  292                 sc->scachan = unit%NCHAN;
  293 
  294                 ar_init_rx_dmac(sc);
  295                 ar_init_tx_dmac(sc);
  296                 ar_init_msci(sc);
  297 
  298 #ifndef NETGRAPH
  299                 ifp = &sc->ifsppp.pp_if;
  300 
  301                 ifp->if_softc = sc;
  302                 if_initname(ifp, device_get_name(device), sc->unit);
  303                 ifp->if_mtu = PP_MTU;
  304                 ifp->if_flags = IFF_POINTOPOINT | IFF_MULTICAST;
  305                 ifp->if_ioctl = arioctl;
  306                 ifp->if_start = arstart;
  307                 ifp->if_watchdog = arwatchdog;
  308 
  309                 sc->ifsppp.pp_flags = PP_KEEPALIVE;
  310 
  311                 switch(hc->interface[unit]) {
  312                 default: iface = "UNKNOWN"; break;
  313                 case AR_IFACE_EIA_232: iface = "EIA-232"; break;
  314                 case AR_IFACE_V_35: iface = "EIA-232 or V.35"; break;
  315                 case AR_IFACE_EIA_530: iface = "EIA-530"; break;
  316                 case AR_IFACE_X_21: iface = "X.21"; break;
  317                 case AR_IFACE_COMBO: iface = "COMBO X.21 / EIA-530"; break;
  318                 }
  319 
  320                 kprintf("ar%d: Adapter %d, port %d, interface %s.\n",
  321                         sc->unit,
  322                         hc->cunit,
  323                         sc->subunit,
  324                         iface);
  325 
  326                 sppp_attach((struct ifnet *)&sc->ifsppp);
  327                 if_attach(ifp, &ar_serializer);
  328 
  329                 bpfattach(ifp, DLT_PPP, PPP_HEADER_LEN);
  330 #else   /* NETGRAPH */
  331                 /*
  332                  * we have found a node, make sure our 'type' is availabe.
  333                  */
  334                 if (ngar_done_init == 0) ngar_init(NULL);
  335                 if (ng_make_node_common(&typestruct, &sc->node) != 0)
  336                         return (1);
  337                 ksprintf(sc->nodename, "%s%d", NG_AR_NODE_TYPE, sc->unit);
  338                 if (ng_name_node(sc->node, sc->nodename)) {
  339                         NG_NODE_UNREF(sc->node); /* drop it again */
  340                         return (1);
  341                 }
  342                 NG_NODE_SET_PRIVATE(sc->node, sc);
  343                 callout_init(&sc->timer);
  344                 sc->xmitq.ifq_maxlen = IFQ_MAXLEN;
  345                 sc->xmitq_hipri.ifq_maxlen = IFQ_MAXLEN;
  346                 sc->running = 0;
  347 #endif  /* NETGRAPH */
  348         }
  349 
  350         if(hc->bustype == AR_BUS_ISA)
  351                 ARC_SET_OFF(hc);
  352 
  353         return (0);
  354 }
  355 
  356 int
  357 ar_detach(device_t device)
  358 {
  359         device_t parent = device_get_parent(device);
  360         struct ar_hardc *hc = device_get_softc(device);
  361         int error;
  362 
  363         lwkt_serialize_enter(&ar_serializer);
  364 
  365         if (hc->intr_cookie != NULL) {
  366                 if (BUS_TEARDOWN_INTR(parent, device,
  367                         hc->res_irq, hc->intr_cookie) != 0) {
  368                                 kprintf("intr teardown failed.. continuing\n");
  369                 }
  370                 hc->intr_cookie = NULL;
  371         }
  372 
  373         /*
  374          * deallocate any system resources we may have
  375          * allocated on behalf of this driver.
  376          */
  377         kfree(hc->sc, M_DEVBUF);
  378         hc->sc = NULL;
  379         hc->mem_start = NULL;
  380         error = ar_deallocate_resources(device);
  381         lwkt_serialize_exit(&ar_serializer);
  382 
  383         return (error);
  384 }
  385 
  386 int
  387 ar_allocate_ioport(device_t device, int rid, u_long size)
  388 {
  389         struct ar_hardc *hc = device_get_softc(device);
  390 
  391         hc->rid_ioport = rid;
  392         hc->res_ioport = bus_alloc_resource(device, SYS_RES_IOPORT,
  393                         &hc->rid_ioport, 0ul, ~0ul, size, RF_ACTIVE);
  394         if (hc->res_ioport == NULL) {
  395                 goto errexit;
  396         }
  397         hc->bt = rman_get_bustag(hc->res_ioport);
  398         hc->bh = rman_get_bushandle(hc->res_ioport);
  399 
  400         return (0);
  401 
  402 errexit:
  403         ar_deallocate_resources(device);
  404         return (ENXIO);
  405 }
  406 
  407 int
  408 ar_allocate_irq(device_t device, int rid, u_long size)
  409 {
  410         struct ar_hardc *hc = device_get_softc(device);
  411 
  412         hc->rid_irq = rid;
  413         hc->res_irq = bus_alloc_resource_any(device, SYS_RES_IRQ,
  414                         &hc->rid_irq, RF_SHAREABLE|RF_ACTIVE);
  415         if (hc->res_irq == NULL) {
  416                 goto errexit;
  417         }
  418         return (0);
  419 
  420 errexit:
  421         ar_deallocate_resources(device);
  422         return (ENXIO);
  423 }
  424 
  425 int
  426 ar_allocate_memory(device_t device, int rid, u_long size)
  427 {
  428         struct ar_hardc *hc = device_get_softc(device);
  429 
  430         hc->rid_memory = rid;
  431         hc->res_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
  432                         &hc->rid_memory, 0ul, ~0ul, size, RF_ACTIVE);
  433         if (hc->res_memory == NULL) {
  434                 goto errexit;
  435         }
  436         return (0);
  437 
  438 errexit:
  439         ar_deallocate_resources(device);
  440         return (ENXIO);
  441 }
  442 
  443 int
  444 ar_allocate_plx_memory(device_t device, int rid, u_long size)
  445 {
  446         struct ar_hardc *hc = device_get_softc(device);
  447 
  448         hc->rid_plx_memory = rid;
  449         hc->res_plx_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
  450                         &hc->rid_plx_memory, 0ul, ~0ul, size, RF_ACTIVE);
  451         if (hc->res_plx_memory == NULL) {
  452                 goto errexit;
  453         }
  454         return (0);
  455 
  456 errexit:
  457         ar_deallocate_resources(device);
  458         return (ENXIO);
  459 }
  460 
  461 int
  462 ar_deallocate_resources(device_t device)
  463 {
  464         struct ar_hardc *hc = device_get_softc(device);
  465 
  466         if (hc->res_irq != 0) {
  467                 bus_deactivate_resource(device, SYS_RES_IRQ,
  468                         hc->rid_irq, hc->res_irq);
  469                 bus_release_resource(device, SYS_RES_IRQ,
  470                         hc->rid_irq, hc->res_irq);
  471                 hc->res_irq = 0;
  472         }
  473         if (hc->res_ioport != 0) {
  474                 bus_deactivate_resource(device, SYS_RES_IOPORT,
  475                         hc->rid_ioport, hc->res_ioport);
  476                 bus_release_resource(device, SYS_RES_IOPORT,
  477                         hc->rid_ioport, hc->res_ioport);
  478                 hc->res_ioport = 0;
  479         }
  480         if (hc->res_memory != 0) {
  481                 bus_deactivate_resource(device, SYS_RES_MEMORY,
  482                         hc->rid_memory, hc->res_memory);
  483                 bus_release_resource(device, SYS_RES_MEMORY,
  484                         hc->rid_memory, hc->res_memory);
  485                 hc->res_memory = 0;
  486         }
  487         if (hc->res_plx_memory != 0) {
  488                 bus_deactivate_resource(device, SYS_RES_MEMORY,
  489                         hc->rid_plx_memory, hc->res_plx_memory);
  490                 bus_release_resource(device, SYS_RES_MEMORY,
  491                         hc->rid_plx_memory, hc->res_plx_memory);
  492                 hc->res_plx_memory = 0;
  493         }
  494         return (0);
  495 }
  496 
  497 /*
  498  * First figure out which SCA gave the interrupt.
  499  * Process it.
  500  * See if there is other interrupts pending.
  501  * Repeat until there is no more interrupts.
  502  */
  503 static void
  504 arintr(void *arg)
  505 {
  506         struct ar_hardc *hc = (struct ar_hardc *)arg;
  507         sca_regs *sca;
  508         u_char isr0, isr1, isr2, arisr;
  509         int scano;
  510 
  511         /* XXX Use the PCI interrupt score board register later */
  512         if(hc->bustype == AR_BUS_PCI)
  513                 arisr = hc->orbase[AR_ISTAT * 4];
  514         else
  515                 arisr = ar_inb(hc, AR_ISTAT);
  516 
  517         while(arisr & AR_BD_INT) {
  518                 TRC(kprintf("arisr = %x\n", arisr));
  519                 if(arisr & AR_INT_0)
  520                         scano = 0;
  521                 else if(arisr & AR_INT_1)
  522                         scano = 1;
  523                 else {
  524                         /* XXX Oops this shouldn't happen. */
  525                         kprintf("arc%d: Interrupted with no interrupt.\n",
  526                                 hc->cunit);
  527                         return;
  528                 }
  529                 sca = hc->sca[scano];
  530 
  531                 if(hc->bustype == AR_BUS_ISA)
  532                         ARC_SET_SCA(hc, scano);
  533 
  534                 isr0 = sca->isr0;
  535                 isr1 = sca->isr1;
  536                 isr2 = sca->isr2;
  537 
  538                 TRC(kprintf("arc%d: ARINTR isr0 %x, isr1 %x, isr2 %x\n",
  539                         hc->cunit,
  540                         isr0,
  541                         isr1,
  542                         isr2));
  543                 if(isr0)
  544                         ar_msci_intr(hc, scano, isr0);
  545 
  546                 if(isr1)
  547                         ar_dmac_intr(hc, scano, isr1);
  548 
  549                 if(isr2)
  550                         ar_timer_intr(hc, scano, isr2);
  551 
  552                 /*
  553                  * Proccess the second sca's interrupt if available.
  554                  * Else see if there are any new interrupts.
  555                  */
  556                 if((arisr & AR_INT_0) && (arisr & AR_INT_1))
  557                         arisr &= ~AR_INT_0;
  558                 else {
  559                         if(hc->bustype == AR_BUS_PCI)
  560                                 arisr = hc->orbase[AR_ISTAT * 4];
  561                         else
  562                                 arisr = ar_inb(hc, AR_ISTAT);
  563                 }
  564         }
  565 
  566         if(hc->bustype == AR_BUS_ISA)
  567                 ARC_SET_OFF(hc);
  568 }
  569 
  570 
  571 /*
  572  * This will only start the transmitter. It is assumed that the data
  573  * is already there. It is normally called from arstart() or ar_dmac_intr().
  574  *
  575  */
  576 static void
  577 ar_xmit(struct ar_softc *sc)
  578 {
  579 #ifndef NETGRAPH
  580         struct ifnet *ifp;
  581 #endif /* NETGRAPH */
  582         dmac_channel *dmac;
  583 
  584 #ifndef NETGRAPH
  585         ifp = &sc->ifsppp.pp_if;
  586 #endif /* NETGRAPH */
  587         dmac = &sc->sca->dmac[DMAC_TXCH(sc->scachan)];
  588 
  589         if(sc->hc->bustype == AR_BUS_ISA)
  590                 ARC_SET_SCA(sc->hc, sc->scano);
  591         dmac->cda = (u_short)(sc->block[sc->txb_next_tx].txdesc & 0xffff);
  592 
  593         dmac->eda = (u_short)(sc->block[sc->txb_next_tx].txeda & 0xffff);
  594         dmac->dsr = SCA_DSR_DE;
  595 
  596         sc->xmit_busy = 1;
  597 
  598         sc->txb_next_tx++;
  599         if(sc->txb_next_tx == AR_TX_BLOCKS)
  600                 sc->txb_next_tx = 0;
  601 
  602 #ifndef NETGRAPH
  603         ifp->if_timer = 2; /* Value in seconds. */
  604 #else   /* NETGRAPH */
  605         sc->out_dog = DOG_HOLDOFF;      /* give ourself some breathing space*/
  606 #endif  /* NETGRAPH */
  607         if(sc->hc->bustype == AR_BUS_ISA)
  608                 ARC_SET_OFF(sc->hc);
  609 }
  610 
  611 /*
  612  * This function will be called from the upper level when a user add a
  613  * packet to be send, and from the interrupt handler after a finished
  614  * transmit.
  615  *
  616  * This function only place the data in the oncard buffers. It does not
  617  * start the transmition. ar_xmit() does that.
  618  *
  619  * Transmitter idle state is indicated by the ifq_is_oactive. The function
  620  * that clears that should ensure that the transmitter and its DMA is
  621  * in a "good" idle state.
  622  */
  623 #ifndef NETGRAPH
  624 static void
  625 arstart(struct ifnet *ifp, struct ifaltq_subque *ifsq)
  626 {
  627         struct ar_softc *sc = ifp->if_softc;
  628 #else   /* NETGRAPH */
  629 static void
  630 arstart(struct ar_softc *sc)
  631 {
  632 #endif  /* NETGRAPH */
  633         int i, len, tlen;
  634         struct mbuf *mtx;
  635         u_char *txdata;
  636         sca_descriptor *txdesc;
  637         struct buf_block *blkp;
  638 
  639 #ifndef NETGRAPH
  640         if(!(ifp->if_flags & IFF_RUNNING))
  641                 return;
  642 #else   /* NETGRAPH */
  643 /* XXX */
  644 #endif  /* NETGRAPH */
  645   
  646 top_arstart:
  647 
  648         /*
  649          * See if we have space for more packets.
  650          */
  651         if(sc->txb_inuse == AR_TX_BLOCKS) {
  652 #ifndef NETGRAPH
  653                 ifq_set_oactive(&ifp->if_snd);  /* yes, mark active */
  654 #else   /* NETGRAPH */
  655 /*XXX*/         /*ifq_set_oactive(&ifp->if_snd);*/      /* yes, mark active */
  656 #endif /* NETGRAPH */
  657                 return;
  658         }
  659 
  660 #ifndef NETGRAPH
  661         mtx = sppp_dequeue(ifp);
  662 #else   /* NETGRAPH */
  663         IF_DEQUEUE(&sc->xmitq_hipri, mtx);
  664         if (mtx == NULL) {
  665                 IF_DEQUEUE(&sc->xmitq, mtx);
  666         }
  667 #endif /* NETGRAPH */
  668         if(!mtx)
  669                 return;
  670 
  671         /*
  672          * It is OK to set the memory window outside the loop because
  673          * all tx buffers and descriptors are assumed to be in the same
  674          * 16K window.
  675          */
  676         if(sc->hc->bustype == AR_BUS_ISA)
  677                 ARC_SET_MEM(sc->hc, sc->block[0].txdesc);
  678 
  679         /*
  680          * We stay in this loop until there is nothing in the
  681          * TX queue left or the tx buffer is full.
  682          */
  683         i = 0;
  684         blkp = &sc->block[sc->txb_new];
  685         txdesc = (sca_descriptor *)
  686                 (sc->hc->mem_start + (blkp->txdesc & sc->hc->winmsk));
  687         txdata = (u_char *)(sc->hc->mem_start + (blkp->txstart & sc->hc->winmsk));
  688         for(;;) {
  689                 len = mtx->m_pkthdr.len;
  690 
  691                 TRC(kprintf("ar%d: ARstart len %u\n", sc->unit, len));
  692 
  693                 /*
  694                  * We can do this because the tx buffers don't wrap.
  695                  */
  696                 m_copydata(mtx, 0, len, txdata);
  697                 tlen = len;
  698                 while(tlen > AR_BUF_SIZ) {
  699                         txdesc->stat = 0;
  700                         txdesc->len = AR_BUF_SIZ;
  701                         tlen -= AR_BUF_SIZ;
  702                         txdesc++;
  703                         txdata += AR_BUF_SIZ;
  704                         i++;
  705                 }
  706                 /* XXX Move into the loop? */
  707                 txdesc->stat = SCA_DESC_EOM;
  708                 txdesc->len = tlen;
  709                 txdesc++;
  710                 txdata += AR_BUF_SIZ;
  711                 i++;
  712 
  713 #ifndef NETGRAPH
  714                 BPF_MTAP(ifp, mtx);
  715                 m_freem(mtx);
  716                 IFNET_STAT_INC(&sc->ifsppp.pp_if, opackets, 1);
  717 #else   /* NETGRAPH */
  718                 m_freem(mtx);
  719                 sc->outbytes += len;
  720                 ++sc->opackets;
  721 #endif  /* NETGRAPH */
  722 
  723                 /*
  724                  * Check if we have space for another mbuf.
  725                  * XXX This is hardcoded. A packet won't be larger
  726                  * than 3 buffers (3 x 512).
  727                  */
  728                 if((i + 3) >= blkp->txmax)
  729                         break;
  730 
  731 #ifndef NETGRAPH
  732                 mtx = sppp_dequeue(ifp);
  733 #else   /* NETGRAPH */
  734                 IF_DEQUEUE(&sc->xmitq_hipri, mtx);
  735                 if (mtx == NULL) {
  736                         IF_DEQUEUE(&sc->xmitq, mtx);
  737                 }
  738 #endif /* NETGRAPH */
  739                 if(!mtx)
  740                         break;
  741         }
  742 
  743         blkp->txtail = i;
  744 
  745         /*
  746          * Mark the last descriptor, so that the SCA know where
  747          * to stop.
  748          */
  749         txdesc--;
  750         txdesc->stat |= SCA_DESC_EOT;
  751 
  752         txdesc = (sca_descriptor *)blkp->txdesc;
  753         blkp->txeda = (u_short)((u_int)&txdesc[i]);
  754 
  755 #if 0
  756         kprintf("ARstart: %p desc->cp %x\n", &txdesc->cp, txdesc->cp);
  757         kprintf("ARstart: %p desc->bp %x\n", &txdesc->bp, txdesc->bp);
  758         kprintf("ARstart: %p desc->bpb %x\n", &txdesc->bpb, txdesc->bpb);
  759         kprintf("ARstart: %p desc->len %x\n", &txdesc->len, txdesc->len);
  760         kprintf("ARstart: %p desc->stat %x\n", &txdesc->stat, txdesc->stat);
  761 #endif
  762 
  763         sc->txb_inuse++;
  764         sc->txb_new++;
  765         if(sc->txb_new == AR_TX_BLOCKS)
  766                 sc->txb_new = 0;
  767 
  768         if(sc->xmit_busy == 0)
  769                 ar_xmit(sc);
  770 
  771         if(sc->hc->bustype == AR_BUS_ISA)
  772                 ARC_SET_OFF(sc->hc);
  773 
  774         goto top_arstart;
  775 }
  776 
  777 #ifndef NETGRAPH
  778 static int
  779 arioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
  780 {
  781         int error;
  782         int was_up, should_be_up;
  783         struct ar_softc *sc = ifp->if_softc;
  784 
  785         TRC(if_printf(ifp, "arioctl.\n");)
  786 
  787         was_up = ifp->if_flags & IFF_RUNNING;
  788 
  789         error = sppp_ioctl(ifp, cmd, data);
  790         TRC(if_printf(ifp, "ioctl: ifsppp.pp_flags = %x, if_flags %x.\n", 
  791                 ((struct sppp *)ifp)->pp_flags, ifp->if_flags);)
  792         if(error)
  793                 return (error);
  794 
  795         if((cmd != SIOCSIFFLAGS) && cmd != (SIOCSIFADDR))
  796                 return (0);
  797 
  798         TRC(if_printf(ifp, "arioctl %s.\n",
  799                 (cmd == SIOCSIFFLAGS) ? "SIOCSIFFLAGS" : "SIOCSIFADDR");)
  800 
  801         should_be_up = ifp->if_flags & IFF_RUNNING;
  802 
  803         if(!was_up && should_be_up) {
  804                 /* Interface should be up -- start it. */
  805                 ar_up(sc);
  806                 arstart(ifp, ifq_get_subq_default(&ifp->if_snd));
  807                 /* XXX Maybe clear the IFF_UP flag so that the link
  808                  * will only go up after sppp lcp and ipcp negotiation.
  809                  */
  810         } else if(was_up && !should_be_up) {
  811                 /* Interface should be down -- stop it. */
  812                 ar_down(sc);
  813                 sppp_flush(ifp);
  814         }
  815         return (0);
  816 }
  817 #endif  /* NETGRAPH */
  818 
  819 /*
  820  * This is to catch lost tx interrupts.
  821  */
  822 static void
  823 #ifndef NETGRAPH
  824 arwatchdog(struct ifnet *ifp)
  825 {
  826         struct ar_softc *sc = ifp->if_softc;
  827 #else   /* NETGRAPH */
  828 arwatchdog(struct ar_softc *sc)
  829 {
  830 #endif  /* NETGRAPH */
  831         msci_channel *msci = &sc->sca->msci[sc->scachan];
  832 
  833 #ifndef NETGRAPH
  834         if(!(ifp->if_flags & IFF_RUNNING))
  835                 return;
  836 #endif  /* NETGRAPH */
  837 
  838         if(sc->hc->bustype == AR_BUS_ISA)
  839                 ARC_SET_SCA(sc->hc, sc->scano);
  840 
  841         /* XXX if(sc->ifsppp.pp_if.if_flags & IFF_DEBUG) */
  842                 kprintf("ar%d: transmit failed, "
  843                         "ST0 %x, ST1 %x, ST3 %x, DSR %x.\n",
  844                         sc->unit,
  845                         msci->st0,
  846                         msci->st1,
  847                         msci->st3,
  848                         sc->sca->dmac[DMAC_TXCH(sc->scachan)].dsr);
  849 
  850         if(msci->st1 & SCA_ST1_UDRN) {
  851                 msci->cmd = SCA_CMD_TXABORT;
  852                 msci->cmd = SCA_CMD_TXENABLE;
  853                 msci->st1 = SCA_ST1_UDRN;
  854         }
  855 
  856         sc->xmit_busy = 0;
  857 #ifndef NETGRAPH
  858         ifq_clr_oactive(&ifp->if_snd);
  859 #else   /* NETGRAPH */
  860         /* XXX ifq_clr_oactive(&ifp->if_snd); */
  861 #endif  /* NETGRAPH */
  862 
  863         if(sc->txb_inuse && --sc->txb_inuse)
  864                 ar_xmit(sc);
  865 
  866 #ifndef NETGRAPH
  867         arstart(ifp, ifq_get_subq_default(&ifp->if_snd));
  868 #else   /* NETGRAPH */
  869         arstart(sc);
  870 #endif  /* NETGRAPH */
  871 }
  872 
  873 static void
  874 ar_up(struct ar_softc *sc)
  875 {
  876         sca_regs *sca;
  877         msci_channel *msci;
  878 
  879         sca = sc->sca;
  880         msci = &sca->msci[sc->scachan];
  881 
  882         TRC(kprintf("ar%d: sca %p, msci %p, ch %d\n",
  883                 sc->unit, sca, msci, sc->scachan));
  884 
  885         /*
  886          * Enable transmitter and receiver.
  887          * Raise DTR and RTS.
  888          * Enable interrupts.
  889          */
  890         if(sc->hc->bustype == AR_BUS_ISA)
  891                 ARC_SET_SCA(sc->hc, sc->scano);
  892 
  893         /* XXX
  894          * What about using AUTO mode in msci->md0 ???
  895          * And what about CTS/DCD etc... ?
  896          */
  897         if(sc->hc->handshake & AR_SHSK_RTS)
  898                 msci->ctl &= ~SCA_CTL_RTS;
  899         if(sc->hc->handshake & AR_SHSK_DTR) {
  900                 sc->hc->txc_dtr[sc->scano] &= sc->scachan ? 
  901                         ~AR_TXC_DTR_DTR1 : ~AR_TXC_DTR_DTR0;
  902                 if(sc->hc->bustype == AR_BUS_PCI)
  903                         sc->hc->orbase[sc->hc->txc_dtr_off[sc->scano]] =
  904                                 sc->hc->txc_dtr[sc->scano];
  905                 else
  906                         ar_outb(sc->hc, sc->hc->txc_dtr_off[sc->scano],
  907                                 sc->hc->txc_dtr[sc->scano]);
  908         }
  909 
  910         if(sc->scachan == 0) {
  911                 sca->ier0 |= 0x0F;
  912                 sca->ier1 |= 0x0F;
  913         } else {
  914                 sca->ier0 |= 0xF0;
  915                 sca->ier1 |= 0xF0;
  916         }
  917 
  918         msci->cmd = SCA_CMD_RXENABLE;
  919         if(sc->hc->bustype == AR_BUS_ISA)
  920                 ar_inb(sc->hc, AR_ID_5); /* XXX slow it down a bit. */
  921         msci->cmd = SCA_CMD_TXENABLE;
  922 
  923         if(sc->hc->bustype == AR_BUS_ISA)
  924                 ARC_SET_OFF(sc->hc);
  925 #ifdef  NETGRAPH
  926         callout_reset(&sc->timer, hz, ngar_watchdog_frame, sc);
  927         sc->running = 1;
  928 #endif  /* NETGRAPH */
  929 }
  930 
  931 static void
  932 ar_down(struct ar_softc *sc)
  933 {
  934         sca_regs *sca;
  935         msci_channel *msci;
  936 
  937         sca = sc->sca;
  938         msci = &sca->msci[sc->scachan];
  939 
  940 #ifdef  NETGRAPH
  941         callout_stop(&sc->timer);
  942         sc->running = 0;
  943 #endif  /* NETGRAPH */
  944         /*
  945          * Disable transmitter and receiver.
  946          * Lower DTR and RTS.
  947          * Disable interrupts.
  948          */
  949         if(sc->hc->bustype == AR_BUS_ISA)
  950                 ARC_SET_SCA(sc->hc, sc->scano);
  951         msci->cmd = SCA_CMD_RXDISABLE;
  952         if(sc->hc->bustype == AR_BUS_ISA)
  953                 ar_inb(sc->hc, AR_ID_5); /* XXX slow it down a bit. */
  954         msci->cmd = SCA_CMD_TXDISABLE;
  955 
  956         if(sc->hc->handshake & AR_SHSK_RTS)
  957                 msci->ctl |= SCA_CTL_RTS;
  958         if(sc->hc->handshake & AR_SHSK_DTR) {
  959                 sc->hc->txc_dtr[sc->scano] |= sc->scachan ? 
  960                         AR_TXC_DTR_DTR1 : AR_TXC_DTR_DTR0;
  961                 if(sc->hc->bustype == AR_BUS_PCI)
  962                         sc->hc->orbase[sc->hc->txc_dtr_off[sc->scano]] =
  963                                 sc->hc->txc_dtr[sc->scano];
  964                 else
  965                         ar_outb(sc->hc, sc->hc->txc_dtr_off[sc->scano],
  966                                 sc->hc->txc_dtr[sc->scano]);
  967         }
  968 
  969         if(sc->scachan == 0) {
  970                 sca->ier0 &= ~0x0F;
  971                 sca->ier1 &= ~0x0F;
  972         } else {
  973                 sca->ier0 &= ~0xF0;
  974                 sca->ier1 &= ~0xF0;
  975         }
  976 
  977         if(sc->hc->bustype == AR_BUS_ISA)
  978                 ARC_SET_OFF(sc->hc);
  979 }
  980 
  981 static int
  982 ar_read_pim_iface(volatile struct ar_hardc *hc, int channel)
  983 {
  984         int ctype, i, val, x;
  985         volatile u_char *pimctrl;
  986 
  987         ctype = 0;
  988         val = 0;
  989 
  990         pimctrl = hc->orbase + AR_PIMCTRL;
  991 
  992         /* Reset the PIM */
  993         *pimctrl = 0x00;
  994         *pimctrl = AR_PIM_STROBE;
  995 
  996         /* Check if there is a PIM */
  997         *pimctrl = 0x00;
  998         *pimctrl = AR_PIM_READ;
  999         x = *pimctrl;
 1000         TRC(kprintf("x = %x", x));
 1001         if(x & AR_PIM_DATA) {
 1002                 kprintf("No PIM installed\n");
 1003                 return (AR_IFACE_UNKNOWN);
 1004         }
 1005 
 1006         x = (x >> 1) & 0x01;
 1007         val |= x << 0;
 1008 
 1009         /* Now read the next 15 bits */
 1010         for(i = 1; i < 16; i++) {
 1011                 *pimctrl = AR_PIM_READ;
 1012                 *pimctrl = AR_PIM_READ | AR_PIM_STROBE;
 1013                 x = *pimctrl;
 1014                 TRC(kprintf(" %x ", x));
 1015                 x = (x >> 1) & 0x01;
 1016                 val |= x << i;
 1017                 if(i == 8 && (val & 0x000f) == 0x0004) {
 1018                         int ii;
 1019                         
 1020                         /* Start bit */
 1021                         *pimctrl = AR_PIM_A2D_DOUT | AR_PIM_A2D_STROBE;
 1022                         *pimctrl = AR_PIM_A2D_DOUT;
 1023 
 1024                         /* Mode bit */
 1025                         *pimctrl = AR_PIM_A2D_DOUT | AR_PIM_A2D_STROBE;
 1026                         *pimctrl = AR_PIM_A2D_DOUT;
 1027 
 1028                         /* Sign bit */
 1029                         *pimctrl = AR_PIM_A2D_DOUT | AR_PIM_A2D_STROBE;
 1030                         *pimctrl = AR_PIM_A2D_DOUT;
 1031 
 1032                         /* Select channel */
 1033                         *pimctrl = AR_PIM_A2D_STROBE | ((channel & 2) << 2);
 1034                         *pimctrl = ((channel & 2) << 2);
 1035                         *pimctrl = AR_PIM_A2D_STROBE | ((channel & 1) << 3);
 1036                         *pimctrl = ((channel & 1) << 3);
 1037 
 1038                         *pimctrl = AR_PIM_A2D_STROBE;
 1039 
 1040                         x = *pimctrl;
 1041                         if(x & AR_PIM_DATA)
 1042                                 kprintf("\nOops A2D start bit not zero (%X)\n", x);
 1043 
 1044                         for(ii = 7; ii >= 0; ii--) {
 1045                                 *pimctrl = 0x00;
 1046                                 *pimctrl = AR_PIM_A2D_STROBE;
 1047                                 x = *pimctrl;
 1048                                 if(x & AR_PIM_DATA)
 1049                                         ctype |= 1 << ii;
 1050                         }
 1051                 }
 1052         }
 1053         TRC(kprintf("\nPIM val %x, ctype %x, %d\n", val, ctype, ctype));
 1054         *pimctrl = AR_PIM_MODEG;
 1055         *pimctrl = AR_PIM_MODEG | AR_PIM_AUTO_LED;
 1056         if(ctype > 255)
 1057                 return (AR_IFACE_UNKNOWN);
 1058         if(ctype > 239)
 1059                 return (AR_IFACE_V_35);
 1060         if(ctype > 207)
 1061                 return (AR_IFACE_EIA_232);
 1062         if(ctype > 178)
 1063                 return (AR_IFACE_X_21);
 1064         if(ctype > 150)
 1065                 return (AR_IFACE_EIA_530);
 1066         if(ctype > 25)
 1067                 return (AR_IFACE_UNKNOWN);
 1068         if(ctype > 7)
 1069                 return (AR_IFACE_LOOPBACK);
 1070         return (AR_IFACE_UNKNOWN);
 1071 }
 1072 
 1073 /*
 1074  * Initialize the card, allocate memory for the ar_softc structures
 1075  * and fill in the pointers.
 1076  */
 1077 static void
 1078 arc_init(struct ar_hardc *hc)
 1079 {
 1080         struct ar_softc *sc;
 1081         int x;
 1082         u_int chanmem;
 1083         u_int bufmem;
 1084         u_int next;
 1085         u_int descneeded;
 1086         u_char isr, mar;
 1087         u_long memst;
 1088 
 1089         sc = kmalloc(hc->numports * sizeof(struct ar_softc), M_DEVBUF,
 1090                      M_WAITOK | M_ZERO);
 1091         hc->sc = sc;
 1092 
 1093         hc->txc_dtr[0] = AR_TXC_DTR_NOTRESET |
 1094                          AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1;
 1095         hc->txc_dtr[1] = AR_TXC_DTR_DTR0 | AR_TXC_DTR_DTR1;
 1096         hc->txc_dtr_off[0] = AR_TXC_DTR0;
 1097         hc->txc_dtr_off[1] = AR_TXC_DTR2;
 1098         if(hc->bustype == AR_BUS_PCI) {
 1099                 hc->txc_dtr_off[0] *= 4;
 1100                 hc->txc_dtr_off[1] *= 4;
 1101         }
 1102 
 1103         /*
 1104          * reset the card and wait at least 1uS.
 1105          */
 1106         if(hc->bustype == AR_BUS_PCI)
 1107                 hc->orbase[AR_TXC_DTR0 * 4] = ~AR_TXC_DTR_NOTRESET &
 1108                         hc->txc_dtr[0];
 1109         else
 1110                 ar_outb(hc, AR_TXC_DTR0, ~AR_TXC_DTR_NOTRESET &
 1111                         hc->txc_dtr[0]);
 1112         DELAY(2);
 1113         if(hc->bustype == AR_BUS_PCI)
 1114                 hc->orbase[AR_TXC_DTR0 * 4] = hc->txc_dtr[0];
 1115         else
 1116                 ar_outb(hc, AR_TXC_DTR0, hc->txc_dtr[0]);
 1117 
 1118         if(hc->bustype == AR_BUS_ISA) {
 1119                 /*
 1120                  * Configure the card.
 1121                  * Mem address, irq, 
 1122                  */
 1123                 memst = rman_get_start(hc->res_memory);
 1124                 mar = memst >> 16;
 1125                 isr = irqtable[hc->isa_irq] << 1;
 1126                 if(isr == 0)
 1127                         kprintf("ar%d: Warning illegal interrupt %d\n",
 1128                                 hc->cunit, hc->isa_irq);
 1129                 isr = isr | ((memst & 0xc000) >> 10);
 1130 
 1131                 hc->sca[0] = (sca_regs *)hc->mem_start;
 1132                 hc->sca[1] = (sca_regs *)hc->mem_start;
 1133 
 1134                 ar_outb(hc, AR_MEM_SEL, mar);
 1135                 ar_outb(hc, AR_INT_SEL, isr | AR_INTS_CEN);
 1136         }
 1137 
 1138         if(hc->bustype == AR_BUS_PCI && hc->interface[0] == AR_IFACE_PIM)
 1139                 for(x = 0; x < hc->numports; x++)
 1140                         hc->interface[x] = ar_read_pim_iface(hc, x);
 1141 
 1142         /*
 1143          * Set the TX clock direction and enable TX.
 1144          */
 1145         for(x=0;x<hc->numports;x++) {
 1146                 switch(hc->interface[x]) {
 1147                 case AR_IFACE_V_35:
 1148                         hc->txc_dtr[x / NCHAN] |= (x % NCHAN == 0) ?
 1149                             AR_TXC_DTR_TX0 : AR_TXC_DTR_TX1;
 1150                         hc->txc_dtr[x / NCHAN] |= (x % NCHAN == 0) ?
 1151                             AR_TXC_DTR_TXCS0 : AR_TXC_DTR_TXCS1;
 1152                         break;
 1153                 case AR_IFACE_EIA_530:
 1154                 case AR_IFACE_COMBO:
 1155                 case AR_IFACE_X_21:
 1156                         hc->txc_dtr[x / NCHAN] |= (x % NCHAN == 0) ?
 1157                             AR_TXC_DTR_TX0 : AR_TXC_DTR_TX1;
 1158                         break;
 1159                 }
 1160         }
 1161 
 1162         if(hc->bustype == AR_BUS_PCI)
 1163                 hc->orbase[AR_TXC_DTR0 * 4] = hc->txc_dtr[0];
 1164         else
 1165                 ar_outb(hc, AR_TXC_DTR0, hc->txc_dtr[0]);
 1166         if(hc->numports > NCHAN) {
 1167                 if(hc->bustype == AR_BUS_PCI)
 1168                         hc->orbase[AR_TXC_DTR2 * 4] = hc->txc_dtr[1];
 1169                 else
 1170                         ar_outb(hc, AR_TXC_DTR2, hc->txc_dtr[1]);
 1171         }
 1172 
 1173         chanmem = hc->memsize / hc->numports;
 1174         next = 0;
 1175 
 1176         for(x=0;x<hc->numports;x++, sc++) {
 1177                 int blk;
 1178 
 1179                 sc->sca = hc->sca[x / NCHAN];
 1180 
 1181                 for(blk = 0; blk < AR_TX_BLOCKS; blk++) {
 1182                         sc->block[blk].txdesc = next;
 1183                         bufmem = (16 * 1024) / AR_TX_BLOCKS;
 1184                         descneeded = bufmem / AR_BUF_SIZ;
 1185                         sc->block[blk].txstart = sc->block[blk].txdesc +
 1186                                 ((((descneeded * sizeof(sca_descriptor)) /
 1187                                         AR_BUF_SIZ) + 1) * AR_BUF_SIZ);
 1188                         sc->block[blk].txend = next + bufmem;
 1189                         sc->block[blk].txmax =
 1190                                 (sc->block[blk].txend - sc->block[blk].txstart)
 1191                                 / AR_BUF_SIZ;
 1192                         next += bufmem;
 1193 
 1194                         TRC(kprintf("ar%d: blk %d: txdesc %x, txstart %x, "
 1195                                    "txend %x, txmax %d\n",
 1196                                    x,
 1197                                    blk,
 1198                                    sc->block[blk].txdesc,
 1199                                    sc->block[blk].txstart,
 1200                                    sc->block[blk].txend,
 1201                                    sc->block[blk].txmax));
 1202                 }
 1203 
 1204                 sc->rxdesc = next;
 1205                 bufmem = chanmem - (bufmem * AR_TX_BLOCKS);
 1206                 descneeded = bufmem / AR_BUF_SIZ;
 1207                 sc->rxstart = sc->rxdesc +
 1208                                 ((((descneeded * sizeof(sca_descriptor)) /
 1209                                         AR_BUF_SIZ) + 1) * AR_BUF_SIZ);
 1210                 sc->rxend = next + bufmem;
 1211                 sc->rxmax = (sc->rxend - sc->rxstart) / AR_BUF_SIZ;
 1212                 next += bufmem;
 1213                 TRC(kprintf("ar%d: rxdesc %x, rxstart %x, "
 1214                            "rxend %x, rxmax %d\n",
 1215                            x, sc->rxdesc, sc->rxstart, sc->rxend, sc->rxmax));
 1216         }
 1217 
 1218         if(hc->bustype == AR_BUS_PCI)
 1219                 hc->orbase[AR_PIMCTRL] = AR_PIM_MODEG | AR_PIM_AUTO_LED;
 1220 }
 1221 
 1222 
 1223 /*
 1224  * The things done here are channel independent.
 1225  *
 1226  *   Configure the sca waitstates.
 1227  *   Configure the global interrupt registers.
 1228  *   Enable master dma enable.
 1229  */
 1230 static void
 1231 ar_init_sca(struct ar_hardc *hc, int scano)
 1232 {
 1233         sca_regs *sca;
 1234 
 1235         sca = hc->sca[scano];
 1236         if(hc->bustype == AR_BUS_ISA)
 1237                 ARC_SET_SCA(hc, scano);
 1238 
 1239         /*
 1240          * Do the wait registers.
 1241          * Set everything to 0 wait states.
 1242          */
 1243         sca->pabr0 = 0;
 1244         sca->pabr1 = 0;
 1245         sca->wcrl  = 0;
 1246         sca->wcrm  = 0;
 1247         sca->wcrh  = 0;
 1248 
 1249         /*
 1250          * Configure the interrupt registers.
 1251          * Most are cleared until the interface is configured.
 1252          */
 1253         sca->ier0 = 0x00; /* MSCI interrupts... Not used with dma. */
 1254         sca->ier1 = 0x00; /* DMAC interrupts */
 1255         sca->ier2 = 0x00; /* TIMER interrupts... Not used yet. */
 1256         sca->itcr = 0x00; /* Use ivr and no intr ack */
 1257         sca->ivr  = 0x40; /* Fill in the interrupt vector. */
 1258         sca->imvr = 0x40;
 1259 
 1260         /*
 1261          * Configure the timers.
 1262          * XXX Later
 1263          */
 1264 
 1265 
 1266         /*
 1267          * Set the DMA channel priority to rotate between
 1268          * all four channels.
 1269          *
 1270          * Enable all dma channels.
 1271          */
 1272         if(hc->bustype == AR_BUS_PCI) {
 1273                 u_char *t;
 1274 
 1275                 /*
 1276                  * Stupid problem with the PCI interface chip that break
 1277                  * things.
 1278                  * XXX
 1279                  */
 1280                 t = (u_char *)sca;
 1281                 t[AR_PCI_SCA_PCR] = SCA_PCR_PR2;
 1282                 t[AR_PCI_SCA_DMER] = SCA_DMER_EN;
 1283         } else {
 1284                 sca->pcr = SCA_PCR_PR2;
 1285                 sca->dmer = SCA_DMER_EN;
 1286         }
 1287 }
 1288 
 1289 
 1290 /*
 1291  * Configure the msci
 1292  *
 1293  * NOTE: The serial port configuration is hardcoded at the moment.
 1294  */
 1295 static void
 1296 ar_init_msci(struct ar_softc *sc)
 1297 {
 1298         msci_channel *msci;
 1299 
 1300         msci = &sc->sca->msci[sc->scachan];
 1301 
 1302         if(sc->hc->bustype == AR_BUS_ISA)
 1303                 ARC_SET_SCA(sc->hc, sc->scano);
 1304 
 1305         msci->cmd = SCA_CMD_RESET;
 1306 
 1307         msci->md0 = SCA_MD0_CRC_1 |
 1308                     SCA_MD0_CRC_CCITT |
 1309                     SCA_MD0_CRC_ENABLE |
 1310                     SCA_MD0_MODE_HDLC;
 1311         msci->md1 = SCA_MD1_NOADDRCHK;
 1312         msci->md2 = SCA_MD2_DUPLEX | SCA_MD2_NRZ;
 1313 
 1314         /*
 1315          * Acording to the manual I should give a reset after changing the
 1316          * mode registers.
 1317          */
 1318         msci->cmd = SCA_CMD_RXRESET;
 1319         msci->ctl = SCA_CTL_IDLPAT | SCA_CTL_UDRNC | SCA_CTL_RTS;
 1320 
 1321         /*
 1322          * For now all interfaces are programmed to use the RX clock for
 1323          * the TX clock.
 1324          */
 1325         switch(sc->hc->interface[sc->subunit]) {
 1326         case AR_IFACE_V_35:
 1327                 msci->rxs = SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1;
 1328                 msci->txs = SCA_TXS_CLK_TXC | SCA_TXS_DIV1;
 1329                 break;
 1330         case AR_IFACE_X_21:
 1331         case AR_IFACE_EIA_530:
 1332         case AR_IFACE_COMBO:
 1333                 msci->rxs = SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1;
 1334                 msci->txs = SCA_TXS_CLK_RX | SCA_TXS_DIV1;
 1335         }
 1336 
 1337         msci->tmc = 153;   /* This give 64k for loopback */
 1338 
 1339         /* XXX
 1340          * Disable all interrupts for now. I think if you are using
 1341          * the dmac you don't use these interrupts.
 1342          */
 1343         msci->ie0 = 0;
 1344         msci->ie1 = 0x0C; /* XXX CTS and DCD (DSR on 570I) level change. */
 1345         msci->ie2 = 0;
 1346         msci->fie = 0;
 1347 
 1348         msci->sa0 = 0;
 1349         msci->sa1 = 0;
 1350 
 1351         msci->idl = 0x7E; /* XXX This is what cisco does. */
 1352 
 1353         /*
 1354          * This is what the ARNET diags use.
 1355          */
 1356         msci->rrc  = 0x0E;
 1357         msci->trc0 = 0x12;
 1358         msci->trc1 = 0x1F;
 1359 }
 1360 
 1361 /*
 1362  * Configure the rx dma controller.
 1363  */
 1364 static void
 1365 ar_init_rx_dmac(struct ar_softc *sc)
 1366 {
 1367         dmac_channel *dmac;
 1368         sca_descriptor *rxd;
 1369         u_int rxbuf;
 1370         u_int rxda;
 1371         u_int rxda_d;
 1372         int x = 0;
 1373 
 1374         dmac = &sc->sca->dmac[DMAC_RXCH(sc->scachan)];
 1375 
 1376         if(sc->hc->bustype == AR_BUS_ISA)
 1377                 ARC_SET_MEM(sc->hc, sc->rxdesc);
 1378 
 1379         rxd = (sca_descriptor *)(sc->hc->mem_start + (sc->rxdesc&sc->hc->winmsk));
 1380         rxda_d = (u_int)sc->hc->mem_start - (sc->rxdesc & ~sc->hc->winmsk);
 1381 
 1382         for(rxbuf=sc->rxstart;rxbuf<sc->rxend;rxbuf += AR_BUF_SIZ, rxd++) {
 1383                 rxda = (u_int)&rxd[1] - rxda_d;
 1384                 rxd->cp = (u_short)(rxda & 0xfffful);
 1385 
 1386                 x++;
 1387                 if(x < 6)
 1388                         TRC(kprintf("Descrp %p, data pt %x, data %x, ",
 1389                             rxd, rxda, rxbuf));
 1390 
 1391                 rxd->bp = (u_short)(rxbuf & 0xfffful);
 1392                 rxd->bpb = (u_char)((rxbuf >> 16) & 0xff);
 1393                 rxd->len = 0;
 1394                 rxd->stat = 0xff; /* The sca write here when it is finished. */
 1395 
 1396                 if(x < 6)
 1397                 TRC(kprintf("bpb %x, bp %x.\n", rxd->bpb, rxd->bp));
 1398         }
 1399         rxd--;
 1400         rxd->cp = (u_short)(sc->rxdesc & 0xfffful);
 1401 
 1402         sc->rxhind = 0;
 1403 
 1404         if(sc->hc->bustype == AR_BUS_ISA)
 1405                 ARC_SET_SCA(sc->hc, sc->scano);
 1406 
 1407         dmac->dsr = 0;    /* Disable DMA transfer */
 1408         dmac->dcr = SCA_DCR_ABRT;
 1409 
 1410         /* XXX maybe also SCA_DMR_CNTE */
 1411         dmac->dmr = SCA_DMR_TMOD | SCA_DMR_NF;
 1412         dmac->bfl = AR_BUF_SIZ;
 1413 
 1414         dmac->cda = (u_short)(sc->rxdesc & 0xffff);
 1415         dmac->sarb = (u_char)((sc->rxdesc >> 16) & 0xff);
 1416 
 1417         rxd = (sca_descriptor *)sc->rxstart;
 1418         dmac->eda = (u_short)((u_int)&rxd[sc->rxmax - 1] & 0xffff);
 1419 
 1420         dmac->dir = 0xF0;
 1421 
 1422         dmac->dsr = SCA_DSR_DE;
 1423 }
 1424 
 1425 /*
 1426  * Configure the TX DMA descriptors.
 1427  * Initialize the needed values and chain the descriptors.
 1428  */
 1429 static void
 1430 ar_init_tx_dmac(struct ar_softc *sc)
 1431 {
 1432         dmac_channel *dmac;
 1433         struct buf_block *blkp;
 1434         int blk;
 1435         sca_descriptor *txd;
 1436         u_int txbuf;
 1437         u_int txda;
 1438         u_int txda_d;
 1439 
 1440         dmac = &sc->sca->dmac[DMAC_TXCH(sc->scachan)];
 1441 
 1442         if(sc->hc->bustype == AR_BUS_ISA)
 1443                 ARC_SET_MEM(sc->hc, sc->block[0].txdesc);
 1444 
 1445         for(blk = 0; blk < AR_TX_BLOCKS; blk++) {
 1446                 blkp = &sc->block[blk];
 1447                 txd = (sca_descriptor *)(sc->hc->mem_start +
 1448                                         (blkp->txdesc&sc->hc->winmsk));
 1449                 txda_d = (u_int)sc->hc->mem_start -
 1450                                 (blkp->txdesc & ~sc->hc->winmsk);
 1451 
 1452                 txbuf=blkp->txstart;
 1453                 for(;txbuf<blkp->txend;txbuf += AR_BUF_SIZ, txd++) {
 1454                         txda = (u_int)&txd[1] - txda_d;
 1455                         txd->cp = (u_short)(txda & 0xfffful);
 1456 
 1457                         txd->bp = (u_short)(txbuf & 0xfffful);
 1458                         txd->bpb = (u_char)((txbuf >> 16) & 0xff);
 1459                         TRC(kprintf("ar%d: txbuf %x, bpb %x, bp %x\n",
 1460                                 sc->unit, txbuf, txd->bpb, txd->bp));
 1461                         txd->len = 0;
 1462                         txd->stat = 0;
 1463                 }
 1464                 txd--;
 1465                 txd->cp = (u_short)(blkp->txdesc & 0xfffful);
 1466 
 1467                 blkp->txtail = (u_int)txd - (u_int)sc->hc->mem_start;
 1468                 TRC(kprintf("TX Descriptors start %x, end %x.\n",
 1469                         blkp->txdesc,
 1470                         blkp->txtail));
 1471         }
 1472 
 1473         if(sc->hc->bustype == AR_BUS_ISA)
 1474                 ARC_SET_SCA(sc->hc, sc->scano);
 1475 
 1476         dmac->dsr = 0; /* Disable DMA */
 1477         dmac->dcr = SCA_DCR_ABRT;
 1478         dmac->dmr = SCA_DMR_TMOD | SCA_DMR_NF;
 1479         dmac->dir = SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF;
 1480 
 1481         dmac->sarb = (u_char)((sc->block[0].txdesc >> 16) & 0xff);
 1482 }
 1483 
 1484 
 1485 /*
 1486  * Look through the descriptors to see if there is a complete packet
 1487  * available. Stop if we get to where the sca is busy.
 1488  *
 1489  * Return the length and status of the packet.
 1490  * Return nonzero if there is a packet available.
 1491  *
 1492  * NOTE:
 1493  * It seems that we get the interrupt a bit early. The updateing of
 1494  * descriptor values is not always completed when this is called.
 1495  */
 1496 static int
 1497 ar_packet_avail(struct ar_softc *sc,
 1498                     int *len,
 1499                     u_char *rxstat)
 1500 {
 1501         dmac_channel *dmac;
 1502         sca_descriptor *rxdesc;
 1503         sca_descriptor *endp;
 1504         sca_descriptor *cda;
 1505 
 1506         if(sc->hc->bustype == AR_BUS_ISA)
 1507                 ARC_SET_SCA(sc->hc, sc->scano);
 1508         dmac = &sc->sca->dmac[DMAC_RXCH(sc->scachan)];
 1509         cda = (sca_descriptor *)(sc->hc->mem_start +
 1510               ((((u_int)dmac->sarb << 16) + dmac->cda) & sc->hc->winmsk));
 1511 
 1512         if(sc->hc->bustype == AR_BUS_ISA)
 1513                 ARC_SET_MEM(sc->hc, sc->rxdesc);
 1514         rxdesc = (sca_descriptor *)
 1515                         (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1516         endp = rxdesc;
 1517         rxdesc = &rxdesc[sc->rxhind];
 1518         endp = &endp[sc->rxmax];
 1519 
 1520         *len = 0;
 1521 
 1522         while(rxdesc != cda) {
 1523                 *len += rxdesc->len;
 1524 
 1525                 if(rxdesc->stat & SCA_DESC_EOM) {
 1526                         *rxstat = rxdesc->stat;
 1527                         TRC(kprintf("ar%d: PKT AVAIL len %d, %x.\n",
 1528                                 sc->unit, *len, *rxstat));
 1529                         return (1);
 1530                 }
 1531 
 1532                 rxdesc++;
 1533                 if(rxdesc == endp)
 1534                         rxdesc = (sca_descriptor *)
 1535                                (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1536         }
 1537 
 1538         *len = 0;
 1539         *rxstat = 0;
 1540         return (0);
 1541 }
 1542 
 1543 
 1544 /*
 1545  * Copy a packet from the on card memory into a provided mbuf.
 1546  * Take into account that buffers wrap and that a packet may
 1547  * be larger than a buffer.
 1548  */
 1549 static void 
 1550 ar_copy_rxbuf(struct mbuf *m,
 1551                    struct ar_softc *sc,
 1552                    int len)
 1553 {
 1554         sca_descriptor *rxdesc;
 1555         u_int rxdata;
 1556         u_int rxmax;
 1557         u_int off = 0;
 1558         u_int tlen;
 1559 
 1560         rxdata = sc->rxstart + (sc->rxhind * AR_BUF_SIZ);
 1561         rxmax = sc->rxstart + (sc->rxmax * AR_BUF_SIZ);
 1562 
 1563         rxdesc = (sca_descriptor *)
 1564                         (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1565         rxdesc = &rxdesc[sc->rxhind];
 1566 
 1567         while(len) {
 1568                 tlen = (len < AR_BUF_SIZ) ? len : AR_BUF_SIZ;
 1569                 if(sc->hc->bustype == AR_BUS_ISA)
 1570                         ARC_SET_MEM(sc->hc, rxdata);
 1571                 bcopy(sc->hc->mem_start + (rxdata & sc->hc->winmsk), 
 1572                         mtod(m, caddr_t) + off,
 1573                         tlen);
 1574 
 1575                 off += tlen;
 1576                 len -= tlen;
 1577 
 1578                 if(sc->hc->bustype == AR_BUS_ISA)
 1579                         ARC_SET_MEM(sc->hc, sc->rxdesc);
 1580                 rxdesc->len = 0;
 1581                 rxdesc->stat = 0xff;
 1582 
 1583                 rxdata += AR_BUF_SIZ;
 1584                 rxdesc++;
 1585                 if(rxdata == rxmax) {
 1586                         rxdata = sc->rxstart;
 1587                         rxdesc = (sca_descriptor *)
 1588                                 (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1589                 }
 1590         }
 1591 }
 1592 
 1593 /*
 1594  * If single is set, just eat a packet. Otherwise eat everything up to
 1595  * where cda points. Update pointers to point to the next packet.
 1596  */
 1597 static void
 1598 ar_eat_packet(struct ar_softc *sc, int single)
 1599 {
 1600         dmac_channel *dmac;
 1601         sca_descriptor *rxdesc;
 1602         sca_descriptor *endp;
 1603         sca_descriptor *cda;
 1604         int loopcnt = 0;
 1605         u_char stat;
 1606 
 1607         if(sc->hc->bustype == AR_BUS_ISA)
 1608                 ARC_SET_SCA(sc->hc, sc->scano);
 1609         dmac = &sc->sca->dmac[DMAC_RXCH(sc->scachan)];
 1610         cda = (sca_descriptor *)(sc->hc->mem_start +
 1611               ((((u_int)dmac->sarb << 16) + dmac->cda) & sc->hc->winmsk));
 1612 
 1613         /*
 1614          * Loop until desc->stat == (0xff || EOM)
 1615          * Clear the status and length in the descriptor.
 1616          * Increment the descriptor.
 1617          */
 1618         if(sc->hc->bustype == AR_BUS_ISA)
 1619                 ARC_SET_MEM(sc->hc, sc->rxdesc);
 1620         rxdesc = (sca_descriptor *)
 1621                 (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1622         endp = rxdesc;
 1623         rxdesc = &rxdesc[sc->rxhind];
 1624         endp = &endp[sc->rxmax];
 1625 
 1626         while(rxdesc != cda) {
 1627                 loopcnt++;
 1628                 if(loopcnt > sc->rxmax) {
 1629                         kprintf("ar%d: eat pkt %d loop, cda %p, "
 1630                                "rxdesc %p, stat %x.\n",
 1631                                sc->unit,
 1632                                loopcnt,
 1633                                (void *)cda,
 1634                                (void *)rxdesc,
 1635                                rxdesc->stat);
 1636                         break;
 1637                 }
 1638 
 1639                 stat = rxdesc->stat;
 1640 
 1641                 rxdesc->len = 0;
 1642                 rxdesc->stat = 0xff;
 1643 
 1644                 rxdesc++;
 1645                 sc->rxhind++;
 1646                 if(rxdesc == endp) {
 1647                         rxdesc = (sca_descriptor *)
 1648                                (sc->hc->mem_start + (sc->rxdesc & sc->hc->winmsk));
 1649                         sc->rxhind = 0;
 1650                 }
 1651 
 1652                 if(single && (stat == SCA_DESC_EOM))
 1653                         break;
 1654         }
 1655 
 1656         /*
 1657          * Update the eda to the previous descriptor.
 1658          */
 1659         if(sc->hc->bustype == AR_BUS_ISA)
 1660                 ARC_SET_SCA(sc->hc, sc->scano);
 1661 
 1662         rxdesc = (sca_descriptor *)sc->rxdesc;
 1663         rxdesc = &rxdesc[(sc->rxhind + sc->rxmax - 2 ) % sc->rxmax];
 1664 
 1665         sc->sca->dmac[DMAC_RXCH(sc->scachan)].eda = 
 1666                         (u_short)((u_int)rxdesc & 0xffff);
 1667 }
 1668 
 1669 
 1670 /*
 1671  * While there is packets available in the rx buffer, read them out
 1672  * into mbufs and ship them off.
 1673  */
 1674 static void
 1675 ar_get_packets(struct ar_softc *sc)
 1676 {
 1677         sca_descriptor *rxdesc;
 1678         struct mbuf *m = NULL;
 1679         int i;
 1680         int len;
 1681         u_char rxstat;
 1682 #ifdef NETGRAPH
 1683         int error;
 1684 #endif
 1685 
 1686         while(ar_packet_avail(sc, &len, &rxstat)) {
 1687                 TRC(kprintf("apa: len %d, rxstat %x\n", len, rxstat));
 1688                 if(((rxstat & SCA_DESC_ERRORS) == 0) && (len < MCLBYTES)) {
 1689                         m =  m_getl(len, MB_DONTWAIT, MT_DATA, M_PKTHDR, NULL);
 1690                         if(m == NULL) {
 1691                                 /* eat packet if get mbuf fail!! */
 1692                                 ar_eat_packet(sc, 1);
 1693                                 continue;
 1694                         }
 1695 #ifdef NETGRAPH
 1696                         m->m_pkthdr.rcvif = NULL;
 1697                         sc->inbytes += len;
 1698                         sc->inlast = 0;
 1699 #else
 1700                         m->m_pkthdr.rcvif = &sc->ifsppp.pp_if;
 1701 #endif
 1702                         m->m_pkthdr.len = m->m_len = len;
 1703                         ar_copy_rxbuf(m, sc, len);
 1704 #ifdef NETGRAPH
 1705                         NG_SEND_DATA_ONLY(error, sc->hook, m);
 1706                         sc->ipackets++;
 1707 #else
 1708                         BPF_MTAP(&sc->ifsppp.pp_if, m);
 1709                         sppp_input(&sc->ifsppp.pp_if, m);
 1710                         IFNET_STAT_INC(&sc->ifsppp.pp_if, ipackets, 1);
 1711 #endif
 1712                         /*
 1713                          * Update the eda to the previous descriptor.
 1714                          */
 1715                         i = (len + AR_BUF_SIZ - 1) / AR_BUF_SIZ;
 1716                         sc->rxhind = (sc->rxhind + i) % sc->rxmax;
 1717 
 1718                         if(sc->hc->bustype == AR_BUS_ISA)
 1719                                 ARC_SET_SCA(sc->hc, sc->scano);
 1720 
 1721                         rxdesc = (sca_descriptor *)sc->rxdesc;
 1722                         rxdesc =
 1723                              &rxdesc[(sc->rxhind + sc->rxmax - 2 ) % sc->rxmax];
 1724 
 1725                         sc->sca->dmac[DMAC_RXCH(sc->scachan)].eda = 
 1726                                 (u_short)((u_int)rxdesc & 0xffff);
 1727                 } else {
 1728                         int tries = 5;
 1729 
 1730                         while((rxstat == 0xff) && --tries)
 1731                                 ar_packet_avail(sc, &len, &rxstat);
 1732 
 1733                         /*
 1734                          * It look like we get an interrupt early
 1735                          * sometimes and then the status is not
 1736                          * filled in yet.
 1737                          */
 1738                         if(tries && (tries != 5))
 1739                                 continue;
 1740 
 1741                         ar_eat_packet(sc, 1);
 1742 
 1743 #ifndef NETGRAPH
 1744                         IFNET_STAT_INC(&sc->ifsppp.pp_if, ierrors, 1);
 1745 #else   /* NETGRAPH */
 1746                         sc->ierrors[0]++;
 1747 #endif  /* NETGRAPH */
 1748 
 1749                         if(sc->hc->bustype == AR_BUS_ISA)
 1750                                 ARC_SET_SCA(sc->hc, sc->scano);
 1751 
 1752                         TRCL(kprintf("ar%d: Receive error chan %d, "
 1753                                         "stat %x, msci st3 %x,"
 1754                                         "rxhind %d, cda %x, eda %x.\n",
 1755                                         sc->unit,
 1756                                         sc->scachan, 
 1757                                         rxstat,
 1758                                         sc->sca->msci[sc->scachan].st3,
 1759                                         sc->rxhind,
 1760                                         sc->sca->dmac[
 1761                                                 DMAC_RXCH(sc->scachan)].cda,
 1762                                         sc->sca->dmac[
 1763                                                 DMAC_RXCH(sc->scachan)].eda));
 1764                 }
 1765         }
 1766 }
 1767 
 1768 
 1769 /*
 1770  * All DMA interrupts come here.
 1771  *
 1772  * Each channel has two interrupts.
 1773  * Interrupt A for errors and Interrupt B for normal stuff like end
 1774  * of transmit or receive dmas.
 1775  */
 1776 static void
 1777 ar_dmac_intr(struct ar_hardc *hc, int scano, u_char isr1)
 1778 {
 1779         u_char dsr;
 1780         u_char dotxstart = isr1;
 1781         int mch;
 1782         struct ar_softc *sc;
 1783         sca_regs *sca;
 1784         dmac_channel *dmac;
 1785 
 1786         sca = hc->sca[scano];
 1787         mch = 0;
 1788         /*
 1789          * Shortcut if there is no interrupts for dma channel 0 or 1
 1790          */
 1791         if((isr1 & 0x0F) == 0) {
 1792                 mch = 1;
 1793                 isr1 >>= 4;
 1794         }
 1795 
 1796         do {
 1797                 sc = &hc->sc[mch + (NCHAN * scano)];
 1798 
 1799                 /*
 1800                  * Transmit channel
 1801                  */
 1802                 if(isr1 & 0x0C) {
 1803                         u_long opkt;
 1804 
 1805                         dmac = &sca->dmac[DMAC_TXCH(mch)];
 1806 
 1807                         if(hc->bustype == AR_BUS_ISA)
 1808                                 ARC_SET_SCA(hc, scano);
 1809 
 1810                         dsr = dmac->dsr;
 1811                         dmac->dsr = dsr;
 1812 
 1813                         /* Counter overflow */
 1814                         if(dsr & SCA_DSR_COF) {
 1815 #ifndef NETGRAPH
 1816                                 IFNET_STAT_GET(&sc->ifsppp.pp_if, opackets,
 1817                                     opkt);
 1818                                 IFNET_STAT_INC(&sc->ifsppp.pp_if, oerrors, 1);
 1819 #else   /* NETGRAPH */
 1820                                 opkt = sc->opackets;
 1821                                 sc->oerrors++;
 1822 #endif  /* NETGRAPH */
 1823                                 kprintf("ar%d: TX DMA Counter overflow, "
 1824                                         "txpacket no %lu.\n",
 1825                                         sc->unit, opkt);
 1826                         }
 1827 
 1828                         /* Buffer overflow */
 1829                         if(dsr & SCA_DSR_BOF) {
 1830 #ifndef NETGRAPH
 1831                                 IFNET_STAT_GET(&sc->ifsppp.pp_if, opackets,
 1832                                     opkt);
 1833                                 IFNET_STAT_INC(&sc->ifsppp.pp_if, oerrors, 1);
 1834 #else   /* NETGRAPH */
 1835                                 opkt = sc->opackets,
 1836                                 sc->oerrors++;
 1837 #endif  /* NETGRAPH */
 1838                                 kprintf("ar%d: TX DMA Buffer overflow, "
 1839                                         "txpacket no %lu, dsr %02x, "
 1840                                         "cda %04x, eda %04x.\n",
 1841                                         sc->unit,
 1842                                         opkt,
 1843                                         dsr,
 1844                                         dmac->cda,
 1845                                         dmac->eda);
 1846                         }
 1847 
 1848                         /* End of Transfer */
 1849                         if(dsr & SCA_DSR_EOT) {
 1850                                 /*
 1851                                  * This should be the most common case.
 1852                                  *
 1853                                  * Call arstart to start a new transmit if
 1854                                  * there is data to transmit.
 1855                                  */
 1856                                 sc->xmit_busy = 0;
 1857 #ifndef NETGRAPH
 1858                                 ifq_clr_oactive(&sc->ifsppp.pp_if.if_snd);
 1859                                 sc->ifsppp.pp_if.if_timer = 0;
 1860 #else   /* NETGRAPH */
 1861                         /* XXX  ifq_clr_oactive(&sc->ifsppp.pp_if.if_snd); */
 1862                                 sc->out_dog = 0; /* XXX */
 1863 #endif  /* NETGRAPH */
 1864 
 1865                                 if(sc->txb_inuse && --sc->txb_inuse)
 1866                                         ar_xmit(sc);
 1867                         }
 1868                 }
 1869 
 1870                 /*
 1871                  * Receive channel
 1872                  */
 1873                 if(isr1 & 0x03) {
 1874                         u_long ipkt;
 1875 
 1876                         dmac = &sca->dmac[DMAC_RXCH(mch)];
 1877 
 1878                         if(hc->bustype == AR_BUS_ISA)
 1879                                 ARC_SET_SCA(hc, scano);
 1880 
 1881                         dsr = dmac->dsr;
 1882                         dmac->dsr = dsr;
 1883 
 1884                         TRC(kprintf("AR: RX DSR %x\n", dsr));
 1885 
 1886                         /* End of frame */
 1887                         if(dsr & SCA_DSR_EOM) {
 1888                                 TRC(int tt = sc->ifsppp.pp_if.if_ipackets;)
 1889                                 TRC(int ind = sc->rxhind;)
 1890 
 1891                                 ar_get_packets(sc);
 1892 #ifndef NETGRAPH
 1893                                 IFNET_STAT_GET(&sc->ifsppp.pp_if, ipackets,
 1894                                     ipkt);
 1895 #else   /* NETGRAPH */
 1896                                 ipkt = sc->ipackets
 1897 #endif  /* NETGRAPH */
 1898                                 TRC(if(tt == ipkt) {
 1899                                         sca_descriptor *rxdesc;
 1900                                         int i;
 1901 
 1902                                         if(hc->bustype == AR_BUS_ISA)
 1903                                                 ARC_SET_SCA(hc, scano);
 1904                                         kprintf("AR: RXINTR isr1 %x, dsr %x, "
 1905                                                "no data %d pkts, orxhind %d.\n",
 1906                                                dotxstart,
 1907                                                dsr,
 1908                                                tt,
 1909                                                ind);
 1910                                         kprintf("AR: rxdesc %x, rxstart %x, "
 1911                                                "rxend %x, rxhind %d, "
 1912                                                "rxmax %d.\n",
 1913                                                sc->rxdesc,
 1914                                                sc->rxstart,
 1915                                                sc->rxend,
 1916                                                sc->rxhind,
 1917                                                sc->rxmax);
 1918                                         kprintf("AR: cda %x, eda %x.\n",
 1919                                                dmac->cda,
 1920                                                dmac->eda);
 1921 
 1922                                         if(sc->hc->bustype == AR_BUS_ISA)
 1923                                                 ARC_SET_MEM(sc->hc,
 1924                                                     sc->rxdesc);
 1925                                         rxdesc = (sca_descriptor *)
 1926                                                  (sc->hc->mem_start +
 1927                                                   (sc->rxdesc & sc->hc->winmsk));
 1928                                         rxdesc = &rxdesc[sc->rxhind];
 1929                                         for(i=0;i<3;i++,rxdesc++)
 1930                                                 kprintf("AR: rxdesc->stat %x, "
 1931                                                         "len %d.\n",
 1932                                                         rxdesc->stat,
 1933                                                         rxdesc->len);
 1934                                 });
 1935                         }
 1936 
 1937                         /* Counter overflow */
 1938                         if(dsr & SCA_DSR_COF) {
 1939 #ifndef NETGRAPH
 1940                                 IFNET_STAT_GET(&sc->ifsppp.pp_if, ipackets,
 1941                                     ipkt);
 1942                                 IFNET_STAT_INC(&sc->ifsppp.pp_if, ierrors, 1);
 1943 #else   /* NETGRAPH */
 1944                                 ipkt = sc->ipackets;
 1945                                 sc->ierrors[1]++;
 1946 #endif  /* NETGRAPH */
 1947                                 kprintf("ar%d: RX DMA Counter overflow, "
 1948                                         "rxpkts %lu.\n",
 1949                                         sc->unit, ipkt);
 1950                         }
 1951 
 1952                         /* Buffer overflow */
 1953                         if(dsr & SCA_DSR_BOF) {
 1954 #ifndef NETGRAPH
 1955                                 IFNET_STAT_GET(&sc->ifsppp.pp_if, ipackets,
 1956                                     ipkt);
 1957 #else   /* NETGRAPH */
 1958                                 ipkt = sc->ipackets;
 1959 #endif  /* NETGRAPH */
 1960                                 if(hc->bustype == AR_BUS_ISA)
 1961                                         ARC_SET_SCA(hc, scano);
 1962                                 kprintf("ar%d: RX DMA Buffer overflow, "
 1963                                         "rxpkts %lu, rxind %d, "
 1964                                         "cda %x, eda %x, dsr %x.\n",
 1965                                         sc->unit,
 1966                                         ipkt,
 1967                                         sc->rxhind,
 1968                                         dmac->cda,
 1969                                         dmac->eda,
 1970                                         dsr);
 1971                                 /*
 1972                                  * Make sure we eat as many as possible.
 1973                                  * Then get the system running again.
 1974                                  */
 1975                                 ar_eat_packet(sc, 0);
 1976 #ifndef NETGRAPH
 1977                                 IFNET_STAT_INC(&sc->ifsppp.pp_if, ierrors, 1);
 1978 #else   /* NETGRAPH */
 1979                                 sc->ierrors[2]++;
 1980 #endif  /* NETGRAPH */
 1981                                 if(hc->bustype == AR_BUS_ISA)
 1982                                         ARC_SET_SCA(hc, scano);
 1983                                 sca->msci[mch].cmd = SCA_CMD_RXMSGREJ;
 1984                                 dmac->dsr = SCA_DSR_DE;
 1985 
 1986                                 TRC(kprintf("ar%d: RX DMA Buffer overflow, "
 1987                                         "rxpkts %lu, rxind %d, "
 1988                                         "cda %x, eda %x, dsr %x. After\n",
 1989                                         sc->unit,
 1990                                         sc->ifsppp.pp_if.if_ipackets,
 1991                                         sc->rxhind,
 1992                                         dmac->cda,
 1993                                         dmac->eda,
 1994                                         dmac->dsr);)
 1995                         }
 1996 
 1997                         /* End of Transfer */
 1998                         if(dsr & SCA_DSR_EOT) {
 1999 #ifndef NETGRAPH
 2000                                 IFNET_STAT_GET(&sc->ifsppp.pp_if, ipackets,
 2001                                     ipkt);
 2002                                 IFNET_STAT_INC(&sc->ifsppp.pp_if, ierrors, 1);
 2003 #else   /* NETGRAPH */
 2004                                 ipkt = sc->ipackets;
 2005                                 sc->ierrors[3]++;
 2006 #endif  /* NETGRAPH */
 2007                                 /*
 2008                                  * If this happen, it means that we are
 2009                                  * receiving faster than what the processor
 2010                                  * can handle.
 2011                                  *
 2012                                  * XXX We should enable the dma again.
 2013                                  */
 2014                                 kprintf("ar%d: RX End of transfer, rxpkts %lu.\n",
 2015                                         sc->unit, ipkt);
 2016                         }
 2017                 }
 2018 
 2019                 isr1 >>= 4;
 2020 
 2021                 mch++;
 2022         }while((mch<NCHAN) && isr1);
 2023 
 2024         /*
 2025          * Now that we have done all the urgent things, see if we
 2026          * can fill the transmit buffers.
 2027          */
 2028         for(mch = 0; mch < NCHAN; mch++) {
 2029                 if(dotxstart & 0x0C) {
 2030                         sc = &hc->sc[mch + (NCHAN * scano)];
 2031 #ifndef NETGRAPH
 2032                         arstart(&sc->ifsppp.pp_if,
 2033                             ifq_get_subq_default(&sc->ifsppp.pp_if.if_snd));
 2034 #else   /* NETGRAPH */
 2035                         arstart(sc);
 2036 #endif  /* NETGRAPH */
 2037                 }
 2038                 dotxstart >>= 4;
 2039         }
 2040 }
 2041 
 2042 static void
 2043 ar_msci_intr(struct ar_hardc *hc, int scano, u_char isr0)
 2044 {
 2045         kprintf("arc%d: ARINTR: MSCI\n", hc->cunit);
 2046 }
 2047 
 2048 static void
 2049 ar_timer_intr(struct ar_hardc *hc, int scano, u_char isr2)
 2050 {
 2051         kprintf("arc%d: ARINTR: TIMER\n", hc->cunit);
 2052 }
 2053 
 2054 
 2055 #ifdef  NETGRAPH
 2056 /*****************************************
 2057  * Device timeout/watchdog routine.
 2058  * called once per second.
 2059  * checks to see that if activity was expected, that it hapenned.
 2060  * At present we only look to see if expected output was completed.
 2061  */
 2062 static void
 2063 ngar_watchdog_frame(void * arg)
 2064 {
 2065         struct ar_softc * sc = arg;
 2066         int     speed;
 2067 
 2068         if (sc->running == 0) {
 2069                 return; /* if we are not running let timeouts die */
 2070         }
 2071 
 2072         lwkt_serialize_enter(&ar_serializer);
 2073 
 2074         /*
 2075          * calculate the apparent throughputs 
 2076          *  XXX a real hack
 2077          */
 2078         speed = sc->inbytes - sc->lastinbytes;
 2079         sc->lastinbytes = sc->inbytes;
 2080         if ( sc->inrate < speed )
 2081                 sc->inrate = speed;
 2082         speed = sc->outbytes - sc->lastoutbytes;
 2083         sc->lastoutbytes = sc->outbytes;
 2084         if ( sc->outrate < speed )
 2085                 sc->outrate = speed;
 2086         sc->inlast++;
 2087 
 2088         if ((sc->inlast > QUITE_A_WHILE)
 2089         && (sc->out_deficit > LOTS_OF_PACKETS)) {
 2090                 log(LOG_ERR, "ar%d: No response from remote end\n", sc->unit);
 2091 
 2092                 ar_down(sc);
 2093                 ar_up(sc);
 2094                 sc->inlast = sc->out_deficit = 0;
 2095         } else if ( sc->xmit_busy ) { /* no TX -> no TX timeouts */
 2096                 if (sc->out_dog == 0) { 
 2097                         log(LOG_ERR, "ar%d: Transmit failure.. no clock?\n",
 2098                                         sc->unit);
 2099 
 2100                         arwatchdog(sc);
 2101 #if 0
 2102                         ar_down(sc);
 2103                         ar_up(sc);
 2104 #endif
 2105                         sc->inlast = sc->out_deficit = 0;
 2106                 } else {
 2107                         sc->out_dog--;
 2108                 }
 2109         }
 2110         lwkt_serialize_exit(&ar_serializer);
 2111         callout_reset(&sc->timer, hz, ngar_watchdog_frame, sc);
 2112 }
 2113 
 2114 /***********************************************************************
 2115  * This section contains the methods for the Netgraph interface
 2116  ***********************************************************************/
 2117 /*
 2118  * It is not possible or allowable to create a node of this type.
 2119  * If the hardware exists, it will already have created it.
 2120  */
 2121 static  int
 2122 ngar_constructor(node_p *nodep)
 2123 {
 2124         return (EINVAL);
 2125 }
 2126 
 2127 /*
 2128  * give our ok for a hook to be added...
 2129  * If we are not running this should kick the device into life.
 2130  * The hook's private info points to our stash of info about that
 2131  * channel.
 2132  */
 2133 static int
 2134 ngar_newhook(node_p node, hook_p hook, const char *name)
 2135 {
 2136         struct ar_softc *       sc = NG_NODE_PRIVATE(node);
 2137 
 2138         /*
 2139          * check if it's our friend the debug hook
 2140          */
 2141         if (strcmp(name, NG_AR_HOOK_DEBUG) == 0) {
 2142                 NG_HOOK_SET_PRIVATE(hook, NULL); /* paranoid */
 2143                 sc->debug_hook = hook;
 2144                 return (0);
 2145         }
 2146 
 2147         /*
 2148          * Check for raw mode hook.
 2149          */
 2150         if (strcmp(name, NG_AR_HOOK_RAW) != 0) {
 2151                 return (EINVAL);
 2152         }
 2153         NG_HOOK_SET_PRIVATE(hook, sc);
 2154         sc->hook = hook;
 2155         sc->datahooks++;
 2156         ar_up(sc);
 2157         return (0);
 2158 }
 2159 
 2160 /*
 2161  * incoming messages.
 2162  * Just respond to the generic TEXT_STATUS message
 2163  */
 2164 static  int
 2165 ngar_rcvmsg(node_p node, struct ng_mesg *msg, const char *retaddr,
 2166             struct ng_mesg **rptr)
 2167 {
 2168         struct ar_softc *sc;
 2169         int error = 0;
 2170         struct ng_mesg *resp = NULL;
 2171 
 2172         sc = NG_NODE_PRIVATE(node);
 2173         switch (msg->header.typecookie) {
 2174         case    NG_AR_COOKIE: 
 2175                 error = EINVAL;
 2176                 break;
 2177         case    NGM_GENERIC_COOKIE: 
 2178                 switch(msg->header.cmd) {
 2179                 case NGM_TEXT_STATUS: {
 2180                         char        *arg;
 2181                         int pos = 0;
 2182 
 2183                         int resplen = sizeof(struct ng_mesg) + 512;
 2184                         NG_MKRESPONSE(resp, msg, resplen, M_INTWAIT);
 2185                         if (resp == NULL) {
 2186                                 error = ENOMEM;
 2187                                 break;
 2188                         }
 2189                         arg = (resp)->data;
 2190                         pos = ksprintf(arg, "%ld bytes in, %ld bytes out\n"
 2191                             "highest rate seen: %ld B/S in, %ld B/S out\n",
 2192                         sc->inbytes, sc->outbytes,
 2193                         sc->inrate, sc->outrate);
 2194                         pos += ksprintf(arg + pos,
 2195                                 "%ld output errors\n",
 2196                                 sc->oerrors);
 2197                         pos += ksprintf(arg + pos,
 2198                                 "ierrors = %ld, %ld, %ld, %ld\n",
 2199                                 sc->ierrors[0],
 2200                                 sc->ierrors[1],
 2201                                 sc->ierrors[2],
 2202                                 sc->ierrors[3]);
 2203 
 2204                         (resp)->header.arglen = pos + 1;
 2205                         break;
 2206                       }
 2207                 default:
 2208                         error = EINVAL;
 2209                         break;
 2210                     }
 2211                 break;
 2212         default:
 2213                 error = EINVAL;
 2214                 break;
 2215         }
 2216         /* Take care of synchronous response, if any */
 2217         NG_RESPOND_MSG(error, node, retaddr, resp, rptr);
 2218         NG_FREE_MSG(msg);
 2219         return (error);
 2220 }
 2221 
 2222 /*
 2223  * get data from another node and transmit it to the correct channel
 2224  */
 2225 static int
 2226 ngar_rcvdata(hook_p hook, struct mbuf *m, meta_p meta)
 2227 {
 2228         int error = 0;
 2229         struct ar_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook));
 2230         struct ifqueue  *xmitq_p;
 2231         
 2232         /*
 2233          * data doesn't come in from just anywhere (e.g control hook)
 2234          */
 2235         if ( NG_HOOK_PRIVATE(hook) == NULL) {
 2236                 error = ENETDOWN;
 2237                 goto bad;
 2238         }
 2239 
 2240         /* 
 2241          * Now queue the data for when it can be sent
 2242          */
 2243         if (meta && meta->priority > 0)
 2244                 xmitq_p = (&sc->xmitq_hipri);
 2245         else
 2246                 xmitq_p = (&sc->xmitq);
 2247 
 2248         if (IF_QFULL(xmitq_p)) {
 2249                 IF_DROP(xmitq_p);
 2250 
 2251                 error = ENOBUFS;
 2252                 goto bad;
 2253         }
 2254         IF_ENQUEUE(xmitq_p, m);
 2255         arstart(sc);
 2256 
 2257         return (0);
 2258 
 2259 bad:
 2260         /* 
 2261          * It was an error case.
 2262          * check if we need to free the mbuf, and then return the error
 2263          */
 2264         NG_FREE_DATA(m, meta);
 2265         return (error);
 2266 }
 2267 
 2268 /*
 2269  * do local shutdown processing..
 2270  * this node will refuse to go away, unless the hardware says to..
 2271  * don't unref the node, or remove our name. just clear our links up.
 2272  */
 2273 static  int
 2274 ngar_shutdown(node_p node)
 2275 {
 2276         struct ar_softc * sc = NG_NODE_PRIVATE(node);
 2277 
 2278         ar_down(sc);
 2279         NG_NODE_UNREF(node);
 2280         /* XXX need to drain the output queues! */
 2281 
 2282         /* The node is dead, long live the node! */
 2283         /* stolen from the attach routine */
 2284         if (ng_make_node_common(&typestruct, &sc->node) != 0)
 2285                 return (0);
 2286         ksprintf(sc->nodename, "%s%d", NG_AR_NODE_TYPE, sc->unit);
 2287         if (ng_name_node(sc->node, sc->nodename)) {
 2288                 sc->node = NULL;
 2289                 kprintf("node naming failed\n");
 2290                 NG_NODE_UNREF(sc->node); /* node dissappears */
 2291                 return (0);
 2292         }
 2293         NG_NODE_SET_PRIVATE(sc->node, sc);
 2294         sc->running = 0;
 2295         return (0);
 2296 }
 2297 
 2298 /* already linked */
 2299 static  int
 2300 ngar_connect(hook_p hook)
 2301 {
 2302         /* be really amiable and just say "YUP that's OK by me! " */
 2303         return (0);
 2304 }
 2305 
 2306 /*
 2307  * notify on hook disconnection (destruction)
 2308  *
 2309  * Invalidate the private data associated with this dlci.
 2310  * For this type, removal of the last link resets tries to destroy the node.
 2311  * As the device still exists, the shutdown method will not actually
 2312  * destroy the node, but reset the device and leave it 'fresh' :)
 2313  *
 2314  * The node removal code will remove all references except that owned by the
 2315  * driver. 
 2316  */
 2317 static  int
 2318 ngar_disconnect(hook_p hook)
 2319 {
 2320         struct ar_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook));
 2321 
 2322         /*
 2323          * If it's the data hook, then free resources etc.
 2324          */
 2325         if (NG_HOOK_PRIVATE(hook)) {
 2326                 sc->datahooks--;
 2327                 if (sc->datahooks == 0)
 2328                         ar_down(sc);
 2329         } else {
 2330                 sc->debug_hook = NULL;
 2331         }
 2332         return (0);
 2333 }
 2334 
 2335 /*
 2336  * called during bootup
 2337  * or LKM loading to put this type into the list of known modules
 2338  */
 2339 static void
 2340 ngar_init(void *ignored)
 2341 {
 2342         if (ng_newtype(&typestruct))
 2343                 kprintf("ngar install failed\n");
 2344         ngar_done_init = 1;
 2345 }
 2346 #endif /* NETGRAPH */
 2347 
 2348 /*
 2349  ********************************* END ************************************
 2350  */

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