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sys/dev/netif/bwi/if_bwivar.h
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1 /* 2 * Copyright (c) 2007 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Sepherosa Ziehau <sepherosa@gmail.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * $DragonFly: src/sys/dev/netif/bwi/if_bwivar.h,v 1.14 2008/02/15 11:15:38 sephe Exp $ 35 */ 36 37 #ifndef _IF_BWIVAR_H 38 #define _IF_BWIVAR_H 39 40 #define BWI_ALIGN 0x1000 41 #define BWI_RING_ALIGN BWI_ALIGN 42 #define BWI_BUS_SPACE_MAXADDR 0x3fffffff 43 44 #define BWI_TX_NRING 6 45 #define BWI_TXRX_NRING 6 46 #define BWI_TX_NDESC 128 47 #define BWI_RX_NDESC 64 48 #define BWI_TXSTATS_NDESC 64 49 #define BWI_TX_NSPRDESC 2 50 #define BWI_TX_DATA_RING 1 51 52 /* XXX Onoe/Sample/AMRR probably need different configuration */ 53 #define BWI_SHRETRY 7 54 #define BWI_LGRETRY 4 55 #define BWI_SHRETRY_FB 3 56 #define BWI_LGRETRY_FB 2 57 58 #define BWI_LED_EVENT_NONE -1 59 #define BWI_LED_EVENT_POLL 0 60 #define BWI_LED_EVENT_TX 1 61 #define BWI_LED_EVENT_RX 2 62 #define BWI_LED_SLOWDOWN(dur) (dur) = (((dur) * 3) / 2) 63 64 enum bwi_txpwrcb_type { 65 BWI_TXPWR_INIT = 0, 66 BWI_TXPWR_FORCE = 1, 67 BWI_TXPWR_CALIB = 2 68 }; 69 70 #define BWI_NOISE_FLOOR -95 /* TODO: noise floor calc */ 71 #define BWI_FRAME_MIN_LEN(hdr) \ 72 ((hdr) + sizeof(struct ieee80211_frame_ack) + IEEE80211_CRC_LEN) 73 74 #define CSR_READ_4(sc, reg) \ 75 bus_space_read_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg)) 76 #define CSR_READ_2(sc, reg) \ 77 bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg)) 78 79 #define CSR_WRITE_4(sc, reg, val) \ 80 bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val)) 81 #define CSR_WRITE_2(sc, reg, val) \ 82 bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val)) 83 84 #define CSR_SETBITS_4(sc, reg, bits) \ 85 CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (bits)) 86 #define CSR_SETBITS_2(sc, reg, bits) \ 87 CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (bits)) 88 89 #define CSR_FILT_SETBITS_4(sc, reg, filt, bits) \ 90 CSR_WRITE_4((sc), (reg), (CSR_READ_4((sc), (reg)) & (filt)) | (bits)) 91 #define CSR_FILT_SETBITS_2(sc, reg, filt, bits) \ 92 CSR_WRITE_2((sc), (reg), (CSR_READ_2((sc), (reg)) & (filt)) | (bits)) 93 94 #define CSR_CLRBITS_4(sc, reg, bits) \ 95 CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) & ~(bits)) 96 #define CSR_CLRBITS_2(sc, reg, bits) \ 97 CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & ~(bits)) 98 99 #define BWI_DEBUG 100 #ifdef BWI_DEBUG 101 102 #define DPRINTF(sc, dbg, fmt, ...) \ 103 do { \ 104 if ((sc)->sc_debug & (dbg)) \ 105 if_printf(&(sc)->sc_ic.ic_if, fmt, __VA_ARGS__); \ 106 } while (0) 107 108 #define _DPRINTF(sc, dbg, fmt, ...) \ 109 do { \ 110 if ((sc)->sc_debug & (dbg)) \ 111 kprintf(fmt, __VA_ARGS__); \ 112 } while (0) 113 114 #else /* !BWI_DEBUG */ 115 116 #define DPRINTF(sc, dbg, fmt, ...) ((void)0) 117 #define _DPRINTF(sc, dbg, fmt, ...) ((void)0) 118 119 #endif /* BWI_DEBUG */ 120 121 struct bwi_desc32 { 122 /* Little endian */ 123 uint32_t ctrl; 124 uint32_t addr; /* BWI_DESC32_A_ */ 125 } __packed; 126 127 #define BWI_DESC32_A_FUNC_TXRX 0x1 128 #define BWI_DESC32_A_FUNC_MASK __BITS(31, 30) 129 #define BWI_DESC32_A_ADDR_MASK __BITS(29, 0) 130 131 #define BWI_DESC32_C_BUFLEN_MASK __BITS(12, 0) 132 #define BWI_DESC32_C_ADDRHI_MASK __BITS(17, 16) 133 #define BWI_DESC32_C_EOR __BIT(28) 134 #define BWI_DESC32_C_INTR __BIT(29) 135 #define BWI_DESC32_C_FRAME_END __BIT(30) 136 #define BWI_DESC32_C_FRAME_START __BIT(31) 137 138 struct bwi_desc64 { 139 /* Little endian */ 140 uint32_t ctrl0; 141 uint32_t ctrl1; 142 uint32_t addr_lo; 143 uint32_t addr_hi; 144 } __packed; 145 146 struct bwi_rxbuf_hdr { 147 /* Little endian */ 148 uint16_t rxh_buflen; /* exclude bwi_rxbuf_hdr */ 149 uint8_t rxh_pad1[2]; 150 uint16_t rxh_flags1; /* BWI_RXH_F1_ */ 151 uint8_t rxh_rssi; 152 uint8_t rxh_sq; 153 uint16_t rxh_phyinfo; /* BWI_RXH_PHYINFO_ */ 154 uint16_t rxh_flags3; /* BWI_RXH_F3_ */ 155 uint16_t rxh_flags2; /* BWI_RXH_F2_ */ 156 uint16_t rxh_tsf; 157 uint8_t rxh_pad3[14]; /* Padded to 30bytes */ 158 } __packed; 159 160 #define BWI_RXH_F1_BCM2053_RSSI __BIT(14) 161 #define BWI_RXH_F1_SHPREAMBLE __BIT(7) 162 #define BWI_RXH_F1_OFDM __BIT(0) 163 164 #define BWI_RXH_F2_TYPE2FRAME __BIT(2) 165 166 #define BWI_RXH_F3_BCM2050_RSSI __BIT(10) 167 168 #define BWI_RXH_PHYINFO_LNAGAIN __BITS(15, 14) 169 170 struct bwi_txbuf_hdr { 171 /* Little endian */ 172 uint32_t txh_mac_ctrl; /* BWI_TXH_MAC_C_ */ 173 uint8_t txh_fc[2]; 174 uint16_t txh_unknown1; 175 uint16_t txh_phy_ctrl; /* BWI_TXH_PHY_C_ */ 176 uint8_t txh_ivs[16]; 177 uint8_t txh_addr1[IEEE80211_ADDR_LEN]; 178 uint16_t txh_unknown2; 179 uint8_t txh_rts_fb_plcp[4]; 180 uint16_t txh_rts_fb_duration; 181 uint8_t txh_fb_plcp[4]; 182 uint16_t txh_fb_duration; 183 uint8_t txh_pad2[2]; 184 uint16_t txh_id; /* BWI_TXH_ID_ */ 185 uint16_t txh_unknown3; 186 uint8_t txh_rts_plcp[6]; 187 uint8_t txh_rts_fc[2]; 188 uint16_t txh_rts_duration; 189 uint8_t txh_rts_ra[IEEE80211_ADDR_LEN]; 190 uint8_t txh_rts_ta[IEEE80211_ADDR_LEN]; 191 uint8_t txh_pad3[2]; 192 uint8_t txh_plcp[6]; 193 } __packed; 194 195 #define BWI_TXH_ID_RING_MASK __BITS(15, 13) 196 #define BWI_TXH_ID_IDX_MASK __BITS(12, 0) 197 198 #define BWI_TXH_PHY_C_OFDM __BIT(0) 199 #define BWI_TXH_PHY_C_SHPREAMBLE __BIT(4) 200 #define BWI_TXH_PHY_C_ANTMODE_MASK __BITS(9, 8) 201 202 #define BWI_TXH_MAC_C_ACK __BIT(0) 203 #define BWI_TXH_MAC_C_FIRST_FRAG __BIT(3) 204 #define BWI_TXH_MAC_C_HWSEQ __BIT(4) 205 #define BWI_TXH_MAC_C_FB_OFDM __BIT(8) 206 207 struct bwi_txstats { 208 /* Little endian */ 209 uint8_t txs_pad1[4]; 210 uint16_t txs_id; 211 uint8_t txs_flags; /* BWI_TXS_F_ */ 212 uint8_t txs_txcnt; /* BWI_TXS_TXCNT_ */ 213 uint8_t txs_pad2[2]; 214 uint16_t txs_seq; 215 uint16_t txs_unknown; 216 uint8_t txs_pad3[2]; /* Padded to 16bytes */ 217 } __packed; 218 219 #define BWI_TXS_TXCNT_DATA __BITS(7, 4) 220 221 #define BWI_TXS_F_ACKED __BIT(0) 222 #define BWI_TXS_F_PENDING __BIT(5) 223 224 struct bwi_ring_data { 225 uint32_t rdata_txrx_ctrl; 226 bus_dmamap_t rdata_dmap; 227 bus_addr_t rdata_paddr; 228 void *rdata_desc; 229 }; 230 231 struct bwi_txbuf { 232 struct mbuf *tb_mbuf; 233 bus_dmamap_t tb_dmap; 234 235 struct ieee80211_node *tb_ni; 236 int tb_buflen; 237 #define BWI_NTXRATE 2 238 int tb_rateidx_cnt; 239 int tb_rateidx[BWI_NTXRATE]; 240 }; 241 242 struct bwi_txbuf_data { 243 struct bwi_txbuf tbd_buf[BWI_TX_NDESC]; 244 int tbd_used; 245 int tbd_idx; 246 }; 247 248 struct bwi_rxbuf { 249 struct mbuf *rb_mbuf; 250 bus_addr_t rb_paddr; 251 bus_dmamap_t rb_dmap; 252 }; 253 254 struct bwi_rxbuf_data { 255 struct bwi_rxbuf rbd_buf[BWI_RX_NDESC]; 256 bus_dmamap_t rbd_tmp_dmap; 257 int rbd_idx; 258 }; 259 260 struct bwi_txstats_data { 261 bus_dma_tag_t stats_ring_dtag; 262 bus_dmamap_t stats_ring_dmap; 263 bus_addr_t stats_ring_paddr; 264 void *stats_ring; 265 266 bus_dma_tag_t stats_dtag; 267 bus_dmamap_t stats_dmap; 268 bus_addr_t stats_paddr; 269 struct bwi_txstats *stats; 270 271 uint32_t stats_ctrl_base; 272 int stats_idx; 273 }; 274 275 struct bwi_fwhdr { 276 /* Big endian */ 277 uint8_t fw_type; /* BWI_FW_T_ */ 278 uint8_t fw_gen; /* BWI_FW_GEN */ 279 uint8_t fw_pad[2]; 280 uint32_t fw_size; 281 #define fw_iv_cnt fw_size 282 } __packed; 283 284 #define BWI_FWHDR_SZ sizeof(struct bwi_fwhdr) 285 286 #define BWI_FW_T_UCODE 'u' 287 #define BWI_FW_T_PCM 'p' 288 #define BWI_FW_T_IV 'i' 289 290 #define BWI_FW_GEN_1 1 291 292 #define BWI_FW_VERSION3 3 293 #define BWI_FW_VERSION4 4 294 #define BWI_FW_VERSION3_REVMAX 0x128 295 296 #define BWI_FW_PATH "bwi/v%d/" 297 #define BWI_FW_UCODE_PATH BWI_FW_PATH "ucode%d.fw" 298 #define BWI_FW_PCM_PATH BWI_FW_PATH "pcm%d.fw" 299 #define BWI_FW_IV_PATH BWI_FW_PATH "b0g0initvals%d.fw" 300 #define BWI_FW_IV_EXT_PATH BWI_FW_PATH "b0g0bsinitvals%d.fw" 301 302 struct bwi_fw_iv { 303 /* Big endian */ 304 uint16_t iv_ofs; 305 union { 306 uint32_t val32; 307 uint16_t val16; 308 } iv_val; 309 } __packed; 310 311 #define BWI_FW_IV_OFS_MASK __BITS(14, 0) 312 #define BWI_FW_IV_IS_32BIT __BIT(15) 313 314 struct bwi_led { 315 uint8_t l_flags; /* BWI_LED_F_ */ 316 uint8_t l_act; /* BWI_LED_ACT_ */ 317 uint8_t l_mask; 318 }; 319 320 #define BWI_LED_F_ACTLOW 0x1 321 #define BWI_LED_F_BLINK 0x2 322 #define BWI_LED_F_POLLABLE 0x4 323 #define BWI_LED_F_SLOW 0x8 324 325 enum bwi_clock_mode { 326 BWI_CLOCK_MODE_SLOW, 327 BWI_CLOCK_MODE_FAST, 328 BWI_CLOCK_MODE_DYN 329 }; 330 331 struct bwi_regwin { 332 uint32_t rw_flags; /* BWI_REGWIN_F_ */ 333 uint16_t rw_type; /* BWI_REGWIN_T_ */ 334 uint8_t rw_id; 335 uint8_t rw_rev; 336 }; 337 338 #define BWI_REGWIN_F_EXIST 0x1 339 340 #define BWI_CREATE_REGWIN(rw, id, type, rev) \ 341 do { \ 342 (rw)->rw_flags = BWI_REGWIN_F_EXIST; \ 343 (rw)->rw_type = (type); \ 344 (rw)->rw_id = (id); \ 345 (rw)->rw_rev = (rev); \ 346 } while (0) 347 348 #define BWI_REGWIN_EXIST(rw) ((rw)->rw_flags & BWI_REGWIN_F_EXIST) 349 #define BWI_GPIO_REGWIN(sc) \ 350 (BWI_REGWIN_EXIST(&(sc)->sc_com_regwin) ? \ 351 &(sc)->sc_com_regwin : &(sc)->sc_bus_regwin) 352 353 struct bwi_mac; 354 355 struct bwi_phy { 356 enum ieee80211_phymode phy_mode; 357 int phy_rev; 358 int phy_version; 359 360 uint32_t phy_flags; /* BWI_PHY_F_ */ 361 uint16_t phy_tbl_ctrl; 362 uint16_t phy_tbl_data_lo; 363 uint16_t phy_tbl_data_hi; 364 365 void (*phy_init)(struct bwi_mac *); 366 }; 367 368 #define BWI_PHY_F_CALIBRATED 0x1 369 #define BWI_PHY_F_LINKED 0x2 370 #define BWI_CLEAR_PHY_FLAGS (BWI_PHY_F_CALIBRATED) 371 372 /* TX power control */ 373 struct bwi_tpctl { 374 uint16_t bbp_atten; /* BBP attenuation: 4bits */ 375 uint16_t rf_atten; /* RF attenuation */ 376 uint16_t tp_ctrl1; /* ??: 3bits */ 377 uint16_t tp_ctrl2; /* ??: 4bits */ 378 }; 379 380 #define BWI_RF_ATTEN_FACTOR 4 381 #define BWI_RF_ATTEN_MAX0 9 382 #define BWI_RF_ATTEN_MAX1 31 383 #define BWI_BBP_ATTEN_MAX 11 384 #define BWI_TPCTL1_MAX 7 385 386 struct bwi_rf_lo { 387 int8_t ctrl_lo; 388 int8_t ctrl_hi; 389 }; 390 391 struct bwi_rf { 392 uint16_t rf_type; /* BWI_RF_T_ */ 393 uint16_t rf_manu; 394 int rf_rev; 395 396 uint32_t rf_flags; /* BWI_RF_F_ */ 397 398 #define BWI_RFLO_MAX 56 399 struct bwi_rf_lo rf_lo[BWI_RFLO_MAX]; 400 uint8_t rf_lo_used[8]; 401 402 #define BWI_INVALID_NRSSI -1000 403 int16_t rf_nrssi[2]; /* Narrow RSSI */ 404 int32_t rf_nrssi_slope; 405 406 #define BWI_NRSSI_TBLSZ 64 407 int8_t rf_nrssi_table[BWI_NRSSI_TBLSZ]; 408 409 uint16_t rf_lo_gain; /* loopback gain */ 410 uint16_t rf_rx_gain; /* TRSW RX gain */ 411 412 uint16_t rf_calib; /* RF calibration value */ 413 u_int rf_curchan; /* current channel */ 414 415 uint16_t rf_ctrl_rd; 416 int rf_ctrl_adj; 417 void (*rf_off)(struct bwi_mac *); 418 void (*rf_on)(struct bwi_mac *); 419 420 void (*rf_set_nrssi_thr)(struct bwi_mac *); 421 void (*rf_calc_nrssi_slope)(struct bwi_mac *); 422 int (*rf_calc_rssi) 423 (struct bwi_mac *, 424 const struct bwi_rxbuf_hdr *); 425 426 void (*rf_lo_update)(struct bwi_mac *); 427 428 #define BWI_TSSI_MAX 64 429 int8_t rf_txpower_map0[BWI_TSSI_MAX]; 430 /* Indexed by TSSI */ 431 int rf_idle_tssi0; 432 433 int8_t rf_txpower_map[BWI_TSSI_MAX]; 434 int rf_idle_tssi; 435 436 int rf_base_tssi; 437 438 int rf_txpower_max; /* dBm */ 439 440 int rf_ant_mode; /* BWI_ANT_MODE_ */ 441 }; 442 443 #define BWI_RF_F_INITED 0x1 444 #define BWI_RF_F_ON 0x2 445 #define BWI_RF_CLEAR_FLAGS (BWI_RF_F_INITED) 446 447 #define BWI_ANT_MODE_0 0 448 #define BWI_ANT_MODE_1 1 449 #define BWI_ANT_MODE_UNKN 2 450 #define BWI_ANT_MODE_AUTO 3 451 452 struct bwi_softc; 453 struct fw_image; 454 455 struct bwi_mac { 456 struct bwi_regwin mac_regwin; /* MUST be first field */ 457 #define mac_rw_flags mac_regwin.rw_flags 458 #define mac_type mac_regwin.rw_type 459 #define mac_id mac_regwin.rw_id 460 #define mac_rev mac_regwin.rw_rev 461 462 struct bwi_softc *mac_sc; 463 464 struct bwi_phy mac_phy; /* PHY I/F */ 465 struct bwi_rf mac_rf; /* RF I/F */ 466 467 struct bwi_tpctl mac_tpctl; /* TX power control */ 468 uint32_t mac_flags; /* BWI_MAC_F_ */ 469 470 struct fw_image *mac_ucode; 471 struct fw_image *mac_pcm; 472 struct fw_image *mac_iv; 473 struct fw_image *mac_iv_ext; 474 }; 475 476 #define BWI_MAC_F_BSWAP 0x1 477 #define BWI_MAC_F_TPCTL_INITED 0x2 478 #define BWI_MAC_F_HAS_TXSTATS 0x4 479 #define BWI_MAC_F_INITED 0x8 480 #define BWI_MAC_F_ENABLED 0x10 481 #define BWI_MAC_F_LOCKED 0x20 /* for debug */ 482 #define BWI_MAC_F_TPCTL_ERROR 0x40 483 #define BWI_MAC_F_PHYE_RESET 0x80 484 485 #define BWI_CREATE_MAC(mac, sc, id, rev) \ 486 do { \ 487 BWI_CREATE_REGWIN(&(mac)->mac_regwin, \ 488 (id), \ 489 BWI_REGWIN_T_MAC, \ 490 (rev)); \ 491 (mac)->mac_sc = (sc); \ 492 } while (0) 493 494 #define BWI_MAC_MAX 2 495 #define BWI_LED_MAX 4 496 497 enum bwi_bus_space { 498 BWI_BUS_SPACE_30BIT = 1, 499 BWI_BUS_SPACE_32BIT, 500 BWI_BUS_SPACE_64BIT 501 }; 502 503 #define BWI_TX_RADIOTAP_PRESENT \ 504 ((1 << IEEE80211_RADIOTAP_FLAGS) | \ 505 (1 << IEEE80211_RADIOTAP_RATE) | \ 506 (1 << IEEE80211_RADIOTAP_CHANNEL)) 507 508 struct bwi_tx_radiotap_hdr { 509 struct ieee80211_radiotap_header wt_ihdr; 510 uint8_t wt_flags; 511 uint8_t wt_rate; 512 uint16_t wt_chan_freq; 513 uint16_t wt_chan_flags; 514 }; 515 516 #define BWI_RX_RADIOTAP_PRESENT \ 517 ((1 << IEEE80211_RADIOTAP_TSFT) | \ 518 (1 << IEEE80211_RADIOTAP_FLAGS) | \ 519 (1 << IEEE80211_RADIOTAP_RATE) | \ 520 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 521 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \ 522 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE)) 523 524 struct bwi_rx_radiotap_hdr { 525 struct ieee80211_radiotap_header wr_ihdr; 526 uint64_t wr_tsf; 527 uint8_t wr_flags; 528 uint8_t wr_rate; 529 uint16_t wr_chan_freq; 530 uint16_t wr_chan_flags; 531 int8_t wr_antsignal; 532 int8_t wr_antnoise; 533 /* TODO: sq */ 534 }; 535 536 struct bwi_softc { 537 struct ieee80211com sc_ic; 538 uint32_t sc_flags; /* BWI_F_ */ 539 device_t sc_dev; 540 541 uint32_t sc_cap; /* BWI_CAP_ */ 542 uint16_t sc_bbp_id; /* BWI_BBPID_ */ 543 uint8_t sc_bbp_rev; 544 uint8_t sc_bbp_pkg; 545 546 uint8_t sc_pci_revid; 547 uint16_t sc_pci_subvid; 548 uint16_t sc_pci_subdid; 549 550 uint16_t sc_card_flags; /* BWI_CARD_F_ */ 551 uint16_t sc_pwron_delay; 552 int sc_locale; 553 554 int sc_irq_rid; 555 struct resource *sc_irq_res; 556 void *sc_irq_handle; 557 558 int sc_mem_rid; 559 struct resource *sc_mem_res; 560 bus_space_tag_t sc_mem_bt; 561 bus_space_handle_t sc_mem_bh; 562 563 struct callout sc_scan_ch; 564 struct callout sc_calib_ch; 565 566 struct bwi_regwin *sc_cur_regwin; 567 struct bwi_regwin sc_com_regwin; 568 struct bwi_regwin sc_bus_regwin; 569 570 int sc_nmac; 571 struct bwi_mac sc_mac[BWI_MAC_MAX]; 572 573 int sc_rx_rate; 574 int sc_tx_rate; 575 enum bwi_txpwrcb_type sc_txpwrcb_type; 576 577 int sc_led_blinking; 578 int sc_led_ticks; 579 struct bwi_led *sc_blink_led; 580 struct callout sc_led_blink_ch; 581 int sc_led_blink_offdur; 582 struct bwi_led sc_leds[BWI_LED_MAX]; 583 584 enum bwi_bus_space sc_bus_space; 585 bus_dma_tag_t sc_parent_dtag; 586 587 bus_dma_tag_t sc_buf_dtag; 588 struct bwi_txbuf_data sc_tx_bdata[BWI_TX_NRING]; 589 struct bwi_rxbuf_data sc_rx_bdata; 590 591 bus_dma_tag_t sc_txring_dtag; 592 struct bwi_ring_data sc_tx_rdata[BWI_TX_NRING]; 593 bus_dma_tag_t sc_rxring_dtag; 594 struct bwi_ring_data sc_rx_rdata; 595 596 struct bwi_txstats_data *sc_txstats; 597 598 int sc_tx_timer; 599 600 struct bpf_if *sc_drvbpf; 601 602 union { 603 struct bwi_tx_radiotap_hdr u_tx_th; 604 uint8_t u_pad[IEEE80211_RADIOTAP_HDRLEN]; 605 } sc_u_tx_th; 606 #define sc_tx_th sc_u_tx_th.u_tx_th 607 int sc_tx_th_len; 608 609 union { 610 struct bwi_rx_radiotap_hdr u_rx_th; 611 uint8_t u_pad[IEEE80211_RADIOTAP_HDRLEN]; 612 } sc_u_rx_th; 613 #define sc_rx_th sc_u_rx_th.u_rx_th 614 int sc_rx_th_len; 615 616 int (*sc_newstate) 617 (struct ieee80211com *, 618 enum ieee80211_state, int); 619 620 int (*sc_init_tx_ring)(struct bwi_softc *, int); 621 void (*sc_free_tx_ring)(struct bwi_softc *, int); 622 623 int (*sc_init_rx_ring)(struct bwi_softc *); 624 void (*sc_free_rx_ring)(struct bwi_softc *); 625 626 int (*sc_init_txstats)(struct bwi_softc *); 627 void (*sc_free_txstats)(struct bwi_softc *); 628 629 void (*sc_setup_rxdesc) 630 (struct bwi_softc *, int, bus_addr_t, int); 631 int (*sc_rxeof)(struct bwi_softc *); 632 633 void (*sc_setup_txdesc) 634 (struct bwi_softc *, struct bwi_ring_data *, 635 int, bus_addr_t, int); 636 void (*sc_start_tx) 637 (struct bwi_softc *, uint32_t, int); 638 639 void (*sc_txeof_status)(struct bwi_softc *); 640 641 struct sysctl_ctx_list sc_sysctl_ctx; 642 struct sysctl_oid *sc_sysctl_tree; 643 644 struct ieee80211_onoe_param sc_onoe_param; 645 646 /* 647 * Sysctl variables 648 */ 649 int sc_fw_version; /* BWI_FW_VERSION[34] */ 650 int sc_dwell_time; /* milliseconds */ 651 uint32_t sc_debug; /* BWI_DBG_ */ 652 int sc_led_idle; 653 int sc_led_blink; 654 int sc_txpwr_calib; 655 }; 656 657 #define BWI_F_BUS_INITED 0x1 658 #define BWI_F_PROMISC 0x2 659 660 #define BWI_DBG_MAC 0x00000001 661 #define BWI_DBG_RF 0x00000002 662 #define BWI_DBG_PHY 0x00000004 663 #define BWI_DBG_MISC 0x00000008 664 665 #define BWI_DBG_ATTACH 0x00000010 666 #define BWI_DBG_INIT 0x00000020 667 #define BWI_DBG_FIRMWARE 0x00000040 668 #define BWI_DBG_80211 0x00000080 669 #define BWI_DBG_TXPOWER 0x00000100 670 #define BWI_DBG_INTR 0x00000200 671 #define BWI_DBG_RX 0x00000400 672 #define BWI_DBG_TX 0x00000800 673 #define BWI_DBG_TXEOF 0x00001000 674 #define BWI_DBG_LED 0x00002000 675 676 uint16_t bwi_read_sprom(struct bwi_softc *, uint16_t); 677 int bwi_regwin_switch(struct bwi_softc *, struct bwi_regwin *, 678 struct bwi_regwin **); 679 int bwi_regwin_is_enabled(struct bwi_softc *, struct bwi_regwin *); 680 void bwi_regwin_enable(struct bwi_softc *, struct bwi_regwin *, 681 uint32_t); 682 void bwi_regwin_disable(struct bwi_softc *, struct bwi_regwin *, 683 uint32_t); 684 int bwi_bus_init(struct bwi_softc *, struct bwi_mac *); 685 uint8_t bwi_rate2plcp(uint8_t); /* XXX belongs to 802.11 */ 686 687 #define abs(a) __builtin_abs(a) 688 689 #endif /* !_IF_BWIVAR_H */
Cache object: 309531e5c5957e5be319f9292bf0ef35
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