FreeBSD/Linux Kernel Cross Reference
sys/dev/netif/ex/if_ex.c
1 /*
2 * Copyright (c) 1996, Javier Martín Rueda (jmrueda@diatel.upm.es)
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: src/sys/dev/ex/if_ex.c,v 1.26.2.3 2001/03/05 05:33:20 imp Exp $
28 *
29 * MAINTAINER: Matthew N. Dodd <winter@jurai.net>
30 * <mdodd@FreeBSD.org>
31 */
32
33 /*
34 * Intel EtherExpress Pro/10, Pro/10+ Ethernet driver
35 *
36 * Revision history:
37 *
38 * 30-Oct-1996: first beta version. Inet and BPF supported, but no multicast.
39 */
40
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/sockio.h>
45 #include <sys/mbuf.h>
46 #include <sys/socket.h>
47 #include <sys/module.h>
48 #include <sys/bus.h>
49 #include <sys/rman.h>
50 #include <sys/serialize.h>
51 #include <sys/thread2.h>
52
53 #include <net/if.h>
54 #include <net/ifq_var.h>
55 #include <net/if_arp.h>
56 #include <net/if_media.h>
57 #include <net/ethernet.h>
58 #include <net/bpf.h>
59
60 #include <netinet/in.h>
61 #include <netinet/if_ether.h>
62
63 #include <machine/clock.h>
64
65
66 #include <bus/isa/isavar.h>
67 #include <bus/isa/pnpvar.h>
68
69 #include "if_exreg.h"
70 #include "if_exvar.h"
71
72 DECLARE_DUMMY_MODULE(if_ex);
73
74 #ifdef EXDEBUG
75 # define Start_End 1
76 # define Rcvd_Pkts 2
77 # define Sent_Pkts 4
78 # define Status 8
79 static int debug_mask = 0;
80 static int exintr_count = 0;
81 # define DODEBUG(level, action) if (level & debug_mask) action
82 #else
83 # define DODEBUG(level, action)
84 #endif
85
86 char irq2eemap[] =
87 { -1, -1, 0, 1, -1, 2, -1, -1, -1, 0, 3, 4, -1, -1, -1, -1 };
88 u_char ee2irqmap[] =
89 { 9, 3, 5, 10, 11, 0, 0, 0 };
90
91 char plus_irq2eemap[] =
92 { -1, -1, -1, 0, 1, 2, -1, 3, -1, 4, 5, 6, 7, -1, -1, -1 };
93 u_char plus_ee2irqmap[] =
94 { 3, 4, 5, 7, 9, 10, 11, 12 };
95
96 /* Network Interface Functions */
97 static void ex_init (void *);
98 static void ex_start (struct ifnet *, struct ifaltq_subque *);
99 static int ex_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
100 static void ex_watchdog (struct ifnet *);
101
102 /* ifmedia Functions */
103 static int ex_ifmedia_upd (struct ifnet *);
104 static void ex_ifmedia_sts (struct ifnet *, struct ifmediareq *);
105
106 static int ex_get_media (u_int32_t iobase);
107
108 static void ex_reset (struct ex_softc *);
109
110 static void ex_tx_intr (struct ex_softc *);
111 static void ex_rx_intr (struct ex_softc *);
112
113 int
114 look_for_card (u_int32_t iobase)
115 {
116 int count1, count2;
117
118 /*
119 * Check for the i82595 signature, and check that the round robin
120 * counter actually advances.
121 */
122 if (((count1 = inb(iobase + ID_REG)) & Id_Mask) != Id_Sig)
123 return(0);
124 count2 = inb(iobase + ID_REG);
125 count2 = inb(iobase + ID_REG);
126 count2 = inb(iobase + ID_REG);
127
128 return((count2 & Counter_bits) == ((count1 + 0xc0) & Counter_bits));
129 }
130
131 void
132 ex_get_address (u_int32_t iobase, u_char *enaddr)
133 {
134 u_int16_t eaddr_tmp;
135
136 eaddr_tmp = eeprom_read(iobase, EE_Eth_Addr_Lo);
137 enaddr[5] = eaddr_tmp & 0xff;
138 enaddr[4] = eaddr_tmp >> 8;
139 eaddr_tmp = eeprom_read(iobase, EE_Eth_Addr_Mid);
140 enaddr[3] = eaddr_tmp & 0xff;
141 enaddr[2] = eaddr_tmp >> 8;
142 eaddr_tmp = eeprom_read(iobase, EE_Eth_Addr_Hi);
143 enaddr[1] = eaddr_tmp & 0xff;
144 enaddr[0] = eaddr_tmp >> 8;
145
146 return;
147 }
148
149 int
150 ex_card_type (u_char *enaddr)
151 {
152 if ((enaddr[0] == 0x00) && (enaddr[1] == 0xA0) && (enaddr[2] == 0xC9))
153 return (CARD_TYPE_EX_10_PLUS);
154
155 return (CARD_TYPE_EX_10);
156 }
157
158 /*
159 * Caller is responsible for eventually calling
160 * ex_release_resources() on failure.
161 */
162 int
163 ex_alloc_resources (device_t dev)
164 {
165 struct ex_softc * sc = device_get_softc(dev);
166 int error = 0;
167
168 sc->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &sc->ioport_rid,
169 RF_ACTIVE);
170 if (!sc->ioport) {
171 device_printf(dev, "No I/O space?!\n");
172 error = ENOMEM;
173 goto bad;
174 }
175
176 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
177 RF_ACTIVE);
178
179 if (!sc->irq) {
180 device_printf(dev, "No IRQ?!\n");
181 error = ENOMEM;
182 goto bad;
183 }
184
185 bad:
186 return (error);
187 }
188
189 void
190 ex_release_resources (device_t dev)
191 {
192 struct ex_softc * sc = device_get_softc(dev);
193
194 if (sc->ih) {
195 bus_teardown_intr(dev, sc->irq, sc->ih);
196 sc->ih = NULL;
197 }
198
199 if (sc->ioport) {
200 bus_release_resource(dev, SYS_RES_IOPORT,
201 sc->ioport_rid, sc->ioport);
202 sc->ioport = NULL;
203 }
204
205 if (sc->irq) {
206 bus_release_resource(dev, SYS_RES_IRQ,
207 sc->irq_rid, sc->irq);
208 sc->irq = NULL;
209 }
210
211 return;
212 }
213
214 int
215 ex_attach(device_t dev)
216 {
217 struct ex_softc * sc = device_get_softc(dev);
218 struct ifnet * ifp = &sc->arpcom.ac_if;
219 struct ifmedia * ifm;
220 int unit = device_get_unit(dev);
221 u_int16_t temp;
222
223 /* work out which set of irq <-> internal tables to use */
224 if (ex_card_type(sc->arpcom.ac_enaddr) == CARD_TYPE_EX_10_PLUS) {
225 sc->irq2ee = plus_irq2eemap;
226 sc->ee2irq = plus_ee2irqmap;
227 } else {
228 sc->irq2ee = irq2eemap;
229 sc->ee2irq = ee2irqmap;
230 }
231
232 sc->mem_size = CARD_RAM_SIZE; /* XXX This should be read from the card itself. */
233
234 /*
235 * Initialize the ifnet structure.
236 */
237 ifp->if_softc = sc;
238 if_initname(ifp, "ex", unit);
239 ifp->if_mtu = ETHERMTU;
240 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST /* XXX not done yet. | IFF_MULTICAST */;
241 ifp->if_start = ex_start;
242 ifp->if_ioctl = ex_ioctl;
243 ifp->if_watchdog = ex_watchdog;
244 ifp->if_init = ex_init;
245 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
246 ifq_set_ready(&ifp->if_snd);
247
248 ifmedia_init(&sc->ifmedia, 0, ex_ifmedia_upd, ex_ifmedia_sts);
249
250 temp = eeprom_read(sc->iobase, EE_W5);
251 if (temp & EE_W5_PORT_TPE)
252 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
253 if (temp & EE_W5_PORT_BNC)
254 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_2, 0, NULL);
255 if (temp & EE_W5_PORT_AUI)
256 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_5, 0, NULL);
257
258 ifmedia_set(&sc->ifmedia, ex_get_media(sc->iobase));
259
260 ifm = &sc->ifmedia;
261 ifm->ifm_media = ifm->ifm_cur->ifm_media;
262 ex_ifmedia_upd(ifp);
263
264 /*
265 * Attach the interface.
266 */
267 ether_ifattach(ifp, sc->arpcom.ac_enaddr, NULL);
268
269 return(0);
270 }
271
272 static void
273 ex_init(void *xsc)
274 {
275 struct ex_softc * sc = (struct ex_softc *) xsc;
276 struct ifnet * ifp = &sc->arpcom.ac_if;
277 int i;
278 int iobase = sc->iobase;
279 unsigned short temp_reg;
280
281 DODEBUG(Start_End, kprintf("ex_init%d: start\n", ifp->if_dunit););
282
283 ifp->if_timer = 0;
284
285 /*
286 * Load the ethernet address into the card.
287 */
288 outb(iobase + CMD_REG, Bank2_Sel);
289 temp_reg = inb(iobase + EEPROM_REG);
290 if (temp_reg & Trnoff_Enable) {
291 outb(iobase + EEPROM_REG, temp_reg & ~Trnoff_Enable);
292 }
293 for (i = 0; i < ETHER_ADDR_LEN; i++) {
294 outb(iobase + I_ADDR_REG0 + i, sc->arpcom.ac_enaddr[i]);
295 }
296 /*
297 * - Setup transmit chaining and discard bad received frames.
298 * - Match broadcast.
299 * - Clear test mode.
300 * - Set receiving mode.
301 * - Set IRQ number.
302 */
303 outb(iobase + REG1, inb(iobase + REG1) | Tx_Chn_Int_Md | Tx_Chn_ErStp | Disc_Bad_Fr);
304 outb(iobase + REG2, inb(iobase + REG2) | No_SA_Ins | RX_CRC_InMem);
305 outb(iobase + REG3, inb(iobase + REG3) & 0x3f /* XXX constants. */ );
306 outb(iobase + CMD_REG, Bank1_Sel);
307 outb(iobase + INT_NO_REG, (inb(iobase + INT_NO_REG) & 0xf8) | sc->irq2ee[sc->irq_no]);
308
309 /*
310 * Divide the available memory in the card into rcv and xmt buffers.
311 * By default, I use the first 3/4 of the memory for the rcv buffer,
312 * and the remaining 1/4 of the memory for the xmt buffer.
313 */
314 sc->rx_mem_size = sc->mem_size * 3 / 4;
315 sc->tx_mem_size = sc->mem_size - sc->rx_mem_size;
316 sc->rx_lower_limit = 0x0000;
317 sc->rx_upper_limit = sc->rx_mem_size - 2;
318 sc->tx_lower_limit = sc->rx_mem_size;
319 sc->tx_upper_limit = sc->mem_size - 2;
320 outb(iobase + RCV_LOWER_LIMIT_REG, sc->rx_lower_limit >> 8);
321 outb(iobase + RCV_UPPER_LIMIT_REG, sc->rx_upper_limit >> 8);
322 outb(iobase + XMT_LOWER_LIMIT_REG, sc->tx_lower_limit >> 8);
323 outb(iobase + XMT_UPPER_LIMIT_REG, sc->tx_upper_limit >> 8);
324
325 /*
326 * Enable receive and transmit interrupts, and clear any pending int.
327 */
328 outb(iobase + REG1, inb(iobase + REG1) | TriST_INT);
329 outb(iobase + CMD_REG, Bank0_Sel);
330 outb(iobase + MASK_REG, All_Int & ~(Rx_Int | Tx_Int));
331 outb(iobase + STATUS_REG, All_Int);
332
333 /*
334 * Initialize receive and transmit ring buffers.
335 */
336 outw(iobase + RCV_BAR, sc->rx_lower_limit);
337 sc->rx_head = sc->rx_lower_limit;
338 outw(iobase + RCV_STOP_REG, sc->rx_upper_limit | 0xfe);
339 outw(iobase + XMT_BAR, sc->tx_lower_limit);
340 sc->tx_head = sc->tx_tail = sc->tx_lower_limit;
341
342 ifp->if_flags |= IFF_RUNNING;
343 ifq_clr_oactive(&ifp->if_snd);
344 DODEBUG(Status, kprintf("OIDLE init\n"););
345
346 /*
347 * Final reset of the board, and enable operation.
348 */
349 outb(iobase + CMD_REG, Sel_Reset_CMD);
350 DELAY(2);
351 outb(iobase + CMD_REG, Rcv_Enable_CMD);
352
353 if (!ifq_is_empty(&ifp->if_snd))
354 if_devstart(ifp);
355
356 DODEBUG(Start_End, kprintf("ex_init%d: finish\n", ifp->if_dunit););
357 }
358
359
360 static void
361 ex_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
362 {
363 struct ex_softc * sc = ifp->if_softc;
364 int iobase = sc->iobase;
365 int i, len, data_len, avail, dest, next;
366 unsigned char tmp16[2];
367 struct mbuf * opkt;
368 struct mbuf * m;
369
370 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
371 DODEBUG(Start_End, kprintf("ex_start%d: start\n", unit););
372
373 /*
374 * Main loop: send outgoing packets to network card until there are no
375 * more packets left, or the card cannot accept any more yet.
376 */
377 while (!ifq_is_oactive(&ifp->if_snd)) {
378 opkt = ifq_dequeue(&ifp->if_snd);
379 if (opkt == NULL)
380 break;
381
382 /*
383 * Ensure there is enough free transmit buffer space for
384 * this packet, including its header. Note: the header
385 * cannot wrap around the end of the transmit buffer and
386 * must be kept together, so we allow space for twice the
387 * length of the header, just in case.
388 */
389
390 for (len = 0, m = opkt; m != NULL; m = m->m_next) {
391 len += m->m_len;
392 }
393
394 data_len = len;
395
396 DODEBUG(Sent_Pkts, kprintf("1. Sending packet with %d data bytes. ", data_len););
397
398 if (len & 1) {
399 len += XMT_HEADER_LEN + 1;
400 } else {
401 len += XMT_HEADER_LEN;
402 }
403
404 if ((i = sc->tx_tail - sc->tx_head) >= 0) {
405 avail = sc->tx_mem_size - i;
406 } else {
407 avail = -i;
408 }
409
410 DODEBUG(Sent_Pkts, kprintf("i=%d, avail=%d\n", i, avail););
411
412 if (avail >= len + XMT_HEADER_LEN) {
413 #ifdef EX_PSA_INTR
414 /*
415 * Disable rx and tx interrupts, to avoid corruption
416 * of the host address register by interrupt service
417 * routines.
418 * XXX Is this necessary with splimp() enabled?
419 */
420 outb(iobase + MASK_REG, All_Int);
421 #endif
422
423 /*
424 * Compute the start and end addresses of this
425 * frame in the tx buffer.
426 */
427 dest = sc->tx_tail;
428 next = dest + len;
429
430 if (next > sc->tx_upper_limit) {
431 if ((sc->tx_upper_limit + 2 - sc->tx_tail) <=
432 XMT_HEADER_LEN) {
433 dest = sc->tx_lower_limit;
434 next = dest + len;
435 } else {
436 next = sc->tx_lower_limit +
437 next - sc->tx_upper_limit - 2;
438 }
439 }
440
441 /*
442 * Build the packet frame in the card's ring buffer.
443 */
444 DODEBUG(Sent_Pkts, kprintf("2. dest=%d, next=%d. ", dest, next););
445
446 outw(iobase + HOST_ADDR_REG, dest);
447 outw(iobase + IO_PORT_REG, Transmit_CMD);
448 outw(iobase + IO_PORT_REG, 0);
449 outw(iobase + IO_PORT_REG, next);
450 outw(iobase + IO_PORT_REG, data_len);
451
452 /*
453 * Output the packet data to the card. Ensure all
454 * transfers are 16-bit wide, even if individual
455 * mbufs have odd length.
456 */
457
458 for (m = opkt, i = 0; m != NULL; m = m->m_next) {
459 DODEBUG(Sent_Pkts, kprintf("[%d]", m->m_len););
460 if (i) {
461 tmp16[1] = *(mtod(m, caddr_t));
462 outsw(iobase + IO_PORT_REG, tmp16, 1);
463 }
464 outsw(iobase + IO_PORT_REG,
465 mtod(m, caddr_t) + i, (m->m_len - i) / 2);
466
467 if ((i = (m->m_len - i) & 1) != 0) {
468 tmp16[0] = *(mtod(m, caddr_t) +
469 m->m_len - 1);
470 }
471 }
472 if (i) {
473 outsw(iobase + IO_PORT_REG, tmp16, 1);
474 }
475
476 /*
477 * If there were other frames chained, update the
478 * chain in the last one.
479 */
480 if (sc->tx_head != sc->tx_tail) {
481 if (sc->tx_tail != dest) {
482 outw(iobase + HOST_ADDR_REG,
483 sc->tx_last + XMT_Chain_Point);
484 outw(iobase + IO_PORT_REG, dest);
485 }
486 outw(iobase + HOST_ADDR_REG,
487 sc->tx_last + XMT_Byte_Count);
488 i = inw(iobase + IO_PORT_REG);
489 outw(iobase + HOST_ADDR_REG,
490 sc->tx_last + XMT_Byte_Count);
491 outw(iobase + IO_PORT_REG, i | Ch_bit);
492 }
493
494 /*
495 * Resume normal operation of the card:
496 * - Make a dummy read to flush the DRAM write
497 * pipeline.
498 * - Enable receive and transmit interrupts.
499 * - Send Transmit or Resume_XMT command, as
500 * appropriate.
501 */
502 inw(iobase + IO_PORT_REG);
503 #ifdef EX_PSA_INTR
504 outb(iobase + MASK_REG, All_Int & ~(Rx_Int | Tx_Int));
505 #endif
506 if (sc->tx_head == sc->tx_tail) {
507 outw(iobase + XMT_BAR, dest);
508 outb(iobase + CMD_REG, Transmit_CMD);
509 sc->tx_head = dest;
510 DODEBUG(Sent_Pkts, kprintf("Transmit\n"););
511 } else {
512 outb(iobase + CMD_REG, Resume_XMT_List_CMD);
513 DODEBUG(Sent_Pkts, kprintf("Resume\n"););
514 }
515
516 sc->tx_last = dest;
517 sc->tx_tail = next;
518
519 BPF_MTAP(ifp, opkt);
520
521 ifp->if_timer = 2;
522 IFNET_STAT_INC(ifp, opackets, 1);
523 m_freem(opkt);
524 } else {
525 ifq_set_oactive(&ifp->if_snd);
526 ifq_prepend(&ifp->if_snd, opkt);
527 DODEBUG(Status, kprintf("OACTIVE start\n"););
528 }
529 }
530 DODEBUG(Start_End, kprintf("ex_start%d: finish\n", unit););
531 }
532
533 void
534 ex_stop(struct ex_softc *sc)
535 {
536 int iobase = sc->iobase;
537
538 DODEBUG(Start_End, kprintf("ex_stop%d: start\n", unit););
539
540 /*
541 * Disable card operation:
542 * - Disable the interrupt line.
543 * - Flush transmission and disable reception.
544 * - Mask and clear all interrupts.
545 * - Reset the 82595.
546 */
547 outb(iobase + CMD_REG, Bank1_Sel);
548 outb(iobase + REG1, inb(iobase + REG1) & ~TriST_INT);
549 outb(iobase + CMD_REG, Bank0_Sel);
550 outb(iobase + CMD_REG, Rcv_Stop);
551 sc->tx_head = sc->tx_tail = sc->tx_lower_limit;
552 sc->tx_last = 0; /* XXX I think these two lines are not necessary, because ex_init will always be called again to reinit the interface. */
553 outb(iobase + MASK_REG, All_Int);
554 outb(iobase + STATUS_REG, All_Int);
555 outb(iobase + CMD_REG, Reset_CMD);
556 DELAY(200);
557
558 DODEBUG(Start_End, kprintf("ex_stop%d: finish\n", unit););
559
560 return;
561 }
562
563 void
564 ex_intr(void *arg)
565 {
566 struct ex_softc * sc = (struct ex_softc *)arg;
567 struct ifnet * ifp = &sc->arpcom.ac_if;
568 int iobase = sc->iobase;
569 int int_status, send_pkts;
570
571 DODEBUG(Start_End, kprintf("ex_intr%d: start\n", unit););
572
573 #ifdef EXDEBUG
574 if (++exintr_count != 1)
575 kprintf("WARNING: nested interrupt (%d). Mail the author.\n", exintr_count);
576 #endif
577
578 send_pkts = 0;
579 while ((int_status = inb(iobase + STATUS_REG)) & (Tx_Int | Rx_Int)) {
580 if (int_status & Rx_Int) {
581 outb(iobase + STATUS_REG, Rx_Int);
582
583 ex_rx_intr(sc);
584 } else if (int_status & Tx_Int) {
585 outb(iobase + STATUS_REG, Tx_Int);
586
587 ex_tx_intr(sc);
588 send_pkts = 1;
589 }
590 }
591
592 /*
593 * If any packet has been transmitted, and there are queued packets to
594 * be sent, attempt to send more packets to the network card.
595 */
596
597 if (send_pkts && !ifq_is_empty(&ifp->if_snd))
598 if_devstart(ifp);
599
600 #ifdef EXDEBUG
601 exintr_count--;
602 #endif
603
604 DODEBUG(Start_End, kprintf("ex_intr%d: finish\n", unit););
605
606 return;
607 }
608
609 static void
610 ex_tx_intr(struct ex_softc *sc)
611 {
612 struct ifnet * ifp = &sc->arpcom.ac_if;
613 int iobase = sc->iobase;
614 int tx_status;
615
616 DODEBUG(Start_End, kprintf("ex_tx_intr%d: start\n", unit););
617
618 /*
619 * - Cancel the watchdog.
620 * For all packets transmitted since last transmit interrupt:
621 * - Advance chain pointer to next queued packet.
622 * - Update statistics.
623 */
624
625 ifp->if_timer = 0;
626
627 while (sc->tx_head != sc->tx_tail) {
628 outw(iobase + HOST_ADDR_REG, sc->tx_head);
629
630 if (!(inw(iobase + IO_PORT_REG) & Done_bit))
631 break;
632
633 tx_status = inw(iobase + IO_PORT_REG);
634 sc->tx_head = inw(iobase + IO_PORT_REG);
635
636 if (tx_status & TX_OK_bit) {
637 IFNET_STAT_INC(ifp, opackets, 1);
638 } else {
639 IFNET_STAT_INC(ifp, oerrors, 1);
640 }
641
642 IFNET_STAT_INC(ifp, collisions, tx_status & No_Collisions_bits);
643 }
644
645 /*
646 * The card should be ready to accept more packets now.
647 */
648
649 ifq_clr_oactive(&ifp->if_snd);
650
651 DODEBUG(Status, kprintf("OIDLE tx_intr\n"););
652 DODEBUG(Start_End, kprintf("ex_tx_intr%d: finish\n", unit););
653
654 return;
655 }
656
657 static void
658 ex_rx_intr(struct ex_softc *sc)
659 {
660 struct ifnet * ifp = &sc->arpcom.ac_if;
661 int iobase = sc->iobase;
662 int rx_status;
663 int pkt_len;
664 struct mbuf * m;
665 struct mbuf * ipkt;
666
667 DODEBUG(Start_End, kprintf("ex_rx_intr%d: start\n", unit););
668
669 /*
670 * For all packets received since last receive interrupt:
671 * - If packet ok, read it into a new mbuf and queue it to interface,
672 * updating statistics.
673 * - If packet bad, just discard it, and update statistics.
674 * Finally, advance receive stop limit in card's memory to new location.
675 */
676
677 outw(iobase + HOST_ADDR_REG, sc->rx_head);
678
679 while (inw(iobase + IO_PORT_REG) == RCV_Done) {
680
681 rx_status = inw(iobase + IO_PORT_REG);
682 sc->rx_head = inw(iobase + IO_PORT_REG);
683 pkt_len = inw(iobase + IO_PORT_REG);
684
685 if (rx_status & RCV_OK_bit) {
686 MGETHDR(m, MB_DONTWAIT, MT_DATA);
687 ipkt = m;
688 if (ipkt == NULL) {
689 IFNET_STAT_INC(ifp, iqdrops, 1);
690 } else {
691 ipkt->m_pkthdr.rcvif = ifp;
692 ipkt->m_pkthdr.len = pkt_len;
693 ipkt->m_len = MHLEN;
694
695 while (pkt_len > 0) {
696 if (pkt_len > MINCLSIZE) {
697 MCLGET(m, MB_DONTWAIT);
698 if (m->m_flags & M_EXT) {
699 m->m_len = MCLBYTES;
700 } else {
701 m_freem(ipkt);
702 IFNET_STAT_INC(ifp, iqdrops, 1);
703 goto rx_another;
704 }
705 }
706 m->m_len = min(m->m_len, pkt_len);
707
708 /*
709 * NOTE: I'm assuming that all mbufs allocated are of even length,
710 * except for the last one in an odd-length packet.
711 */
712
713 insw(iobase + IO_PORT_REG,
714 mtod(m, caddr_t), m->m_len / 2);
715
716 if (m->m_len & 1) {
717 *(mtod(m, caddr_t) + m->m_len - 1) = inb(iobase + IO_PORT_REG);
718 }
719 pkt_len -= m->m_len;
720
721 if (pkt_len > 0) {
722 MGET(m->m_next, MB_DONTWAIT, MT_DATA);
723 if (m->m_next == NULL) {
724 m_freem(ipkt);
725 IFNET_STAT_INC(ifp, iqdrops, 1);
726 goto rx_another;
727 }
728 m = m->m_next;
729 m->m_len = MLEN;
730 }
731 }
732 ifp->if_input(ifp, ipkt);
733 IFNET_STAT_INC(ifp, ipackets, 1);
734 }
735 } else {
736 IFNET_STAT_INC(ifp, ierrors, 1);
737 }
738 outw(iobase + HOST_ADDR_REG, sc->rx_head);
739 rx_another: ;
740 }
741
742 if (sc->rx_head < sc->rx_lower_limit + 2)
743 outw(iobase + RCV_STOP_REG, sc->rx_upper_limit);
744 else
745 outw(iobase + RCV_STOP_REG, sc->rx_head - 2);
746
747 DODEBUG(Start_End, kprintf("ex_rx_intr%d: finish\n", unit););
748
749 return;
750 }
751
752
753 static int
754 ex_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
755 {
756 struct ex_softc * sc = ifp->if_softc;
757 struct ifreq * ifr = (struct ifreq *)data;
758 int error = 0;
759
760 DODEBUG(Start_End, kprintf("ex_ioctl%d: start ", ifp->if_dunit););
761
762 switch(cmd) {
763 case SIOCSIFFLAGS:
764 DODEBUG(Start_End, kprintf("SIOCSIFFLAGS"););
765 if ((ifp->if_flags & IFF_UP) == 0 &&
766 (ifp->if_flags & IFF_RUNNING)) {
767
768 ifp->if_flags &= ~IFF_RUNNING;
769 ex_stop(sc);
770 } else {
771 ex_init(sc);
772 }
773 break;
774 #ifdef NODEF
775 case SIOCGHWADDR:
776 DODEBUG(Start_End, kprintf("SIOCGHWADDR"););
777 bcopy((caddr_t)sc->sc_addr, (caddr_t)&ifr->ifr_data,
778 sizeof(sc->sc_addr));
779 break;
780 #endif
781 case SIOCADDMULTI:
782 DODEBUG(Start_End, kprintf("SIOCADDMULTI"););
783 case SIOCDELMULTI:
784 DODEBUG(Start_End, kprintf("SIOCDELMULTI"););
785 /* XXX Support not done yet. */
786 error = EINVAL;
787 break;
788 case SIOCSIFMEDIA:
789 case SIOCGIFMEDIA:
790 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd);
791 break;
792 default:
793 DODEBUG(Start_End, kprintf("unknown"););
794 error = ether_ioctl(ifp, cmd, data);
795 break;
796 }
797
798 DODEBUG(Start_End, kprintf("\nex_ioctl%d: finish\n", ifp->if_dunit););
799
800 return(error);
801 }
802
803
804 static void
805 ex_reset(struct ex_softc *sc)
806 {
807 DODEBUG(Start_End, kprintf("ex_reset%d: start\n", unit););
808
809 ex_stop(sc);
810 ex_init(sc);
811
812 DODEBUG(Start_End, kprintf("ex_reset%d: finish\n", unit););
813 }
814
815 static void
816 ex_watchdog(struct ifnet *ifp)
817 {
818 struct ex_softc * sc = ifp->if_softc;
819
820 DODEBUG(Start_End, kprintf("ex_watchdog%d: start\n", ifp->if_dunit););
821
822 ifq_clr_oactive(&ifp->if_snd);
823
824 DODEBUG(Status, kprintf("OIDLE watchdog\n"););
825
826 IFNET_STAT_INC(ifp, oerrors, 1);
827 ex_reset(sc);
828 if_devstart(ifp);
829
830 DODEBUG(Start_End, kprintf("ex_watchdog%d: finish\n", ifp->if_dunit););
831
832 return;
833 }
834
835 static int
836 ex_get_media (u_int32_t iobase)
837 {
838 int tmp;
839
840 outb(iobase + CMD_REG, Bank2_Sel);
841 tmp = inb(iobase + REG3);
842 outb(iobase + CMD_REG, Bank0_Sel);
843
844 if (tmp & TPE_bit)
845 return(IFM_ETHER|IFM_10_T);
846 if (tmp & BNC_bit)
847 return(IFM_ETHER|IFM_10_2);
848
849 return (IFM_ETHER|IFM_10_5);
850 }
851
852 static int
853 ex_ifmedia_upd (struct ifnet *ifp)
854 {
855
856 return (0);
857 }
858
859 static void
860 ex_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
861 {
862 struct ex_softc * sc = ifp->if_softc;
863
864 ifmr->ifm_active = ex_get_media(sc->iobase);
865
866 return;
867 }
868
869 u_short
870 eeprom_read(u_int32_t iobase, int location)
871 {
872 int i;
873 u_short data = 0;
874 int ee_addr;
875 int read_cmd = location | EE_READ_CMD;
876 short ctrl_val = EECS;
877
878 ee_addr = iobase + EEPROM_REG;
879 outb(iobase + CMD_REG, Bank2_Sel);
880 outb(ee_addr, EECS);
881 for (i = 8; i >= 0; i--) {
882 short outval = (read_cmd & (1 << i)) ? ctrl_val | EEDI : ctrl_val;
883 outb(ee_addr, outval);
884 outb(ee_addr, outval | EESK);
885 DELAY(3);
886 outb(ee_addr, outval);
887 DELAY(2);
888 }
889 outb(ee_addr, ctrl_val);
890
891 for (i = 16; i > 0; i--) {
892 outb(ee_addr, ctrl_val | EESK);
893 DELAY(3);
894 data = (data << 1) | ((inb(ee_addr) & EEDO) ? 1 : 0);
895 outb(ee_addr, ctrl_val);
896 DELAY(2);
897 }
898
899 ctrl_val &= ~EECS;
900 outb(ee_addr, ctrl_val | EESK);
901 DELAY(3);
902 outb(ee_addr, ctrl_val);
903 DELAY(2);
904 outb(iobase + CMD_REG, Bank0_Sel);
905 return(data);
906 }
Cache object: 1a1295e35a16dab536c29b34e7c16a7b
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