FreeBSD/Linux Kernel Cross Reference
sys/dev/netif/iwl/iwl2100reg.h

     /*
      * Copyright (c) 2008 The DragonFly Project.  All rights reserved.
      * 
      * This code is derived from software contributed to The DragonFly Project
      * by Sepherosa Ziehau <sepherosa@gmail.com>
      * 
      * Redistribution and use in source and binary forms, with or without
      * modification, are permitted provided that the following conditions
      * are met:
     * 
     * 1. Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     * 2. Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in
     *    the documentation and/or other materials provided with the
     *    distribution.
     * 3. Neither the name of The DragonFly Project nor the names of its
     *    contributors may be used to endorse or promote products derived
     *    from this software without specific, prior written permission.
     * 
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
     * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
     * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
     * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
     * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
     * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     * SUCH DAMAGE.
     * 
     * $DragonFly: src/sys/dev/netif/iwl/iwl2100reg.h,v 1.1 2008/03/05 14:10:39 sephe Exp $
     */
    
    #ifndef _IWL2100REG_H
    #define _IWL2100REG_H
    
    #include "if_iwlreg.h"
    
    #define IWL2100_NOISE_FLOOR             -98
    
    #define IWL2100_RTS_MAX                 2304
    
    /*
     * PCI configuration registers
     */
    #define IWL2100_PCIR_RETRY_TIMEOUT      0x41
    
    /*
     * EEPROM offsets
     */
    #define IWL2100_EEPROM_MAC              0x21
    #define IWL2100_EEPROM_IBSS_CHANS       0x25
    #define IWL2100_EEPROM_CHANS            0x37
    
    /*
     * Registers and values
     */
    #define IWL2100_INTR_STATUS             0x08
    #define IWL2100_INTR_MASK               0x0c
    #define IWL2100_INTR_TX                 0x00000001
    #define IWL2100_INTR_RX                 0x00000002
    #define IWL2100_INTR_STATE_CHG          0x00000010
    #define IWL2100_INTR_CMD_DONE           0x00010000
    #define IWL2100_INTR_FW_INITED          0x01000000
    #define IWL2100_INTR_EFATAL             0x40000000
    #define IWL2100_INTR_EPARITY            0x80000000
    #define IWL2100_INTRS                   \
            (IWL2100_INTR_TX |              \
             IWL2100_INTR_RX |              \
             IWL2100_INTR_STATE_CHG |       \
             IWL2100_INTR_CMD_DONE |        \
             IWL2100_INTR_FW_INITED |       \
             IWL2100_INTR_EFATAL |          \
             IWL2100_INTR_EPARITY)
    
    #define IWL2100_IND_ADDR                IWL_IND_ADDR
    #define IWL2100_IND_DATA                IWL_IND_DATA
    
    #define IWL2100_AUTOINC_ADDR            0x18
    #define IWL2100_AUTOINC_DATA            0x1c
    
    #define IWL2100_RESET                   0x20
    #define IWL2100_RESET_DONE              0x001
    #define IWL2100_RESET_SW                0x080
    #define IWL2100_RESET_MASTER_STOPPED    0x100
    #define IWL2100_RESET_STOP_MASTER       0x200
    
    #define IWL2100_CTRL                    0x24
    #define IWL2100_CTRL_INITDONE           0x04
    #define IWL2100_CTRL_STANDBY            0x02
    #define IWL2100_CTRL_CLKREADY           0x01
    
    #define IWL2100_GPIO                    0x30
    #define IWL2100_GPIO_1_FWWR             0x00004
    #define IWL2100_GPIO_1_EN               0x00008
    #define IWL2100_GPIO_3_FWWR             0x00040
   #define IWL2100_GPIO_3_EN               0x00080
   #define IWL2100_GPIO_LEDOFF             0x02000
   #define IWL2100_GPIO_RFKILLED           0x10000
   
   #define IWL2100_TXQ_ADDR                0x200
   #define IWL2100_TXQ_SIZE                0x204
   #define IWL2100_TXQ_READ_IDX            0x280
   #define IWL2100_TXQ_WRITE_IDX           0xf80
   
   #define IWL2100_RXQ_ADDR                0x240
   #define IWL2100_RX_STATUS_ADDR          0x244
   #define IWL2100_RXQ_SIZE                0x248
   #define IWL2100_RXQ_READ_IDX            0x2a0
   #define IWL2100_RXQ_WRITE_IDX           0xfa0
   
   #define IWL2100_ORD1_ADDR               0x380
   #define IWL2100_ORD2_ADDR               0x384
   
   /*
    * Indirect registers and values
    */
   #define IWL2100_IND_CTRL                0x220000
   
   #define IWL2100_IND_ERROR_INFO          0x2a7f0
   #define IWL2100_IND_ERRORADDR_MASK      0x3ffff
   
   #define IWL2100_IND_HALT                0x3000e0
   #define IWL2100_IND_HALT_HOLD           0x80000000
   
   /*
    * Shared memory
    */
   #define IWL2100_SHMEM0                  0x2f200
   #define IWL2100_SHMEM0_SIZE             0x310
   
   #define IWL2100_SHMEM1                  0x2f610
   #define IWL2100_SHMEM1_SIZE             0x20
   
   #define IWL2100_SHMEM2                  0x2fa00
   #define IWL2100_SHMEM2_SIZE             0x20
   
   #define IWL2100_SHMEM3                  0x2fc00
   #define IWL2100_SHMEM3_SIZE             0x10
   
   #define IWL2100_SHMEM_INTR              0x2ff80
   #define IWL2100_SHMEM_INTR_SIZE         0x80
   
   /*
    * Offsets within ORDINAL1
    */
   #define IWL2100_ORD1_FWLOCK             120
   #define IWL2100_ORD1_CONF_START         157
   #define IWL2100_ORD1_TXRATE             192
   #define IWL2100_ORD1_DBADDR             204
   
   /*
    * Offsets within ORDINAL2
    */
   #define IWL2100_ORD2_BSSID              14
   
   /*
    * Firmware commands
    */
   #define IWL2100_CMD_CONF_DONE           2
   #define IWL2100_CMD_SET_80211           6
   #define  IWL2100_CFG_MONITOR            0x00004
   #define  IWL2100_CFG_AUTO_PREAMBLE      0x00010
   #define  IWL2100_CFG_IBSS_AUTO_START    0x00020
   #define  IWL2100_CFG_ANS_BCAST_PROBE    0x00800
   #define  IWL2100_CFG_8021X              0x04000
   #define  IWL2100_CFG_STA                0x08000
   #define  IWL2100_CFG_IBSS               0x10000
   #define  IWL2100_CFG_CHANMASK           0x3fff
   #define IWL2100_CMD_SET_ESSID           8
   #define IWL2100_CMD_SET_BSSID           9
   #define IWL2100_CMD_SET_ADDR            11
   #define IWL2100_CMD_SET_OPMODE          12
   #define  IWL2100_OPMODE_STA             1
   #define  IWL2100_OPMODE_MONITOR         2
   #define  IWL2100_OPMODE_IBSS            3
   #define IWL2100_CMD_SET_CHAN            14
   #define IWL2100_CMD_SET_RTSTHRESHOLD    15
   #define IWL2100_CMD_SET_POWERSAVE       17
   #define IWL2100_CMD_SET_TXRATES         18
   #define IWL2100_CMD_SET_BASICRATES      19
   #define IWL2100_CMD_SET_WEPKEY          20
   #define IWL2100_CMD_SET_WEPTXKEY        25
   #define IWL2100_CMD_SET_PRIVACY         26
   #define  IWL2100_PRIVACY_ENABLE         0x8
   #define IWL2100_CMD_SET_BINTVAL         29
   #define IWL2100_CMD_TX_DATA             33
   #define IWL2100_CMD_SET_TXPOWER         36
   #define IWL2100_CMD_SCAN                43
   #define IWL2100_CMD_CONF_START          44
   #define IWL2100_CMD_SET_SCANOPT         46
   #define  IWL2100_SCANOPT_NOASSOC        (1 << 0)
   #define  IWL2100_SCANOPT_MIXED          (1 << 1)
   #define  IWL2100_SCANOPT_PASSIVE        (1 << 3)
   #define IWL2100_CMD_SET_MSDU_TXRATES    62
   #define IWL2100_CMD_SET_SECURITY        67
   #define IWL2100_CMD_SET_IE              69
   
   #endif  /* !_IWL2100REG_H */

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