1 /******************************************************************************
2
3 Copyright (c) 2001-2012, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
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16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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30 POSSIBILITY OF SUCH DAMAGE.
31
32 ******************************************************************************/
33 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe.h,v 1.26 2012/04/23 22:05:09 bz Exp $*/
34
35
36 #ifndef _IXGBE_H_
37 #define _IXGBE_H_
38
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/mbuf.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
47 #include <sys/module.h>
48 #include <sys/sockio.h>
49
50 #include <net/if.h>
51 #include <net/if_arp.h>
52 #include <net/ifq_var.h>
53 #include <net/bpf.h>
54 #include <net/ethernet.h>
55 #include <net/if_dl.h>
56 #include <net/if_media.h>
57
58 #include <net/if_types.h>
59 #include <net/vlan/if_vlan_var.h>
60 #include <net/vlan/if_vlan_ether.h>
61
62 #include <netinet/in_systm.h>
63 #include <netinet/in.h>
64 #include <netinet/if_ether.h>
65 #include <netinet/ip.h>
66 #include <netinet/ip6.h>
67 #include <netinet/tcp.h>
68 #ifdef NET_LRO
69 #include <netinet/tcp_lro.h> /* XXX: IPv4 only */
70 #endif
71 #include <netinet/udp.h>
72
73 #include <sys/in_cksum.h>
74
75 #include <sys/bus.h>
76 #include <sys/rman.h>
77 #include <sys/resource.h>
78 #include <vm/vm.h>
79 #include <vm/pmap.h>
80 #include <machine/clock.h>
81 #include <bus/pci/pcivar.h>
82 #include <bus/pci/pcireg.h>
83 #include <sys/proc.h>
84 #include <sys/sysctl.h>
85 #include <sys/endian.h>
86 #include <sys/taskqueue.h>
87 #include <machine/smp.h>
88
89 #include <sys/spinlock.h>
90 #include <sys/spinlock2.h>
91
92 #ifdef IXGBE_IEEE1588
93 #include <sys/ieee1588.h>
94 #endif
95
96 #include "ixgbe_api.h"
97 #include "ixgbe_defines.h"
98
99 /* Tunables */
100
101 /*
102 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
103 * number of transmit descriptors allocated by the driver. Increasing this
104 * value allows the driver to queue more transmits. Each descriptor is 16
105 * bytes. Performance tests have show the 2K value to be optimal for top
106 * performance.
107 */
108 #define DEFAULT_TXD 1024
109 #define PERFORM_TXD 2048
110 #define MAX_TXD 4096
111 #define MIN_TXD 64
112
113 /*
114 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
115 * number of receive descriptors allocated for each RX queue. Increasing this
116 * value allows the driver to buffer more incoming packets. Each descriptor
117 * is 16 bytes. A receive buffer is also allocated for each descriptor.
118 *
119 * Note: with 8 rings and a dual port card, it is possible to bump up
120 * against the system mbuf pool limit, you can tune nmbclusters
121 * to adjust for this.
122 */
123 #define DEFAULT_RXD 1024
124 #define PERFORM_RXD 2048
125 #define MAX_RXD 4096
126 #define MIN_RXD 64
127
128 /* Alignment for rings */
129 #define DBA_ALIGN 128
130
131 /*
132 * This parameter controls the maximum no of times the driver will loop in
133 * the isr. Minimum Value = 1
134 */
135 #define MAX_LOOP 10
136
137 /*
138 * This is the max watchdog interval, ie. the time that can
139 * pass between any two TX clean operations, such only happening
140 * when the TX hardware is functioning.
141 */
142 #define IXGBE_WATCHDOG (10 * hz)
143
144 /*
145 * This parameters control when the driver calls the routine to reclaim
146 * transmit descriptors.
147 */
148 #define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
149 #define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32)
150
151 #define IXGBE_MAX_FRAME_SIZE 0x3F00
152
153 /* Flow control constants */
154 #define IXGBE_FC_PAUSE 0xFFFF
155 #define IXGBE_FC_HI 0x20000
156 #define IXGBE_FC_LO 0x10000
157
158 /* Keep older OS drivers building... */
159 #if !defined(SYSCTL_ADD_UQUAD)
160 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
161 #endif
162
163 /* Defines for printing debug information */
164 #define DEBUG_INIT 0
165 #define DEBUG_IOCTL 0
166 #define DEBUG_HW 0
167
168 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) kprintf(S "\n")
169 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) kprintf(S "\n", A)
170 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) kprintf(S "\n", A, B)
171 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) kprintf(S "\n")
172 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) kprintf(S "\n", A)
173 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) kprintf(S "\n", A, B)
174 #define HW_DEBUGOUT(S) if (DEBUG_HW) kprintf(S "\n")
175 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) kprintf(S "\n", A)
176 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) kprintf(S "\n", A, B)
177
178 #define MAX_NUM_MULTICAST_ADDRESSES 128
179 #define IXGBE_82598_SCATTER 100
180 #define IXGBE_82599_SCATTER 32
181 #define MSIX_82598_BAR 3
182 #define MSIX_82599_BAR 4
183 #define IXGBE_TSO_SIZE 262140
184 #define IXGBE_TX_BUFFER_SIZE ((u32) 1514)
185 #define IXGBE_RX_HDR 128
186 #define IXGBE_VFTA_SIZE 128
187 #define IXGBE_BR_SIZE 4096
188 #define IXGBE_QUEUE_MIN_FREE 32
189 #define IXGBE_QUEUE_IDLE 1
190 #define IXGBE_QUEUE_WORKING 2
191 #define IXGBE_QUEUE_HUNG 4
192 #define IXGBE_QUEUE_DEPLETED 8
193
194 /* Offload bits in mbuf flag */
195 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP)
196
197 /* One for TX csum offloading desc, the other 2 are reserved */
198 #define IXGBE_TX_RESERVED 3
199
200 /*
201 * Interrupt Moderation parameters
202 */
203 #define IXGBE_LOW_LATENCY 128
204 #define IXGBE_AVE_LATENCY 400
205 #define IXGBE_BULK_LATENCY 1200
206 #define IXGBE_LINK_ITR 2000
207
208 #define IXGBE_INTR_RATE 8000
209 #define IXGBE_EITR_INTVL_MASK 0x7ffc
210 #define IXGBE_EITR_INTVL_SHIFT 2
211
212 /*
213 *****************************************************************************
214 * vendor_info_array
215 *
216 * This array contains the list of Subvendor/Subdevice IDs on which the driver
217 * should load.
218 *
219 *****************************************************************************
220 */
221 typedef struct _ixgbe_vendor_info_t {
222 unsigned int vendor_id;
223 unsigned int device_id;
224 unsigned int subvendor_id;
225 unsigned int subdevice_id;
226 unsigned int index;
227 } ixgbe_vendor_info_t;
228
229
230 struct ixgbe_tx_buf {
231 u32 eop_index;
232 struct mbuf *m_head;
233 bus_dmamap_t map;
234 };
235
236 struct ixgbe_rx_buf {
237 struct mbuf *m_head;
238 struct mbuf *m_pack;
239 struct mbuf *fmp;
240 bus_dmamap_t hmap;
241 bus_dmamap_t pmap;
242 };
243
244 /*
245 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
246 */
247 struct ixgbe_dma_alloc {
248 bus_addr_t dma_paddr;
249 caddr_t dma_vaddr;
250 bus_dma_tag_t dma_tag;
251 bus_dmamap_t dma_map;
252 bus_dma_segment_t dma_seg;
253 bus_size_t dma_size;
254 int dma_nseg;
255 };
256
257 /*
258 ** Driver queue struct: this is the interrupt container
259 ** for the associated tx and rx ring.
260 */
261 struct ix_queue {
262 struct adapter *adapter;
263 u32 msix; /* This queue's MSIX vector */
264 u32 eims; /* This queue's EIMS bit */
265 u32 eitr_setting;
266 struct resource *res;
267 void *tag;
268 struct tx_ring *txr;
269 struct rx_ring *rxr;
270 u64 irqs;
271 struct lwkt_serialize serializer;
272 };
273
274 /*
275 * The transmit ring, one per queue
276 */
277 struct tx_ring {
278 struct adapter *adapter;
279 struct lwkt_serialize tx_serialize;
280 u32 me;
281 int queue_status;
282 int watchdog_time;
283 union ixgbe_adv_tx_desc *tx_base;
284 struct ixgbe_dma_alloc txdma;
285 u32 next_avail_desc;
286 u32 next_to_clean;
287 struct ixgbe_tx_buf *tx_buffers;
288 volatile u16 tx_avail;
289 u32 txd_cmd;
290 bus_dma_tag_t txtag;
291 char lock_name[16];
292 #ifdef IFNET_BUF_RING
293 struct buf_ring *br;
294 #endif
295 #ifdef IXGBE_FDIR
296 u16 atr_sample;
297 u16 atr_count;
298 #endif
299 u32 bytes; /* used for AIM */
300 u32 packets;
301 /* Soft Stats */
302 u64 no_desc_avail;
303 u64 total_packets;
304 };
305
306
307 /*
308 * The Receive ring, one per rx queue
309 */
310 struct rx_ring {
311 struct adapter *adapter;
312 struct lock rx_lock;
313 u32 me;
314 union ixgbe_adv_rx_desc *rx_base;
315 struct ixgbe_dma_alloc rxdma;
316 #ifdef NET_LRO
317 struct lro_ctrl lro;
318 #endif
319 bool lro_enabled;
320 bool hdr_split;
321 bool hw_rsc;
322 bool discard;
323 bool vtag_strip;
324 u32 next_to_refresh;
325 u32 next_to_check;
326 char lock_name[16];
327 struct ixgbe_rx_buf *rx_buffers;
328 bus_dma_tag_t htag;
329 bus_dma_tag_t ptag;
330
331 u32 bytes; /* Used for AIM calc */
332 u32 packets;
333
334 /* Soft stats */
335 u64 rx_irq;
336 u64 rx_split_packets;
337 u64 rx_packets;
338 u64 rx_bytes;
339 u64 rx_discarded;
340 u64 rsc_num;
341 #ifdef IXGBE_FDIR
342 u64 flm;
343 #endif
344 };
345
346 /* Our adapter structure */
347 struct adapter {
348 struct ifnet *ifp;
349 struct ixgbe_hw hw;
350
351 struct ixgbe_osdep osdep;
352 struct device *dev;
353
354 struct resource *pci_mem;
355 struct resource *msix_mem;
356
357 /*
358 * Interrupt resources: this set is
359 * either used for legacy, or for Link
360 * when doing MSIX
361 */
362 void *tag;
363 struct resource *res;
364 int intr_type;
365
366 struct ifmedia media;
367 struct callout timer;
368 int msix;
369 int if_flags;
370
371 struct lock core_lock;
372
373 eventhandler_tag vlan_attach;
374 eventhandler_tag vlan_detach;
375
376 u16 num_vlans;
377 u16 num_queues;
378
379 /*
380 ** Shadow VFTA table, this is needed because
381 ** the real vlan filter table gets cleared during
382 ** a soft reset and the driver needs to be able
383 ** to repopulate it.
384 */
385 u32 shadow_vfta[IXGBE_VFTA_SIZE];
386
387 /* Info about the interface */
388 u32 optics;
389 u32 fc; /* local flow ctrl setting */
390 int advertise; /* link speeds */
391 bool link_active;
392 u16 max_frame_size;
393 u16 num_segs;
394 u32 link_speed;
395 bool link_up;
396 u32 linkvec;
397
398 /* Mbuf cluster size */
399 u32 rx_mbuf_sz;
400
401 /* Support for pluggable optics */
402 bool sfp_probe;
403 struct task mod_task; /* SFP tasklet */
404 struct task msf_task; /* Multispeed Fiber */
405 #ifdef IXGBE_FDIR
406 int fdir_reinit;
407 struct task fdir_task;
408 #endif
409 struct taskqueue *tq;
410
411 /*
412 ** Queues:
413 ** This is the irq holder, it has
414 ** and RX/TX pair or rings associated
415 ** with it.
416 */
417 struct ix_queue *queues;
418
419 /*
420 * Transmit rings:
421 * Allocated at run time, an array of rings.
422 */
423 struct tx_ring *tx_rings;
424 int num_tx_desc;
425
426 /*
427 * Receive rings:
428 * Allocated at run time, an array of rings.
429 */
430 struct rx_ring *rx_rings;
431 int num_rx_desc;
432 u64 que_mask;
433 u32 rx_process_limit;
434
435 /* Multicast array memory */
436 u8 *mta;
437
438 int intr_rate;
439
440 /* Misc stats maintained by the driver */
441 unsigned long dropped_pkts;
442 unsigned long mbuf_defrag_failed;
443 unsigned long mbuf_header_failed;
444 unsigned long mbuf_packet_failed;
445 unsigned long no_tx_map_avail;
446 unsigned long no_tx_dma_setup;
447 unsigned long watchdog_events;
448 unsigned long tso_tx;
449 unsigned long link_irq;
450
451 struct ixgbe_hw_stats stats;
452
453 struct lwkt_serialize serializer;
454 struct sysctl_ctx_list sysctl_ctx;
455 struct sysctl_oid *sysctl_tree;
456 };
457
458 /* Precision Time Sync (IEEE 1588) defines */
459 #define ETHERTYPE_IEEE1588 0x88F7
460 #define PICOSECS_PER_TICK 20833
461 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */
462 #define IXGBE_ADVTXD_TSTAMP 0x00080000
463
464
465 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
466 lockinit(&(_sc)->core_lock, _name, 0, LK_CANRECURSE)
467 #define IXGBE_TX_LOCK_INIT(_sc) lwkt_serialize_init(&(_sc)->tx_serialize)
468 #define IXGBE_CORE_LOCK_DESTROY(_sc) lockuninit(&(_sc)->core_lock)
469 #define IXGBE_TX_LOCK_DESTROY(_sc)
470 #define IXGBE_RX_LOCK_DESTROY(_sc) lockuninit(&(_sc)->rx_lock)
471 #define IXGBE_CORE_LOCK(_sc) lockmgr(&(_sc)->core_lock, LK_EXCLUSIVE)
472 #define IXGBE_TX_LOCK(_sc) lwkt_serialize_enter(&(_sc)->tx_serialize)
473 #define IXGBE_TX_TRYLOCK(_sc) lwkt_serialize_try(&(_sc)->tx_serialize)
474 #define IXGBE_RX_LOCK(_sc) lockmgr(&(_sc)->rx_lock, LK_EXCLUSIVE)
475 #define IXGBE_CORE_UNLOCK(_sc) lockmgr(&(_sc)->core_lock, LK_RELEASE)
476 #define IXGBE_TX_UNLOCK(_sc) lwkt_serialize_exit(&(_sc)->tx_serialize)
477 #define IXGBE_RX_UNLOCK(_sc) lockmgr(&(_sc)->rx_lock, LK_RELEASE)
478 #define IXGBE_CORE_LOCK_ASSERT(_sc) KKASSERT(lockstatus(&(_sc)->core_lock, curthread) !=0)
479 #define IXGBE_TX_LOCK_ASSERT(_sc) ASSERT_SERIALIZED(&(_sc)->tx_serialize)
480
481
482 static inline bool
483 ixgbe_is_sfp(struct ixgbe_hw *hw)
484 {
485 switch (hw->phy.type) {
486 case ixgbe_phy_sfp_avago:
487 case ixgbe_phy_sfp_ftl:
488 case ixgbe_phy_sfp_intel:
489 case ixgbe_phy_sfp_unknown:
490 case ixgbe_phy_sfp_passive_tyco:
491 case ixgbe_phy_sfp_passive_unknown:
492 return TRUE;
493 default:
494 return FALSE;
495 }
496 }
497
498 /*
499 ** Find the number of unrefreshed RX descriptors
500 */
501 static inline u16
502 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
503 {
504 struct adapter *adapter = rxr->adapter;
505
506 if (rxr->next_to_check > rxr->next_to_refresh)
507 return (rxr->next_to_check - rxr->next_to_refresh - 1);
508 else
509 return ((adapter->num_rx_desc + rxr->next_to_check) -
510 rxr->next_to_refresh - 1);
511 }
512
513 #endif /* _IXGBE_H_ */
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