The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/netif/ixgbe/ixgbe_api.c

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    1 /******************************************************************************
    2 
    3   Copyright (c) 2001-2012, Intel Corporation 
    4   All rights reserved.
    5   
    6   Redistribution and use in source and binary forms, with or without 
    7   modification, are permitted provided that the following conditions are met:
    8   
    9    1. Redistributions of source code must retain the above copyright notice, 
   10       this list of conditions and the following disclaimer.
   11   
   12    2. Redistributions in binary form must reproduce the above copyright 
   13       notice, this list of conditions and the following disclaimer in the 
   14       documentation and/or other materials provided with the distribution.
   15   
   16    3. Neither the name of the Intel Corporation nor the names of its 
   17       contributors may be used to endorse or promote products derived from 
   18       this software without specific prior written permission.
   19   
   20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
   22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
   23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
   24   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
   25   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
   26   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
   27   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
   28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
   29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   30   POSSIBILITY OF SUCH DAMAGE.
   31 
   32 ******************************************************************************/
   33 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe_api.c,v 1.13 2012/07/05 20:51:44 jfv Exp $*/
   34 
   35 #include "ixgbe_api.h"
   36 #include "ixgbe_common.h"
   37 
   38 /**
   39  *  ixgbe_init_shared_code - Initialize the shared code
   40  *  @hw: pointer to hardware structure
   41  *
   42  *  This will assign function pointers and assign the MAC type and PHY code.
   43  *  Does not touch the hardware. This function must be called prior to any
   44  *  other function in the shared code. The ixgbe_hw structure should be
   45  *  memset to 0 prior to calling this function.  The following fields in
   46  *  hw structure should be filled in prior to calling this function:
   47  *  hw_addr, back, device_id, vendor_id, subsystem_device_id,
   48  *  subsystem_vendor_id, and revision_id
   49  **/
   50 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
   51 {
   52         s32 status;
   53 
   54         DEBUGFUNC("ixgbe_init_shared_code");
   55 
   56         /*
   57          * Set the mac type
   58          */
   59         ixgbe_set_mac_type(hw);
   60 
   61         switch (hw->mac.type) {
   62         case ixgbe_mac_82598EB:
   63                 status = ixgbe_init_ops_82598(hw);
   64                 break;
   65         case ixgbe_mac_82599EB:
   66                 status = ixgbe_init_ops_82599(hw);
   67                 break;
   68         case ixgbe_mac_82599_vf:
   69         case ixgbe_mac_X540_vf:
   70                 status = ixgbe_init_ops_vf(hw);
   71                 break;
   72         case ixgbe_mac_X540:
   73                 status = ixgbe_init_ops_X540(hw);
   74                 break;
   75         default:
   76                 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
   77                 break;
   78         }
   79 
   80         return status;
   81 }
   82 
   83 /**
   84  *  ixgbe_set_mac_type - Sets MAC type
   85  *  @hw: pointer to the HW structure
   86  *
   87  *  This function sets the mac type of the adapter based on the
   88  *  vendor ID and device ID stored in the hw structure.
   89  **/
   90 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
   91 {
   92         s32 ret_val = IXGBE_SUCCESS;
   93 
   94         DEBUGFUNC("ixgbe_set_mac_type\n");
   95 
   96         if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) {
   97                 switch (hw->device_id) {
   98                 case IXGBE_DEV_ID_82598:
   99                 case IXGBE_DEV_ID_82598_BX:
  100                 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
  101                 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
  102                 case IXGBE_DEV_ID_82598AT:
  103                 case IXGBE_DEV_ID_82598AT2:
  104                 case IXGBE_DEV_ID_82598EB_CX4:
  105                 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
  106                 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
  107                 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
  108                 case IXGBE_DEV_ID_82598EB_XF_LR:
  109                 case IXGBE_DEV_ID_82598EB_SFP_LOM:
  110                         hw->mac.type = ixgbe_mac_82598EB;
  111                         break;
  112                 case IXGBE_DEV_ID_82599_KX4:
  113                 case IXGBE_DEV_ID_82599_KX4_MEZZ:
  114                 case IXGBE_DEV_ID_82599_XAUI_LOM:
  115                 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
  116                 case IXGBE_DEV_ID_82599_KR:
  117                 case IXGBE_DEV_ID_82599_SFP:
  118                 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
  119                 case IXGBE_DEV_ID_82599_SFP_FCOE:
  120                 case IXGBE_DEV_ID_82599_SFP_EM:
  121                 case IXGBE_DEV_ID_82599_SFP_SF2:
  122                 case IXGBE_DEV_ID_82599EN_SFP:
  123                 case IXGBE_DEV_ID_82599_CX4:
  124                 case IXGBE_DEV_ID_82599_T3_LOM:
  125                         hw->mac.type = ixgbe_mac_82599EB;
  126                         break;
  127                 case IXGBE_DEV_ID_82599_VF:
  128                         hw->mac.type = ixgbe_mac_82599_vf;
  129                         break;
  130                 case IXGBE_DEV_ID_X540_VF:
  131                         hw->mac.type = ixgbe_mac_X540_vf;
  132                         break;
  133                 case IXGBE_DEV_ID_X540T:
  134                 case IXGBE_DEV_ID_X540T1:
  135                         hw->mac.type = ixgbe_mac_X540;
  136                         break;
  137                 default:
  138                         ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
  139                         break;
  140                 }
  141         } else {
  142                 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
  143         }
  144 
  145         DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
  146                   hw->mac.type, ret_val);
  147         return ret_val;
  148 }
  149 
  150 /**
  151  *  ixgbe_init_hw - Initialize the hardware
  152  *  @hw: pointer to hardware structure
  153  *
  154  *  Initialize the hardware by resetting and then starting the hardware
  155  **/
  156 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
  157 {
  158         return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
  159                                IXGBE_NOT_IMPLEMENTED);
  160 }
  161 
  162 /**
  163  *  ixgbe_reset_hw - Performs a hardware reset
  164  *  @hw: pointer to hardware structure
  165  *
  166  *  Resets the hardware by resetting the transmit and receive units, masks and
  167  *  clears all interrupts, performs a PHY reset, and performs a MAC reset
  168  **/
  169 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
  170 {
  171         return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
  172                                IXGBE_NOT_IMPLEMENTED);
  173 }
  174 
  175 /**
  176  *  ixgbe_start_hw - Prepares hardware for Rx/Tx
  177  *  @hw: pointer to hardware structure
  178  *
  179  *  Starts the hardware by filling the bus info structure and media type,
  180  *  clears all on chip counters, initializes receive address registers,
  181  *  multicast table, VLAN filter table, calls routine to setup link and
  182  *  flow control settings, and leaves transmit and receive units disabled
  183  *  and uninitialized.
  184  **/
  185 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
  186 {
  187         return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
  188                                IXGBE_NOT_IMPLEMENTED);
  189 }
  190 
  191 /**
  192  *  ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
  193  *  which is disabled by default in ixgbe_start_hw();
  194  *
  195  *  @hw: pointer to hardware structure
  196  *
  197  *   Enable relaxed ordering;
  198  **/
  199 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
  200 {
  201         if (hw->mac.ops.enable_relaxed_ordering)
  202                 hw->mac.ops.enable_relaxed_ordering(hw);
  203 }
  204 
  205 /**
  206  *  ixgbe_clear_hw_cntrs - Clear hardware counters
  207  *  @hw: pointer to hardware structure
  208  *
  209  *  Clears all hardware statistics counters by reading them from the hardware
  210  *  Statistics counters are clear on read.
  211  **/
  212 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
  213 {
  214         return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
  215                                IXGBE_NOT_IMPLEMENTED);
  216 }
  217 
  218 /**
  219  *  ixgbe_get_media_type - Get media type
  220  *  @hw: pointer to hardware structure
  221  *
  222  *  Returns the media type (fiber, copper, backplane)
  223  **/
  224 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
  225 {
  226         return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
  227                                ixgbe_media_type_unknown);
  228 }
  229 
  230 /**
  231  *  ixgbe_get_mac_addr - Get MAC address
  232  *  @hw: pointer to hardware structure
  233  *  @mac_addr: Adapter MAC address
  234  *
  235  *  Reads the adapter's MAC address from the first Receive Address Register
  236  *  (RAR0) A reset of the adapter must have been performed prior to calling
  237  *  this function in order for the MAC address to have been loaded from the
  238  *  EEPROM into RAR0
  239  **/
  240 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
  241 {
  242         return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
  243                                (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
  244 }
  245 
  246 /**
  247  *  ixgbe_get_san_mac_addr - Get SAN MAC address
  248  *  @hw: pointer to hardware structure
  249  *  @san_mac_addr: SAN MAC address
  250  *
  251  *  Reads the SAN MAC address from the EEPROM, if it's available.  This is
  252  *  per-port, so set_lan_id() must be called before reading the addresses.
  253  **/
  254 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
  255 {
  256         return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
  257                                (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
  258 }
  259 
  260 /**
  261  *  ixgbe_set_san_mac_addr - Write a SAN MAC address
  262  *  @hw: pointer to hardware structure
  263  *  @san_mac_addr: SAN MAC address
  264  *
  265  *  Writes A SAN MAC address to the EEPROM.
  266  **/
  267 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
  268 {
  269         return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
  270                                (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
  271 }
  272 
  273 /**
  274  *  ixgbe_get_device_caps - Get additional device capabilities
  275  *  @hw: pointer to hardware structure
  276  *  @device_caps: the EEPROM word for device capabilities
  277  *
  278  *  Reads the extra device capabilities from the EEPROM
  279  **/
  280 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
  281 {
  282         return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
  283                                (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
  284 }
  285 
  286 /**
  287  *  ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
  288  *  @hw: pointer to hardware structure
  289  *  @wwnn_prefix: the alternative WWNN prefix
  290  *  @wwpn_prefix: the alternative WWPN prefix
  291  *
  292  *  This function will read the EEPROM from the alternative SAN MAC address
  293  *  block to check the support for the alternative WWNN/WWPN prefix support.
  294  **/
  295 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
  296                          u16 *wwpn_prefix)
  297 {
  298         return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
  299                                (hw, wwnn_prefix, wwpn_prefix),
  300                                IXGBE_NOT_IMPLEMENTED);
  301 }
  302 
  303 /**
  304  *  ixgbe_get_fcoe_boot_status -  Get FCOE boot status from EEPROM
  305  *  @hw: pointer to hardware structure
  306  *  @bs: the fcoe boot status
  307  *
  308  *  This function will read the FCOE boot status from the iSCSI FCOE block
  309  **/
  310 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
  311 {
  312         return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
  313                                (hw, bs),
  314                                IXGBE_NOT_IMPLEMENTED);
  315 }
  316 
  317 /**
  318  *  ixgbe_get_bus_info - Set PCI bus info
  319  *  @hw: pointer to hardware structure
  320  *
  321  *  Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
  322  **/
  323 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
  324 {
  325         return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
  326                                IXGBE_NOT_IMPLEMENTED);
  327 }
  328 
  329 /**
  330  *  ixgbe_get_num_of_tx_queues - Get Tx queues
  331  *  @hw: pointer to hardware structure
  332  *
  333  *  Returns the number of transmit queues for the given adapter.
  334  **/
  335 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
  336 {
  337         return hw->mac.max_tx_queues;
  338 }
  339 
  340 /**
  341  *  ixgbe_get_num_of_rx_queues - Get Rx queues
  342  *  @hw: pointer to hardware structure
  343  *
  344  *  Returns the number of receive queues for the given adapter.
  345  **/
  346 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
  347 {
  348         return hw->mac.max_rx_queues;
  349 }
  350 
  351 /**
  352  *  ixgbe_stop_adapter - Disable Rx/Tx units
  353  *  @hw: pointer to hardware structure
  354  *
  355  *  Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
  356  *  disables transmit and receive units. The adapter_stopped flag is used by
  357  *  the shared code and drivers to determine if the adapter is in a stopped
  358  *  state and should not touch the hardware.
  359  **/
  360 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
  361 {
  362         return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
  363                                IXGBE_NOT_IMPLEMENTED);
  364 }
  365 
  366 /**
  367  *  ixgbe_read_pba_string - Reads part number string from EEPROM
  368  *  @hw: pointer to hardware structure
  369  *  @pba_num: stores the part number string from the EEPROM
  370  *  @pba_num_size: part number string buffer length
  371  *
  372  *  Reads the part number string from the EEPROM.
  373  **/
  374 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
  375 {
  376         return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
  377 }
  378 
  379 /**
  380  *  ixgbe_read_pba_num - Reads part number from EEPROM
  381  *  @hw: pointer to hardware structure
  382  *  @pba_num: stores the part number from the EEPROM
  383  *
  384  *  Reads the part number from the EEPROM.
  385  **/
  386 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
  387 {
  388         return ixgbe_read_pba_num_generic(hw, pba_num);
  389 }
  390 
  391 /**
  392  *  ixgbe_identify_phy - Get PHY type
  393  *  @hw: pointer to hardware structure
  394  *
  395  *  Determines the physical layer module found on the current adapter.
  396  **/
  397 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
  398 {
  399         s32 status = IXGBE_SUCCESS;
  400 
  401         if (hw->phy.type == ixgbe_phy_unknown) {
  402                 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
  403                                          IXGBE_NOT_IMPLEMENTED);
  404         }
  405 
  406         return status;
  407 }
  408 
  409 /**
  410  *  ixgbe_reset_phy - Perform a PHY reset
  411  *  @hw: pointer to hardware structure
  412  **/
  413 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
  414 {
  415         s32 status = IXGBE_SUCCESS;
  416 
  417         if (hw->phy.type == ixgbe_phy_unknown) {
  418                 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
  419                         status = IXGBE_ERR_PHY;
  420         }
  421 
  422         if (status == IXGBE_SUCCESS) {
  423                 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
  424                                          IXGBE_NOT_IMPLEMENTED);
  425         }
  426         return status;
  427 }
  428 
  429 /**
  430  *  ixgbe_get_phy_firmware_version -
  431  *  @hw: pointer to hardware structure
  432  *  @firmware_version: pointer to firmware version
  433  **/
  434 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
  435 {
  436         s32 status = IXGBE_SUCCESS;
  437 
  438         status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
  439                                  (hw, firmware_version),
  440                                  IXGBE_NOT_IMPLEMENTED);
  441         return status;
  442 }
  443 
  444 /**
  445  *  ixgbe_read_phy_reg - Read PHY register
  446  *  @hw: pointer to hardware structure
  447  *  @reg_addr: 32 bit address of PHY register to read
  448  *  @phy_data: Pointer to read data from PHY register
  449  *
  450  *  Reads a value from a specified PHY register
  451  **/
  452 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
  453                        u16 *phy_data)
  454 {
  455         if (hw->phy.id == 0)
  456                 ixgbe_identify_phy(hw);
  457 
  458         return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
  459                                device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
  460 }
  461 
  462 /**
  463  *  ixgbe_write_phy_reg - Write PHY register
  464  *  @hw: pointer to hardware structure
  465  *  @reg_addr: 32 bit PHY register to write
  466  *  @phy_data: Data to write to the PHY register
  467  *
  468  *  Writes a value to specified PHY register
  469  **/
  470 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
  471                         u16 phy_data)
  472 {
  473         if (hw->phy.id == 0)
  474                 ixgbe_identify_phy(hw);
  475 
  476         return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
  477                                device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
  478 }
  479 
  480 /**
  481  *  ixgbe_setup_phy_link - Restart PHY autoneg
  482  *  @hw: pointer to hardware structure
  483  *
  484  *  Restart autonegotiation and PHY and waits for completion.
  485  **/
  486 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
  487 {
  488         return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
  489                                IXGBE_NOT_IMPLEMENTED);
  490 }
  491 
  492 /**
  493  *  ixgbe_check_phy_link - Determine link and speed status
  494  *  @hw: pointer to hardware structure
  495  *
  496  *  Reads a PHY register to determine if link is up and the current speed for
  497  *  the PHY.
  498  **/
  499 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  500                          bool *link_up)
  501 {
  502         return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
  503                                link_up), IXGBE_NOT_IMPLEMENTED);
  504 }
  505 
  506 /**
  507  *  ixgbe_setup_phy_link_speed - Set auto advertise
  508  *  @hw: pointer to hardware structure
  509  *  @speed: new link speed
  510  *  @autoneg: TRUE if autonegotiation enabled
  511  *
  512  *  Sets the auto advertised capabilities
  513  **/
  514 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
  515                                bool autoneg,
  516                                bool autoneg_wait_to_complete)
  517 {
  518         return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
  519                                autoneg, autoneg_wait_to_complete),
  520                                IXGBE_NOT_IMPLEMENTED);
  521 }
  522 
  523 /**
  524  *  ixgbe_check_link - Get link and speed status
  525  *  @hw: pointer to hardware structure
  526  *
  527  *  Reads the links register to determine if link is up and the current speed
  528  **/
  529 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  530                      bool *link_up, bool link_up_wait_to_complete)
  531 {
  532         return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
  533                                link_up, link_up_wait_to_complete),
  534                                IXGBE_NOT_IMPLEMENTED);
  535 }
  536 
  537 /**
  538  *  ixgbe_disable_tx_laser - Disable Tx laser
  539  *  @hw: pointer to hardware structure
  540  *
  541  *  If the driver needs to disable the laser on SFI optics.
  542  **/
  543 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
  544 {
  545         if (hw->mac.ops.disable_tx_laser)
  546                 hw->mac.ops.disable_tx_laser(hw);
  547 }
  548 
  549 /**
  550  *  ixgbe_enable_tx_laser - Enable Tx laser
  551  *  @hw: pointer to hardware structure
  552  *
  553  *  If the driver needs to enable the laser on SFI optics.
  554  **/
  555 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
  556 {
  557         if (hw->mac.ops.enable_tx_laser)
  558                 hw->mac.ops.enable_tx_laser(hw);
  559 }
  560 
  561 /**
  562  *  ixgbe_flap_tx_laser - flap Tx laser to start autotry process
  563  *  @hw: pointer to hardware structure
  564  *
  565  *  When the driver changes the link speeds that it can support then
  566  *  flap the tx laser to alert the link partner to start autotry
  567  *  process on its end.
  568  **/
  569 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
  570 {
  571         if (hw->mac.ops.flap_tx_laser)
  572                 hw->mac.ops.flap_tx_laser(hw);
  573 }
  574 
  575 /**
  576  *  ixgbe_setup_link - Set link speed
  577  *  @hw: pointer to hardware structure
  578  *  @speed: new link speed
  579  *  @autoneg: TRUE if autonegotiation enabled
  580  *
  581  *  Configures link settings.  Restarts the link.
  582  *  Performs autonegotiation if needed.
  583  **/
  584 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
  585                      bool autoneg,
  586                      bool autoneg_wait_to_complete)
  587 {
  588         return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
  589                                autoneg, autoneg_wait_to_complete),
  590                                IXGBE_NOT_IMPLEMENTED);
  591 }
  592 
  593 /**
  594  *  ixgbe_get_link_capabilities - Returns link capabilities
  595  *  @hw: pointer to hardware structure
  596  *
  597  *  Determines the link capabilities of the current configuration.
  598  **/
  599 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  600                                 bool *autoneg)
  601 {
  602         return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
  603                                speed, autoneg), IXGBE_NOT_IMPLEMENTED);
  604 }
  605 
  606 /**
  607  *  ixgbe_led_on - Turn on LEDs
  608  *  @hw: pointer to hardware structure
  609  *  @index: led number to turn on
  610  *
  611  *  Turns on the software controllable LEDs.
  612  **/
  613 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
  614 {
  615         return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
  616                                IXGBE_NOT_IMPLEMENTED);
  617 }
  618 
  619 /**
  620  *  ixgbe_led_off - Turn off LEDs
  621  *  @hw: pointer to hardware structure
  622  *  @index: led number to turn off
  623  *
  624  *  Turns off the software controllable LEDs.
  625  **/
  626 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
  627 {
  628         return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
  629                                IXGBE_NOT_IMPLEMENTED);
  630 }
  631 
  632 /**
  633  *  ixgbe_blink_led_start - Blink LEDs
  634  *  @hw: pointer to hardware structure
  635  *  @index: led number to blink
  636  *
  637  *  Blink LED based on index.
  638  **/
  639 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
  640 {
  641         return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
  642                                IXGBE_NOT_IMPLEMENTED);
  643 }
  644 
  645 /**
  646  *  ixgbe_blink_led_stop - Stop blinking LEDs
  647  *  @hw: pointer to hardware structure
  648  *
  649  *  Stop blinking LED based on index.
  650  **/
  651 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
  652 {
  653         return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
  654                                IXGBE_NOT_IMPLEMENTED);
  655 }
  656 
  657 /**
  658  *  ixgbe_init_eeprom_params - Initialize EEPROM parameters
  659  *  @hw: pointer to hardware structure
  660  *
  661  *  Initializes the EEPROM parameters ixgbe_eeprom_info within the
  662  *  ixgbe_hw struct in order to set up EEPROM access.
  663  **/
  664 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
  665 {
  666         return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
  667                                IXGBE_NOT_IMPLEMENTED);
  668 }
  669 
  670 
  671 /**
  672  *  ixgbe_write_eeprom - Write word to EEPROM
  673  *  @hw: pointer to hardware structure
  674  *  @offset: offset within the EEPROM to be written to
  675  *  @data: 16 bit word to be written to the EEPROM
  676  *
  677  *  Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
  678  *  called after this function, the EEPROM will most likely contain an
  679  *  invalid checksum.
  680  **/
  681 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
  682 {
  683         return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
  684                                IXGBE_NOT_IMPLEMENTED);
  685 }
  686 
  687 /**
  688  *  ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
  689  *  @hw: pointer to hardware structure
  690  *  @offset: offset within the EEPROM to be written to
  691  *  @data: 16 bit word(s) to be written to the EEPROM
  692  *  @words: number of words
  693  *
  694  *  Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
  695  *  called after this function, the EEPROM will most likely contain an
  696  *  invalid checksum.
  697  **/
  698 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
  699                               u16 *data)
  700 {
  701         return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
  702                                (hw, offset, words, data),
  703                                IXGBE_NOT_IMPLEMENTED);
  704 }
  705 
  706 /**
  707  *  ixgbe_read_eeprom - Read word from EEPROM
  708  *  @hw: pointer to hardware structure
  709  *  @offset: offset within the EEPROM to be read
  710  *  @data: read 16 bit value from EEPROM
  711  *
  712  *  Reads 16 bit value from EEPROM
  713  **/
  714 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
  715 {
  716         return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
  717                                IXGBE_NOT_IMPLEMENTED);
  718 }
  719 
  720 /**
  721  *  ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
  722  *  @hw: pointer to hardware structure
  723  *  @offset: offset within the EEPROM to be read
  724  *  @data: read 16 bit word(s) from EEPROM
  725  *  @words: number of words
  726  *
  727  *  Reads 16 bit word(s) from EEPROM
  728  **/
  729 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
  730                              u16 words, u16 *data)
  731 {
  732         return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
  733                                (hw, offset, words, data),
  734                                IXGBE_NOT_IMPLEMENTED);
  735 }
  736 
  737 /**
  738  *  ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
  739  *  @hw: pointer to hardware structure
  740  *  @checksum_val: calculated checksum
  741  *
  742  *  Performs checksum calculation and validates the EEPROM checksum
  743  **/
  744 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
  745 {
  746         return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
  747                                (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
  748 }
  749 
  750 /**
  751  *  ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
  752  *  @hw: pointer to hardware structure
  753  **/
  754 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
  755 {
  756         return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
  757                                IXGBE_NOT_IMPLEMENTED);
  758 }
  759 
  760 /**
  761  *  ixgbe_insert_mac_addr - Find a RAR for this mac address
  762  *  @hw: pointer to hardware structure
  763  *  @addr: Address to put into receive address register
  764  *  @vmdq: VMDq pool to assign
  765  *
  766  *  Puts an ethernet address into a receive address register, or
  767  *  finds the rar that it is aleady in; adds to the pool list
  768  **/
  769 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
  770 {
  771         return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
  772                                (hw, addr, vmdq),
  773                                IXGBE_NOT_IMPLEMENTED);
  774 }
  775 
  776 /**
  777  *  ixgbe_set_rar - Set Rx address register
  778  *  @hw: pointer to hardware structure
  779  *  @index: Receive address register to write
  780  *  @addr: Address to put into receive address register
  781  *  @vmdq: VMDq "set"
  782  *  @enable_addr: set flag that address is active
  783  *
  784  *  Puts an ethernet address into a receive address register.
  785  **/
  786 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  787                   u32 enable_addr)
  788 {
  789         return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
  790                                enable_addr), IXGBE_NOT_IMPLEMENTED);
  791 }
  792 
  793 /**
  794  *  ixgbe_clear_rar - Clear Rx address register
  795  *  @hw: pointer to hardware structure
  796  *  @index: Receive address register to write
  797  *
  798  *  Puts an ethernet address into a receive address register.
  799  **/
  800 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
  801 {
  802         return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
  803                                IXGBE_NOT_IMPLEMENTED);
  804 }
  805 
  806 /**
  807  *  ixgbe_set_vmdq - Associate a VMDq index with a receive address
  808  *  @hw: pointer to hardware structure
  809  *  @rar: receive address register index to associate with VMDq index
  810  *  @vmdq: VMDq set or pool index
  811  **/
  812 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
  813 {
  814         return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
  815                                IXGBE_NOT_IMPLEMENTED);
  816 
  817 }
  818 
  819 /**
  820  *  ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
  821  *  @hw: pointer to hardware structure
  822  *  @vmdq: VMDq default pool index
  823  **/
  824 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
  825 {
  826         return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
  827                                (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
  828 }
  829 
  830 /**
  831  *  ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
  832  *  @hw: pointer to hardware structure
  833  *  @rar: receive address register index to disassociate with VMDq index
  834  *  @vmdq: VMDq set or pool index
  835  **/
  836 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
  837 {
  838         return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
  839                                IXGBE_NOT_IMPLEMENTED);
  840 }
  841 
  842 /**
  843  *  ixgbe_init_rx_addrs - Initializes receive address filters.
  844  *  @hw: pointer to hardware structure
  845  *
  846  *  Places the MAC address in receive address register 0 and clears the rest
  847  *  of the receive address registers. Clears the multicast table. Assumes
  848  *  the receiver is in reset when the routine is called.
  849  **/
  850 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
  851 {
  852         return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
  853                                IXGBE_NOT_IMPLEMENTED);
  854 }
  855 
  856 /**
  857  *  ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
  858  *  @hw: pointer to hardware structure
  859  **/
  860 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
  861 {
  862         return hw->mac.num_rar_entries;
  863 }
  864 
  865 /**
  866  *  ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
  867  *  @hw: pointer to hardware structure
  868  *  @addr_list: the list of new multicast addresses
  869  *  @addr_count: number of addresses
  870  *  @func: iterator function to walk the multicast address list
  871  *
  872  *  The given list replaces any existing list. Clears the secondary addrs from
  873  *  receive address registers. Uses unused receive address registers for the
  874  *  first secondary addresses, and falls back to promiscuous mode as needed.
  875  **/
  876 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
  877                               u32 addr_count, ixgbe_mc_addr_itr func)
  878 {
  879         return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
  880                                addr_list, addr_count, func),
  881                                IXGBE_NOT_IMPLEMENTED);
  882 }
  883 
  884 /**
  885  *  ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
  886  *  @hw: pointer to hardware structure
  887  *  @mc_addr_list: the list of new multicast addresses
  888  *  @mc_addr_count: number of addresses
  889  *  @func: iterator function to walk the multicast address list
  890  *
  891  *  The given list replaces any existing list. Clears the MC addrs from receive
  892  *  address registers and the multicast table. Uses unused receive address
  893  *  registers for the first multicast addresses, and hashes the rest into the
  894  *  multicast table.
  895  **/
  896 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
  897                               u32 mc_addr_count, ixgbe_mc_addr_itr func,
  898                               bool clear)
  899 {
  900         return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
  901                                mc_addr_list, mc_addr_count, func, clear),
  902                                IXGBE_NOT_IMPLEMENTED);
  903 }
  904 
  905 /**
  906  *  ixgbe_enable_mc - Enable multicast address in RAR
  907  *  @hw: pointer to hardware structure
  908  *
  909  *  Enables multicast address in RAR and the use of the multicast hash table.
  910  **/
  911 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
  912 {
  913         return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
  914                                IXGBE_NOT_IMPLEMENTED);
  915 }
  916 
  917 /**
  918  *  ixgbe_disable_mc - Disable multicast address in RAR
  919  *  @hw: pointer to hardware structure
  920  *
  921  *  Disables multicast address in RAR and the use of the multicast hash table.
  922  **/
  923 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
  924 {
  925         return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
  926                                IXGBE_NOT_IMPLEMENTED);
  927 }
  928 
  929 /**
  930  *  ixgbe_clear_vfta - Clear VLAN filter table
  931  *  @hw: pointer to hardware structure
  932  *
  933  *  Clears the VLAN filer table, and the VMDq index associated with the filter
  934  **/
  935 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
  936 {
  937         return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
  938                                IXGBE_NOT_IMPLEMENTED);
  939 }
  940 
  941 /**
  942  *  ixgbe_set_vfta - Set VLAN filter table
  943  *  @hw: pointer to hardware structure
  944  *  @vlan: VLAN id to write to VLAN filter
  945  *  @vind: VMDq output index that maps queue to VLAN id in VFTA
  946  *  @vlan_on: boolean flag to turn on/off VLAN in VFTA
  947  *
  948  *  Turn on/off specified VLAN in the VLAN filter table.
  949  **/
  950 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
  951 {
  952         return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
  953                                vlan_on), IXGBE_NOT_IMPLEMENTED);
  954 }
  955 
  956 /**
  957  *  ixgbe_set_vlvf - Set VLAN Pool Filter
  958  *  @hw: pointer to hardware structure
  959  *  @vlan: VLAN id to write to VLAN filter
  960  *  @vind: VMDq output index that maps queue to VLAN id in VFVFB
  961  *  @vlan_on: boolean flag to turn on/off VLAN in VFVF
  962  *  @vfta_changed: pointer to boolean flag which indicates whether VFTA
  963  *                 should be changed
  964  *
  965  *  Turn on/off specified bit in VLVF table.
  966  **/
  967 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
  968                     bool *vfta_changed)
  969 {
  970         return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
  971                                vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
  972 }
  973 
  974 /**
  975  *  ixgbe_fc_enable - Enable flow control
  976  *  @hw: pointer to hardware structure
  977  *
  978  *  Configures the flow control settings based on SW configuration.
  979  **/
  980 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
  981 {
  982         return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
  983                                IXGBE_NOT_IMPLEMENTED);
  984 }
  985 
  986 /**
  987  * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
  988  * @hw: pointer to hardware structure
  989  * @maj: driver major number to be sent to firmware
  990  * @min: driver minor number to be sent to firmware
  991  * @build: driver build number to be sent to firmware
  992  * @ver: driver version number to be sent to firmware
  993  **/
  994 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
  995                          u8 ver)
  996 {
  997         return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
  998                                build, ver), IXGBE_NOT_IMPLEMENTED);
  999 }
 1000 
 1001 
 1002 /**
 1003  *  ixgbe_read_analog_reg8 - Reads 8 bit analog register
 1004  *  @hw: pointer to hardware structure
 1005  *  @reg: analog register to read
 1006  *  @val: read value
 1007  *
 1008  *  Performs write operation to analog register specified.
 1009  **/
 1010 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
 1011 {
 1012         return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
 1013                                val), IXGBE_NOT_IMPLEMENTED);
 1014 }
 1015 
 1016 /**
 1017  *  ixgbe_write_analog_reg8 - Writes 8 bit analog register
 1018  *  @hw: pointer to hardware structure
 1019  *  @reg: analog register to write
 1020  *  @val: value to write
 1021  *
 1022  *  Performs write operation to Atlas analog register specified.
 1023  **/
 1024 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
 1025 {
 1026         return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
 1027                                val), IXGBE_NOT_IMPLEMENTED);
 1028 }
 1029 
 1030 /**
 1031  *  ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
 1032  *  @hw: pointer to hardware structure
 1033  *
 1034  *  Initializes the Unicast Table Arrays to zero on device load.  This
 1035  *  is part of the Rx init addr execution path.
 1036  **/
 1037 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
 1038 {
 1039         return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
 1040                                IXGBE_NOT_IMPLEMENTED);
 1041 }
 1042 
 1043 /**
 1044  *  ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
 1045  *  @hw: pointer to hardware structure
 1046  *  @byte_offset: byte offset to read
 1047  *  @data: value read
 1048  *
 1049  *  Performs byte read operation to SFP module's EEPROM over I2C interface.
 1050  **/
 1051 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
 1052                         u8 *data)
 1053 {
 1054         return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
 1055                                dev_addr, data), IXGBE_NOT_IMPLEMENTED);
 1056 }
 1057 
 1058 /**
 1059  *  ixgbe_write_i2c_byte - Writes 8 bit word over I2C
 1060  *  @hw: pointer to hardware structure
 1061  *  @byte_offset: byte offset to write
 1062  *  @data: value to write
 1063  *
 1064  *  Performs byte write operation to SFP module's EEPROM over I2C interface
 1065  *  at a specified device address.
 1066  **/
 1067 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
 1068                          u8 data)
 1069 {
 1070         return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
 1071                                dev_addr, data), IXGBE_NOT_IMPLEMENTED);
 1072 }
 1073 
 1074 /**
 1075  *  ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
 1076  *  @hw: pointer to hardware structure
 1077  *  @byte_offset: EEPROM byte offset to write
 1078  *  @eeprom_data: value to write
 1079  *
 1080  *  Performs byte write operation to SFP module's EEPROM over I2C interface.
 1081  **/
 1082 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
 1083                            u8 byte_offset, u8 eeprom_data)
 1084 {
 1085         return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
 1086                                (hw, byte_offset, eeprom_data),
 1087                                IXGBE_NOT_IMPLEMENTED);
 1088 }
 1089 
 1090 /**
 1091  *  ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
 1092  *  @hw: pointer to hardware structure
 1093  *  @byte_offset: EEPROM byte offset to read
 1094  *  @eeprom_data: value read
 1095  *
 1096  *  Performs byte read operation to SFP module's EEPROM over I2C interface.
 1097  **/
 1098 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
 1099 {
 1100         return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
 1101                               (hw, byte_offset, eeprom_data),
 1102                               IXGBE_NOT_IMPLEMENTED);
 1103 }
 1104 
 1105 /**
 1106  *  ixgbe_get_supported_physical_layer - Returns physical layer type
 1107  *  @hw: pointer to hardware structure
 1108  *
 1109  *  Determines physical layer capabilities of the current configuration.
 1110  **/
 1111 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
 1112 {
 1113         return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
 1114                                (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
 1115 }
 1116 
 1117 /**
 1118  *  ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
 1119  *  @hw: pointer to hardware structure
 1120  *  @regval: bitfield to write to the Rx DMA register
 1121  *
 1122  *  Enables the Rx DMA unit of the device.
 1123  **/
 1124 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
 1125 {
 1126         return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
 1127                                (hw, regval), IXGBE_NOT_IMPLEMENTED);
 1128 }
 1129 
 1130 /**
 1131  *  ixgbe_disable_sec_rx_path - Stops the receive data path
 1132  *  @hw: pointer to hardware structure
 1133  *
 1134  *  Stops the receive data path.
 1135  **/
 1136 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
 1137 {
 1138         return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
 1139                                 (hw), IXGBE_NOT_IMPLEMENTED);
 1140 }
 1141 
 1142 /**
 1143  *  ixgbe_enable_sec_rx_path - Enables the receive data path
 1144  *  @hw: pointer to hardware structure
 1145  *
 1146  *  Enables the receive data path.
 1147  **/
 1148 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
 1149 {
 1150         return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
 1151                                 (hw), IXGBE_NOT_IMPLEMENTED);
 1152 }
 1153 
 1154 /**
 1155  *  ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
 1156  *  @hw: pointer to hardware structure
 1157  *  @mask: Mask to specify which semaphore to acquire
 1158  *
 1159  *  Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
 1160  *  function (CSR, PHY0, PHY1, EEPROM, Flash)
 1161  **/
 1162 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
 1163 {
 1164         return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
 1165                                (hw, mask), IXGBE_NOT_IMPLEMENTED);
 1166 }
 1167 
 1168 /**
 1169  *  ixgbe_release_swfw_semaphore - Release SWFW semaphore
 1170  *  @hw: pointer to hardware structure
 1171  *  @mask: Mask to specify which semaphore to release
 1172  *
 1173  *  Releases the SWFW semaphore through SW_FW_SYNC register for the specified
 1174  *  function (CSR, PHY0, PHY1, EEPROM, Flash)
 1175  **/
 1176 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
 1177 {
 1178         if (hw->mac.ops.release_swfw_sync)
 1179                 hw->mac.ops.release_swfw_sync(hw, mask);
 1180 }
 1181 

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