dcphy.c

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    1 /*
    2  * Copyright (c) 1997, 1998, 1999
    3  *      Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. All advertising materials mentioning features or use of this software
   14  *    must display the following acknowledgement:
   15  *      This product includes software developed by Bill Paul.
   16  * 4. Neither the name of the author nor the names of any co-contributors
   17  *    may be used to endorse or promote products derived from this software
   18  *    without specific prior written permission.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
   21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
   24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   30  * THE POSSIBILITY OF SUCH DAMAGE.
   31  *
   32  * $FreeBSD: src/sys/dev/mii/dcphy.c,v 1.2.2.2 2000/10/14 00:44:40 wpaul Exp $
   33  */
   34 
   35 /*
   36  * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
   37  * controllers. Technically we're abusing the miibus code to handle
   38  * media selection and NWAY support here since there is no MII
   39  * interface. However the logical operations are roughly the same,
   40  * and the alternative is to create a fake MII interface in the driver,
   41  * which is harder to do.
   42  */
   43 
   44 #include <sys/param.h>
   45 #include <sys/systm.h>
   46 #include <sys/kernel.h>
   47 #include <sys/socket.h>
   48 #include <sys/errno.h>
   49 #include <sys/module.h>
   50 #include <sys/bus.h>
   51 
   52 #include <net/if.h>
   53 #include <net/if_arp.h>
   54 #include <net/if_media.h>
   55 #include <net/if_poll.h>
   56 
   57 #include "mii.h"
   58 #include "miivar.h"
   59 #include "miidevs.h"
   60 
   61 #include <bus/pci/pcivar.h>
   62 #include "../dc/if_dcreg.h"
   63 
   64 #include "miibus_if.h"
   65 
   66 #define DC_SETBIT(sc, reg, x)                           \
   67         CSR_WRITE_4(sc, reg,                            \
   68                 CSR_READ_4(sc, reg) | x)
   69 
   70 #define DC_CLRBIT(sc, reg, x)                           \
   71         CSR_WRITE_4(sc, reg,                            \
   72                 CSR_READ_4(sc, reg) & ~x)
   73 
   74 #define MIIF_AUTOTIMEOUT        0x0004
   75 
   76 /*
   77  * This is the subsystem ID for the built-in 21143 ethernet
   78  * in several Compaq Presario systems. Apparently these are
   79  * 10Mbps only, so we need to treat them specially.
   80  */
   81 #define COMPAQ_PRESARIO_ID      0xb0bb0e11
   82 
   83 static int dcphy_probe          (device_t);
   84 static int dcphy_attach         (device_t);
   85 
   86 static device_method_t dcphy_methods[] = {
   87         /* device interface */
   88         DEVMETHOD(device_probe,         dcphy_probe),
   89         DEVMETHOD(device_attach,        dcphy_attach),
   90         DEVMETHOD(device_detach,        ukphy_detach),
   91         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
   92         DEVMETHOD_END
   93 };
   94 
   95 static devclass_t dcphy_devclass;
   96 
   97 static driver_t dcphy_driver = {
   98         "dcphy",
   99         dcphy_methods,
  100         sizeof(struct mii_softc)
  101 };
  102 
  103 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, NULL, NULL);
  104 
  105 static int      dcphy_service(struct mii_softc *, struct mii_data *, int);
  106 static void     dcphy_status(struct mii_softc *);
  107 static void     dcphy_auto(struct mii_softc *);
  108 static void     dcphy_reset(struct mii_softc *);
  109 
  110 static int
  111 dcphy_probe(device_t dev)
  112 {
  113         struct mii_attach_args *ma;
  114 
  115         ma = device_get_ivars(dev);
  116 
  117         /*
  118          * The dc driver will report the 21143 vendor and device
  119          * ID to let us know that it wants us to attach.
  120          */
  121         if (ma->mii_id1 != DC_VENDORID_DEC ||
  122             ma->mii_id2 != DC_DEVICEID_21143)
  123                 return(ENXIO);
  124 
  125         device_set_desc(dev, "Intel 21143 NWAY media interface");
  126 
  127         return (0);
  128 }
  129 
  130 static int
  131 dcphy_attach(device_t dev)
  132 {
  133         struct mii_softc *sc;
  134         struct mii_attach_args *ma;
  135         struct mii_data *mii;
  136         struct dc_softc         *dc_sc;
  137 
  138         sc = device_get_softc(dev);
  139         ma = device_get_ivars(dev);
  140         mii_softc_init(sc, ma);
  141         sc->mii_dev = device_get_parent(dev);
  142         mii = device_get_softc(sc->mii_dev);
  143         LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
  144 
  145         sc->mii_inst = mii->mii_instance;
  146         sc->mii_service = dcphy_service;
  147         sc->mii_reset = dcphy_reset;
  148         sc->mii_anegticks = 50;
  149         sc->mii_pdata = mii;
  150 
  151         sc->mii_flags |= MIIF_NOISOLATE;
  152         mii->mii_instance++;
  153 
  154         /*dcphy_reset(sc);*/
  155         dc_sc = mii->mii_ifp->if_softc;
  156         CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
  157         CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
  158 
  159         switch(pci_read_config(device_get_parent(sc->mii_dev),
  160             DC_PCI_CSID, 4)) {
  161         case COMPAQ_PRESARIO_ID:
  162                 /* Example of how to only allow 10Mbps modes. */
  163                 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
  164                 break;
  165         default:
  166                 if (dc_sc->dc_pmode == DC_PMODE_SIA) {
  167                         sc->mii_capabilities =
  168                             BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
  169                 } else {
  170 #define ADD(m, c)       ifmedia_add(&mii->mii_media, (m), (c), NULL)
  171 
  172                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
  173                             sc->mii_inst), MII_MEDIA_100_TX);
  174 
  175 #undef ADD
  176 
  177                         sc->mii_capabilities =
  178                             BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX|
  179                             BMSR_10TFDX|BMSR_10THDX;
  180                 }
  181                 break;
  182         }
  183 
  184 #ifdef notyet
  185         if (dc_sc->dc_type == DC_TYPE_21145)
  186                 sc->mii_capabilities = BMSR_10THDX;
  187 #endif
  188 
  189         sc->mii_capabilities &= ma->mii_capmask;
  190         device_printf(dev, " ");
  191         if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
  192                 kprintf("no media present");
  193         else
  194                 mii_phy_add_media(sc);
  195         kprintf("\n");
  196 
  197         MIIBUS_MEDIAINIT(sc->mii_dev);
  198         return(0);
  199 }
  200 
  201 static int
  202 dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
  203 {
  204         struct dc_softc         *dc_sc;
  205         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  206         int reg;
  207         u_int32_t               mode;
  208 
  209         dc_sc = mii->mii_ifp->if_softc;
  210 
  211         switch (cmd) {
  212         case MII_POLLSTAT:
  213                 /*
  214                  * If we're not polling our PHY instance, just return.
  215                  */
  216                 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
  217                         return (0);
  218                 }
  219                 break;
  220 
  221         case MII_MEDIACHG:
  222                 /*
  223                  * If the media indicates a different PHY instance,
  224                  * isolate ourselves. XXX how?
  225                  */
  226                 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
  227                         return (0);
  228                 }
  229 
  230                 /*
  231                  * If the interface is not up, don't do anything.
  232                  */
  233                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  234                         break;
  235 
  236                 sc->mii_flags = 0;
  237                 mii->mii_media_active = IFM_NONE;
  238                 mode = CSR_READ_4(dc_sc, DC_NETCFG);
  239                 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL|
  240                     DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL);
  241 
  242                 switch (IFM_SUBTYPE(ife->ifm_media)) {
  243                 case IFM_AUTO:
  244                         /*dcphy_reset(sc);*/
  245                         dcphy_auto(sc);
  246                         break;
  247                 case IFM_100_T4:
  248                         /*
  249                          * XXX Not supported as a manual setting right now.
  250                          */
  251                         return (EINVAL);
  252                 case IFM_100_TX:
  253                         dcphy_reset(sc);
  254                         DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
  255                         mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS|
  256                             DC_NETCFG_SCRAMBLER;
  257                         if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
  258                                 mode |= DC_NETCFG_FULLDUPLEX;
  259                         else
  260                                 mode &= ~DC_NETCFG_FULLDUPLEX;
  261                         CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
  262                         break;
  263                 case IFM_10_T:
  264                         DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
  265                         DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
  266                         if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
  267                                 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
  268                         else
  269                                 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
  270                         DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
  271                         DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
  272                         mode &= ~DC_NETCFG_PORTSEL;
  273                         mode |= DC_NETCFG_SPEEDSEL;
  274                         if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
  275                                 mode |= DC_NETCFG_FULLDUPLEX;
  276                         else
  277                                 mode &= ~DC_NETCFG_FULLDUPLEX;
  278                         CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
  279                         break;
  280                 default:
  281                         return(EINVAL);
  282                 }
  283                 break;
  284 
  285         case MII_TICK:
  286                 /*
  287                  * If we're not currently selected, just return.
  288                  */
  289                 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
  290                         return (0);
  291 
  292                 /*
  293                  * Is the interface even up?
  294                  */
  295                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  296                         return (0);
  297 
  298                 /*
  299                  * Only used for autonegotiation.
  300                  */
  301                 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
  302                         break;
  303 
  304                 reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
  305                 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
  306                         return(0);
  307 
  308                 /*
  309                  * Only retry autonegotiation every mii_anegticks seconds.
  310                  *
  311                  * Otherwise, fall through to calling dcphy_status()
  312                  * since real Intel 21143 chips don't show valid link
  313                  * status until autonegotiation is switched off, and
  314                  * that only happens in dcphy_status().  Without this,
  315                  * successful autonegotation is never recognised on
  316                  * these chips.
  317                  */
  318                 if (++sc->mii_ticks <= sc->mii_anegticks)
  319                         break;
  320 
  321                 sc->mii_ticks = 0;
  322                 dcphy_auto(sc);
  323 
  324                 break;
  325         }
  326 
  327         /* Update the media status. */
  328         dcphy_status(sc);
  329 
  330         /* Callback if something changed. */
  331         mii_phy_update(sc, cmd);
  332         return (0);
  333 }
  334 
  335 static void
  336 dcphy_status(struct mii_softc *sc)
  337 {
  338         struct mii_data *mii = sc->mii_pdata;
  339         int reg, anlpar, tstat = 0;
  340         struct dc_softc         *dc_sc;
  341 
  342         dc_sc = mii->mii_ifp->if_softc;
  343 
  344         mii->mii_media_status = IFM_AVALID;
  345         mii->mii_media_active = IFM_ETHER;
  346 
  347         if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  348                 return;
  349 
  350         reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
  351         if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
  352                 mii->mii_media_status |= IFM_ACTIVE;
  353 
  354         if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
  355                 /* Erg, still trying, I guess... */
  356                 tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
  357                 if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
  358                         if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
  359                             (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
  360                                 goto skip;
  361                         mii->mii_media_active |= IFM_NONE;
  362                         return;
  363                 }
  364 
  365                 if (tstat & DC_TSTAT_LP_CAN_NWAY) {
  366                         anlpar = tstat >> 16;
  367                         if (anlpar & ANLPAR_T4 &&
  368                             sc->mii_capabilities & BMSR_100TXHDX)
  369                                 mii->mii_media_active |= IFM_100_T4;
  370                         else if (anlpar & ANLPAR_TX_FD &&
  371                             sc->mii_capabilities & BMSR_100TXFDX)
  372                                 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
  373                         else if (anlpar & ANLPAR_TX &&
  374                             sc->mii_capabilities & BMSR_100TXHDX)
  375                                 mii->mii_media_active |= IFM_100_TX;
  376                         else if (anlpar & ANLPAR_10_FD)
  377                                 mii->mii_media_active |= IFM_10_T|IFM_FDX;
  378                         else if (anlpar & ANLPAR_10)
  379                                 mii->mii_media_active |= IFM_10_T;
  380                         else
  381                                 mii->mii_media_active |= IFM_NONE;
  382                         if (DC_IS_INTEL(dc_sc))
  383                                 DC_CLRBIT(dc_sc, DC_10BTCTRL,
  384                                     DC_TCTL_AUTONEGENBL);
  385                         return;
  386                 }
  387                 /*
  388                  * If the other side doesn't support NWAY, then the
  389                  * best we can do is determine if we have a 10Mbps or
  390                  * 100Mbps link. There's no way to know if the link 
  391                  * is full or half duplex, so we default to half duplex
  392                  * and hope that the user is clever enough to manually
  393                  * change the media settings if we're wrong.
  394                  */
  395                 if (!(reg & DC_TSTAT_LS100))
  396                         mii->mii_media_active |= IFM_100_TX;
  397                 else if (!(reg & DC_TSTAT_LS10))
  398                         mii->mii_media_active |= IFM_10_T;
  399                 else
  400                         mii->mii_media_active |= IFM_NONE;
  401                 if (DC_IS_INTEL(dc_sc))
  402                         DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
  403                 return;
  404         }
  405 
  406 skip:
  407 
  408         if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
  409                 mii->mii_media_active |= IFM_10_T;
  410         else
  411                 mii->mii_media_active |= IFM_100_TX;
  412         if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
  413                 mii->mii_media_active |= IFM_FDX;
  414 
  415         return;
  416 }
  417 
  418 static void
  419 dcphy_auto(struct mii_softc *sc)
  420 {
  421         struct dc_softc *dc_sc = sc->mii_pdata->mii_ifp->if_softc;
  422 
  423         DC_CLRBIT(dc_sc, DC_NETCFG, DC_NETCFG_PORTSEL);
  424         DC_SETBIT(dc_sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
  425         DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
  426         if (sc->mii_capabilities & BMSR_100TXHDX)
  427                 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0x3FFFF);
  428         else
  429                 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0xFFFF);
  430         DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
  431         DC_SETBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
  432         DC_SETBIT(dc_sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
  433 }
  434 
  435 static void
  436 dcphy_reset(struct mii_softc *sc)
  437 {
  438         struct dc_softc *dc_sc = sc->mii_pdata->mii_ifp->if_softc;
  439 
  440         DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
  441         DELAY(1000);
  442         DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
  443 }
Cache object: 3424f122c1cd8f5feb372a12325a964d
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FreeBSD/Linux Kernel Cross Reference sys/dev/netif/mii_layer/dcphy.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/netif/mii_layer/dcphy.c
