mii_physubr.c

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    1 /*      $NetBSD: mii_physubr.c,v 1.49 2006/03/29 07:05:24 thorpej Exp $ */
    2 
    3 /*-
    4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
    9  * NASA Ames Research Center.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *      This product includes software developed by the NetBSD
   22  *      Foundation, Inc. and its contributors.
   23  * 4. Neither the name of The NetBSD Foundation nor the names of its
   24  *    contributors may be used to endorse or promote products derived
   25  *    from this software without specific prior written permission.
   26  *
   27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   37  * POSSIBILITY OF SUCH DAMAGE.
   38  *
   39  * $FreeBSD: src/sys/dev/mii/mii_physubr.c,v 1.2.2.1 2000/12/12 19:29:14 wpaul Exp $
   40  */
   41 
   42 /*
   43  * Subroutines common to all PHYs.
   44  */
   45 
   46 #include <sys/param.h>
   47 #include <sys/systm.h>
   48 #include <sys/kernel.h>
   49 #include <sys/socket.h>
   50 #include <sys/errno.h>
   51 #include <sys/module.h>
   52 #include <sys/bus.h>
   53 #include <sys/thread2.h>
   54 
   55 #include <net/if.h>
   56 #include <net/if_media.h>
   57 
   58 #include "mii.h"
   59 #include "miivar.h"
   60 
   61 #include "miibus_if.h"
   62 
   63 const struct mii_media  mii_media_table[MII_NMEDIA] = {
   64         [MII_MEDIA_NONE]        = { .mm_bmcr = BMCR_ISO,
   65                                     .mm_anar = ANAR_CSMA,
   66                                     .mm_gtcr = 0 },
   67 
   68         [MII_MEDIA_10_T]        = { .mm_bmcr = BMCR_S10,
   69                                     .mm_anar = ANAR_CSMA | ANAR_10,
   70                                     .mm_gtcr = 0 },
   71 
   72         [MII_MEDIA_10_T_FDX]    = { .mm_bmcr = BMCR_S10 | BMCR_FDX,
   73                                     .mm_anar = ANAR_CSMA | ANAR_10_FD,
   74                                     .mm_gtcr = 0 },
   75 
   76         [MII_MEDIA_100_T4]      = { .mm_bmcr = BMCR_S100,
   77                                     .mm_anar = ANAR_CSMA | ANAR_T4,
   78                                     .mm_gtcr = 0 },
   79 
   80         [MII_MEDIA_100_TX]      = { .mm_bmcr = BMCR_S100,
   81                                     .mm_anar = ANAR_CSMA | ANAR_TX,
   82                                     .mm_gtcr = 0 },
   83 
   84         [MII_MEDIA_100_TX_FDX]  = { .mm_bmcr = BMCR_S100 | BMCR_FDX,
   85                                     .mm_anar = ANAR_CSMA | ANAR_TX_FD,
   86                                     .mm_gtcr = 0 },
   87 
   88         [MII_MEDIA_1000_X]      = { .mm_bmcr = BMCR_S1000,
   89                                     .mm_anar = ANAR_CSMA,
   90                                     .mm_gtcr = 0 },
   91 
   92         [MII_MEDIA_1000_X_FDX]  = { .mm_bmcr = BMCR_S1000 | BMCR_FDX,
   93                                     .mm_anar = ANAR_CSMA,
   94                                     .mm_gtcr = 0 },
   95 
   96         [MII_MEDIA_1000_T]      = { .mm_bmcr = BMCR_S1000,
   97                                     .mm_anar = ANAR_CSMA,
   98                                     .mm_gtcr = GTCR_ADV_1000THDX },
   99 
  100         [MII_MEDIA_1000_T_FDX]  = { .mm_bmcr = BMCR_S1000,
  101                                     .mm_anar = ANAR_CSMA,
  102                                     .mm_gtcr = GTCR_ADV_1000TFDX }
  103 };
  104 
  105 void
  106 mii_softc_init(struct mii_softc *mii, struct mii_attach_args *ma)
  107 {
  108         mii->mii_phy = ma->mii_phyno;
  109         mii->mii_flags |= ma->mii_flags;
  110         mii->mii_model = MII_MODEL(ma->mii_id2);
  111         mii->mii_rev = MII_REV(ma->mii_id2);
  112         mii->mii_privtag = ma->mii_privtag;
  113         mii->mii_priv = ma->mii_priv;
  114 
  115         if (mii->mii_reset == NULL)
  116                 mii->mii_reset = mii_phy_reset;
  117         if (mii->mii_anegticks == 0)
  118                 mii->mii_anegticks = MII_ANEGTICKS;
  119 }
  120 
  121 int
  122 mii_phy_auto(struct mii_softc *sc, int waitfor)
  123 {
  124         uint16_t anar;
  125 
  126         /*
  127          * Check for 1000BASE-X.  Autonegotiation is a bit
  128          * different on such devices.
  129          */
  130         if (sc->mii_flags & MIIF_IS_1000X) {
  131                 anar = 0;
  132                 if (sc->mii_extcapabilities & EXTSR_1000XFDX)
  133                         anar |= ANAR_X_FD;
  134                 if (sc->mii_extcapabilities & EXTSR_1000XHDX)
  135                         anar |= ANAR_X_HD;
  136 
  137                 if (sc->mii_flags & MIIF_DOPAUSE) {
  138                         /* XXX Asymmetric vs. symmetric? */
  139                         anar |= ANLPAR_X_PAUSE_TOWARDS;
  140                 }
  141                 PHY_WRITE(sc, MII_ANAR, anar);
  142         } else {
  143                 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
  144                     ANAR_CSMA;
  145                 if (sc->mii_flags & MIIF_DOPAUSE) {
  146                         anar |= ANAR_FC;
  147                         /* XXX Only 1000BASE-T has PAUSE_ASYM? */
  148                         if ((sc->mii_flags & MIIF_HAVE_GTCR) &&
  149                             (sc->mii_extcapabilities &
  150                              (EXTSR_1000THDX|EXTSR_1000TFDX)))
  151                                 anar |= ANAR_X_PAUSE_ASYM;
  152                 }
  153                 PHY_WRITE(sc, MII_ANAR, anar);
  154                 if (sc->mii_flags & MIIF_HAVE_GTCR) {
  155                         uint16_t gtcr = 0;
  156 
  157                         if (sc->mii_extcapabilities & EXTSR_1000TFDX)
  158                                 gtcr |= GTCR_ADV_1000TFDX;
  159                         if (sc->mii_extcapabilities & EXTSR_1000THDX)
  160                                 gtcr |= GTCR_ADV_1000THDX;
  161 
  162                         PHY_WRITE(sc, MII_100T2CR, gtcr);
  163                 }
  164         }
  165         PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
  166 
  167         if (waitfor) {
  168                 int i;
  169 
  170                 /* Wait 500ms for it to complete. */
  171                 for (i = 0; i < 500; i++) {
  172                         if (PHY_READ(sc, MII_BMSR) & BMSR_ACOMP)
  173                                 return (0);
  174                         DELAY(1000);
  175                 }
  176                 return (EIO);
  177         }
  178         return (EJUSTRETURN);
  179 }
  180 
  181 void
  182 mii_phy_reset(struct mii_softc *sc)
  183 {
  184         int reg, i;
  185 
  186         if (sc->mii_flags & MIIF_NOISOLATE)
  187                 reg = BMCR_RESET;
  188         else
  189                 reg = BMCR_RESET | BMCR_ISO;
  190         PHY_WRITE(sc, MII_BMCR, reg);
  191 
  192         /*
  193          * It is best to allow a little time for the reset to settle
  194          * in before we start polling the BMCR again.  Notably, the
  195          * DP83840A manual states that there should be a 500us delay
  196          * between asserting software reset and attempting MII serial
  197          * operations.  Also, a DP83815 can get into a bad state on
  198          * cable removal and reinsertion if we do not delay here.
  199          */
  200         DELAY(500);
  201 
  202         /* Wait 100ms for it to complete. */
  203         for (i = 0; i < 100; i++) {
  204                 reg = PHY_READ(sc, MII_BMCR); 
  205                 if ((reg & BMCR_RESET) == 0)
  206                         break;
  207                 DELAY(1000);
  208         }
  209 
  210         if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0))
  211                 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
  212 }
  213 
  214 /*
  215  * Initialize generic PHY media based on BMSR, called when a PHY is
  216  * attached.  We expect to be set up to print a comma-separated list
  217  * of media names.  Does not print a newline.
  218  */
  219 void
  220 mii_phy_add_media(struct mii_softc *sc)
  221 {
  222         struct mii_data *mii = sc->mii_pdata;
  223         const char *sep = "";
  224         int fdx = 0;
  225 
  226 #define ADD(m, c)       ifmedia_add(&mii->mii_media, (m), (c), NULL)
  227 #define PRINT(s)        kprintf("%s%s", sep, s); sep = ", "
  228 
  229         if ((sc->mii_flags & MIIF_NOISOLATE) == 0)
  230                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
  231                     MII_MEDIA_NONE);
  232 
  233         /*
  234          * There are different interpretations for the bits in
  235          * HomePNA PHYs.  And there is really only one media type
  236          * that is supported.
  237          */
  238         if (sc->mii_flags & MIIF_IS_HPNA) {
  239                 if (sc->mii_capabilities & BMSR_10THDX) {
  240                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0,
  241                                          sc->mii_inst),
  242                             MII_MEDIA_10_T);
  243                         PRINT("HomePNA1");
  244                 }
  245                 return;
  246         }
  247 
  248         if (sc->mii_capabilities & BMSR_10THDX) {
  249                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
  250                     MII_MEDIA_10_T);
  251                 PRINT("10baseT");
  252         }
  253         if (sc->mii_capabilities & BMSR_10TFDX) {
  254                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
  255                     MII_MEDIA_10_T_FDX);
  256                 PRINT("10baseT-FDX");
  257                 fdx = 1;
  258         }
  259         if (sc->mii_capabilities & BMSR_100TXHDX) {
  260                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
  261                     MII_MEDIA_100_TX);
  262                 PRINT("100baseTX");
  263         }
  264         if (sc->mii_capabilities & BMSR_100TXFDX) {
  265                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
  266                     MII_MEDIA_100_TX_FDX);
  267                 PRINT("100baseTX-FDX");
  268                 fdx = 1;
  269         }
  270         if (sc->mii_capabilities & BMSR_100T4) {
  271                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst),
  272                     MII_MEDIA_100_T4);
  273                 PRINT("100baseT4");
  274         }
  275 
  276         if (sc->mii_extcapabilities & EXTSR_MEDIAMASK) {
  277                 /*
  278                  * XXX Right now only handle 1000SX and 1000TX.  Need
  279                  * XXX to handle 1000LX and 1000CX some how.
  280                  *
  281                  * Note since it can take 5 seconds to auto-negotiate
  282                  * a gigabit link, we make anegticks 10 seconds for
  283                  * all the gigabit media types.
  284                  */
  285                 if (sc->mii_extcapabilities & EXTSR_1000XHDX) {
  286                         sc->mii_anegticks = MII_ANEGTICKS_GIGE;
  287                         sc->mii_flags |= MIIF_IS_1000X;
  288                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
  289                             sc->mii_inst), MII_MEDIA_1000_X);
  290                         PRINT("1000baseSX");
  291                 }
  292                 if (sc->mii_extcapabilities & EXTSR_1000XFDX) {
  293                         sc->mii_anegticks = MII_ANEGTICKS_GIGE;
  294                         sc->mii_flags |= MIIF_IS_1000X;
  295                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
  296                             sc->mii_inst), MII_MEDIA_1000_X_FDX);
  297                         PRINT("1000baseSX-FDX");
  298                         fdx = 1;
  299                 }
  300 
  301                 /*
  302                  * 1000baseT media needs to be able to manipulate
  303                  * master/slave mode.  We set IFM_ETH_MASTER in
  304                  * the "don't care mask" and filter it out when
  305                  * the media is set.
  306                  *
  307                  * All 1000baseT PHYs have a 1000baseT control register.
  308                  */
  309                 if (sc->mii_extcapabilities & EXTSR_1000THDX) {
  310                         sc->mii_anegticks = MII_ANEGTICKS_GIGE;
  311                         sc->mii_flags |= MIIF_HAVE_GTCR;
  312                         mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
  313                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
  314                             sc->mii_inst), MII_MEDIA_1000_T);
  315                         PRINT("1000baseT");
  316                 }
  317                 if (sc->mii_extcapabilities & EXTSR_1000TFDX) {
  318                         sc->mii_anegticks = MII_ANEGTICKS_GIGE;
  319                         sc->mii_flags |= MIIF_HAVE_GTCR;
  320                         mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
  321                         ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
  322                             sc->mii_inst), MII_MEDIA_1000_T_FDX);
  323                         PRINT("1000baseT-FDX");
  324                         fdx = 1;
  325                 }
  326         }
  327 
  328         if (sc->mii_capabilities & BMSR_ANEG) {
  329                 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst),
  330                     MII_NMEDIA);        /* intentionally invalid index */
  331                 PRINT("auto");
  332         }
  333 #undef ADD
  334 #undef PRINT
  335         if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE))
  336                 mii->mii_media.ifm_mask |= IFM_ETH_FMASK;
  337 }
  338 
  339 void
  340 mii_phy_set_media(struct mii_softc *sc)
  341 {
  342         struct mii_data *mii = sc->mii_pdata;
  343         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  344         int bmcr, anar, gtcr;
  345 
  346         if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) {
  347                 /*
  348                  * Force renegotiation if MIIF_DOPAUSE.
  349                  *
  350                  * XXX This is only necessary because many NICs don't
  351                  * XXX advertise PAUSE capabilities at boot time.  Maybe
  352                  * XXX we should force this only once?
  353                  */
  354                 if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
  355                     (sc->mii_flags & (MIIF_FORCEANEG | MIIF_DOPAUSE)))
  356                         mii_phy_auto(sc, 1);
  357                 return;
  358         }
  359 
  360         /*
  361          * Table index is stored in the media entry.
  362          */
  363 
  364         KASSERT(ife->ifm_data >= 0 && ife->ifm_data < MII_NMEDIA,
  365                 ("bogus ife->ifm_data (%d)", ife->ifm_data));
  366 
  367         anar = mii_media_table[ife->ifm_data].mm_anar;
  368         bmcr = mii_media_table[ife->ifm_data].mm_bmcr;
  369         gtcr = mii_media_table[ife->ifm_data].mm_gtcr;
  370 
  371         if (mii->mii_media.ifm_media & IFM_ETH_MASTER) {
  372                 switch (IFM_SUBTYPE(ife->ifm_media)) {
  373                 case IFM_1000_T:
  374                         gtcr |= GTCR_MAN_MS|GTCR_ADV_MS;
  375                         break;
  376 
  377                 default:
  378                         panic("mii_phy_setmedia: MASTER on wrong media");
  379                 }
  380         }
  381 
  382         if (mii->mii_media.ifm_media & IFM_FLOW) {
  383                 if (sc->mii_flags & MIIF_IS_1000X) {
  384                         anar |= ANAR_X_PAUSE_SYM | ANAR_X_PAUSE_ASYM;
  385                 } else {
  386                         anar |= ANAR_FC;
  387                         /* XXX Only 1000BASE-T has PAUSE_ASYM? */
  388                         if ((sc->mii_flags & MIIF_HAVE_GTCR) &&
  389                             (sc->mii_extcapabilities &
  390                              (EXTSR_1000THDX | EXTSR_1000TFDX)))
  391                                 anar |= ANAR_X_PAUSE_ASYM;
  392                 }
  393         }
  394 
  395         if (ife->ifm_media & IFM_LOOP)
  396                 bmcr |= BMCR_LOOP;
  397 
  398         PHY_WRITE(sc, MII_ANAR, anar);
  399         PHY_WRITE(sc, MII_BMCR, bmcr);
  400         if (sc->mii_flags & MIIF_HAVE_GTCR)
  401                 PHY_WRITE(sc, MII_100T2CR, gtcr);
  402 }
  403 
  404 int
  405 mii_phy_tick(struct mii_softc *sc)
  406 {
  407         struct mii_data *mii = sc->mii_pdata;
  408         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
  409         int reg;
  410 
  411         /* Just bail now if the interface is down. */
  412         if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
  413                 return (EJUSTRETURN);
  414 
  415         /*
  416          * If we're not doing autonegotiation, we don't need to do
  417          * any extra work here.  However, we need to check the link
  418          * status so we can generate an announcement if the status
  419          * changes.
  420          */
  421         if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
  422                 return (0);
  423 
  424         /* Read the status register twice; BMSR_LINK is latch-low. */
  425         reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
  426         if (reg & BMSR_LINK) {
  427                 /*
  428                  * See above.
  429                  */
  430 
  431                 /* Reset autonegotiation timer. */
  432                 sc->mii_ticks = 0;
  433                 return (0);
  434         }
  435 
  436         /*
  437          * Only retry autonegotiation every N seconds.
  438          */
  439         KKASSERT(sc->mii_anegticks > 0);
  440         if (++sc->mii_ticks <= sc->mii_anegticks)
  441                 return (EJUSTRETURN);
  442 
  443         sc->mii_ticks = 0;
  444         sc->mii_reset(sc);      /* Reset PHY */
  445         mii_phy_auto(sc, 0);    /* Ignore EJUSTRETURN */
  446         return (0);
  447 }
  448 
  449 static int
  450 mii_phy_statusmsg(struct mii_softc *sc)
  451 {
  452         struct mii_data *mii = sc->mii_pdata;
  453         struct ifnet *ifp = mii->mii_ifp;
  454         int baudrate, link_state, announce = 0;
  455 
  456         if (mii->mii_media_status & IFM_AVALID) {
  457                 if (mii->mii_media_status & IFM_ACTIVE)
  458                         link_state = LINK_STATE_UP;
  459                 else
  460                         link_state = LINK_STATE_DOWN;
  461         } else
  462                 link_state = LINK_STATE_UNKNOWN;
  463 
  464         baudrate = ifmedia_baudrate(mii->mii_media_active);
  465 
  466         if (link_state != ifp->if_link_state) {
  467                 ifp->if_link_state = link_state;
  468                 /*
  469                  * XXX Right here we'd like to notify protocols
  470                  * XXX that the link status has changed, so that
  471                  * XXX e.g. Duplicate Address Detection can restart.
  472                  */
  473                 announce = 1;
  474         }
  475 
  476         if (baudrate != ifp->if_baudrate) {
  477                 ifp->if_baudrate = baudrate;
  478                 announce = 1;
  479         }
  480 
  481         return (announce);
  482 }
  483 
  484 void
  485 mii_phy_update(struct mii_softc *sc, int cmd)
  486 {
  487         struct mii_data *mii = sc->mii_pdata;
  488         struct ifnet *ifp = mii->mii_ifp;
  489         int announce;
  490 
  491         if (sc->mii_media_active != mii->mii_media_active ||
  492             sc->mii_media_status != mii->mii_media_status ||
  493             cmd == MII_MEDIACHG) {
  494                 announce = mii_phy_statusmsg(sc);
  495                 MIIBUS_STATCHG(sc->mii_dev);
  496                 sc->mii_media_active = mii->mii_media_active;
  497                 sc->mii_media_status = mii->mii_media_status;
  498 
  499                 if (announce) {
  500                         crit_enter();
  501                         if_link_state_change(ifp);
  502                         crit_exit();
  503                 }
  504         }
  505 }
  506 
  507 /*
  508  * Return the flow control status flag from MII_ANAR & MII_ANLPAR.
  509  */
  510 int
  511 mii_phy_flowstatus(struct mii_softc *sc)
  512 {
  513         int anar, anlpar;
  514 
  515         if ((sc->mii_flags & MIIF_DOPAUSE) == 0)
  516                 return (0);
  517 
  518         anar = PHY_READ(sc, MII_ANAR);
  519         anlpar = PHY_READ(sc, MII_ANLPAR);
  520 
  521         if ((anar & ANAR_X_PAUSE_SYM) & (anlpar & ANLPAR_X_PAUSE_SYM))
  522                 return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE);
  523 
  524         if ((anar & ANAR_X_PAUSE_SYM) == 0) {
  525                 if ((anar & ANAR_X_PAUSE_ASYM) &&
  526                     ((anlpar & ANLPAR_X_PAUSE_TOWARDS) ==
  527                      ANLPAR_X_PAUSE_TOWARDS))
  528                         return (IFM_FLOW | IFM_ETH_TXPAUSE);
  529                 else
  530                         return (0);
  531         }
  532 
  533         if ((anar & ANAR_X_PAUSE_ASYM) == 0) {
  534                 if (anlpar & ANLPAR_X_PAUSE_SYM)
  535                         return (IFM_FLOW | IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE);
  536                 else
  537                         return (0);
  538         }
  539 
  540         switch (anlpar & ANLPAR_X_PAUSE_TOWARDS) {
  541         case ANLPAR_X_PAUSE_NONE:
  542                 return (0);
  543 
  544         case ANLPAR_X_PAUSE_ASYM:
  545                 return (IFM_FLOW | IFM_ETH_RXPAUSE);
  546 
  547         default:
  548                 return (IFM_FLOW | IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE);
  549         }
  550         /* NOTREACHED */
  551 }
  552 
  553 const struct mii_phydesc *
  554 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd)
  555 {
  556         for (; mpd->mpd_name != NULL; mpd++) {
  557                 if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui &&
  558                     MII_MODEL(ma->mii_id2) == mpd->mpd_model)
  559                         return (mpd);
  560         }
  561         return (NULL);
  562 }
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FreeBSD/Linux Kernel Cross Reference sys/dev/netif/mii_layer/mii_physubr.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/netif/mii_layer/mii_physubr.c
