Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/netif/rtw/rtwvar.h
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1 /* 2 * Copyright (c) 2004, 2005 David Young. All rights reserved. 3 * 4 * Driver for the Realtek RTL8180 802.11 MAC/BBP by David Young. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of David Young may not be used to endorse or promote 15 * products derived from this software without specific prior 16 * written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 19 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 20 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 21 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 22 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 23 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 24 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 29 * OF SUCH DAMAGE. 30 * 31 * $NetBSD: rtwvar.h,v 1.28 2006/02/16 20:17:16 perry Exp $ 32 * $DragonFly: src/sys/dev/netif/rtw/rtwvar.h,v 1.5 2008/01/15 09:01:13 sephe Exp $ 33 */ 34 35 #ifndef _DEV_IC_RTWVAR_H_ 36 #define _DEV_IC_RTWVAR_H_ 37 38 /* 39 * 802.11 frame duration definitions. 40 */ 41 42 struct rtw_duration { 43 uint16_t d_rts_dur; 44 uint16_t d_data_dur; 45 uint16_t d_plcp_len; 46 uint8_t d_residue; /* unused octets in time slot */ 47 }; 48 49 #ifdef RTW_DEBUG 50 #define RTW_DEBUG_TUNE 0x0000001 51 #define RTW_DEBUG_PKTFILT 0x0000002 52 #define RTW_DEBUG_XMIT 0x0000004 53 #define RTW_DEBUG_XMIT_DESC 0x0000008 54 #define RTW_DEBUG_NODE 0x0000010 55 #define RTW_DEBUG_PWR 0x0000020 56 #define RTW_DEBUG_ATTACH 0x0000040 57 #define RTW_DEBUG_REGDUMP 0x0000080 58 #define RTW_DEBUG_ACCESS 0x0000100 59 #define RTW_DEBUG_RESET 0x0000200 60 #define RTW_DEBUG_INIT 0x0000400 61 #define RTW_DEBUG_IOSTATE 0x0000800 62 #define RTW_DEBUG_RECV 0x0001000 63 #define RTW_DEBUG_RECV_DESC 0x0002000 64 #define RTW_DEBUG_IO_KICK 0x0004000 65 #define RTW_DEBUG_INTR 0x0008000 66 #define RTW_DEBUG_PHY 0x0010000 67 #define RTW_DEBUG_PHYIO 0x0020000 68 #define RTW_DEBUG_PHYBITIO 0x0040000 69 #define RTW_DEBUG_TIMEOUT 0x0080000 70 #define RTW_DEBUG_BUGS 0x0100000 71 #define RTW_DEBUG_BEACON 0x0200000 72 #define RTW_DEBUG_LED 0x0400000 73 #define RTW_DEBUG_KEY 0x0800000 74 #define RTW_DEBUG_XMIT_RSRC 0x1000000 75 #define RTW_DEBUG_OACTIVE 0x2000000 76 #define RTW_DEBUG_MAX 0x3ffffff 77 78 extern int rtw_debug; 79 #define RTW_DPRINTF(__flags, __x) \ 80 if ((rtw_debug & (__flags)) != 0) kprintf __x 81 #define DPRINTF(__sc, __flags, __x) \ 82 if (((__sc)->sc_if.if_flags & IFF_DEBUG) != 0) \ 83 RTW_DPRINTF(__flags, __x) 84 #define RTW_PRINT_REGS(__regs, __dvname, __where) \ 85 rtw_print_regs((__regs), (__dvname), (__where)) 86 #else /* RTW_DEBUG */ 87 #define RTW_DPRINTF(__flags, __x) 88 #define DPRINTF(__sc, __flags, __x) 89 #define RTW_PRINT_REGS(__regs, __dvname, __where) 90 #endif /* RTW_DEBUG */ 91 92 enum rtw_locale { 93 RTW_LOCALE_USA = 0, 94 RTW_LOCALE_EUROPE, 95 RTW_LOCALE_JAPAN, 96 RTW_LOCALE_UNKNOWN 97 }; 98 99 enum rtw_rfchipid { 100 RTW_RFCHIPID_RESERVED = 0, 101 RTW_RFCHIPID_INTERSIL = 1, 102 RTW_RFCHIPID_RFMD = 2, 103 RTW_RFCHIPID_PHILIPS = 3, 104 RTW_RFCHIPID_MAXIM = 4, 105 RTW_RFCHIPID_GCT = 5 106 }; 107 108 /* sc_flags */ 109 #define RTW_F_ENABLED 0x00000001 /* chip is enabled */ 110 #define RTW_F_DIGPHY 0x00000002 /* digital PHY */ 111 #define RTW_F_DFLANTB 0x00000004 /* B antenna is default */ 112 #define RTW_F_ANTDIV 0x00000010 /* h/w antenna diversity */ 113 #define RTW_F_9356SROM 0x00000020 /* 93c56 SROM */ 114 #define RTW_F_SLEEP 0x00000040 /* chip is asleep */ 115 #define RTW_F_INVALID 0x00000080 /* chip is absent */ 116 #define RTW_F_DK_VALID 0x00000100 /* keys in DK0-DK3 are valid */ 117 #define RTW_C_RXWEP_40 0x00000200 /* h/w decrypts 40-bit WEP */ 118 #define RTW_C_RXWEP_104 0x00000400 /* h/w decrypts 104-bit WEP */ 119 /* all PHY flags */ 120 #define RTW_F_ALLPHY (RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV) 121 122 enum rtw_access { 123 RTW_ACCESS_NONE = 0, 124 RTW_ACCESS_CONFIG = 1, 125 RTW_ACCESS_ANAPARM = 2 126 }; 127 128 struct rtw_regs { 129 bus_space_tag_t r_bt; 130 bus_space_handle_t r_bh; 131 enum rtw_access r_access; 132 int r_type; 133 int r_rid; 134 struct resource *r_res; 135 }; 136 137 #define RTW_SR_GET(sr, ofs) \ 138 (((sr)->sr_content[(ofs)/2] >> (((ofs) % 2 == 0) ? 0 : 8)) & 0xff) 139 140 #define RTW_SR_GET16(sr, ofs) \ 141 (RTW_SR_GET((sr), (ofs)) | (RTW_SR_GET((sr), (ofs) + 1) << 8)) 142 143 struct rtw_srom { 144 uint16_t *sr_content; 145 uint16_t sr_size; 146 }; 147 148 struct rtw_rxsoft { 149 struct mbuf *rs_mbuf; 150 bus_dmamap_t rs_dmamap; 151 bus_addr_t rs_phyaddr; 152 }; 153 154 struct rtw_txsoft { 155 STAILQ_ENTRY(rtw_txsoft) ts_q; 156 struct mbuf *ts_mbuf; 157 bus_dmamap_t ts_dmamap; 158 struct ieee80211_node *ts_ni; /* destination node */ 159 int ts_ratectl; 160 int ts_rateidx; 161 u_int ts_first; /* 1st hw descriptor */ 162 u_int ts_last; /* last hw descriptor */ 163 struct rtw_duration ts_d0; 164 struct rtw_duration ts_dn; 165 }; 166 167 #define RTW_NTXPRI 4 /* number of Tx priorities */ 168 #define RTW_TXPRILO 0 169 #define RTW_TXPRIMD 1 170 #define RTW_TXPRIHI 2 171 #define RTW_TXPRIBCN 3 /* beacon priority */ 172 173 #define RTW_MAXPKTSEGS 64 /* Max 64 segments per Tx packet */ 174 175 #define CASSERT(cond, complaint) \ 176 complaint[(cond) ? 0 : -1] = complaint[(cond) ? 0 : -1] 177 178 /* 179 * Note well: the descriptor rings must begin on RTW_DESC_ALIGNMENT 180 * boundaries. I allocate them consecutively from one buffer, so 181 * just round up. 182 */ 183 #define RTW_TXQLENLO 64 /* low-priority queue length */ 184 #define RTW_TXQLENMD 64 /* medium-priority */ 185 #define RTW_TXQLENHI 64 /* high-priority */ 186 #define RTW_TXQLENBCN 8 /* beacon */ 187 188 #define RTW_NTXDESCLO RTW_TXQLENLO 189 #define RTW_NTXDESCMD RTW_TXQLENMD 190 #define RTW_NTXDESCHI RTW_TXQLENHI 191 #define RTW_NTXDESCBCN RTW_TXQLENBCN 192 193 #define RTW_NTXDESCTOTAL (RTW_NTXDESCLO + RTW_NTXDESCMD + \ 194 RTW_NTXDESCHI + RTW_NTXDESCBCN) 195 196 #define RTW_RXQLEN 64 197 198 struct rtw_rxdesc_blk { 199 int rdb_ndesc; 200 int rdb_next; 201 202 bus_dma_tag_t rdb_dmat; 203 bus_dmamap_t rdb_dmamap; 204 struct rtw_rxdesc *rdb_desc; 205 206 uint32_t rdb_base; /* XXX bus_addr_t */ 207 }; 208 209 struct rtw_txdesc_blk { 210 int tdb_ndesc; 211 int tdb_next; 212 int tdb_nfree; 213 214 bus_dma_tag_t tdb_dmat; 215 bus_dmamap_t tdb_dmamap; 216 struct rtw_txdesc *tdb_desc; 217 218 bus_size_t tdb_basereg; 219 uint32_t tdb_base; /* XXX bus_addr_t */ 220 }; 221 222 #define RTW_NEXT_IDX(__htc, __idx) (((__idx) + 1) % (__htc)->tdb_ndesc) 223 224 #define RTW_NEXT_DESC(__htc, __idx) \ 225 ((__htc)->tdb_base + \ 226 sizeof(struct rtw_txdesc) * RTW_NEXT_IDX((__htc), (__idx))) 227 228 STAILQ_HEAD(rtw_txq, rtw_txsoft); 229 230 struct rtw_txsoft_blk { 231 /* dirty/free s/w descriptors */ 232 struct rtw_txq tsb_dirtyq; 233 struct rtw_txq tsb_freeq; 234 u_int tsb_ndesc; 235 int tsb_tx_timer; 236 struct rtw_txsoft *tsb_desc; 237 uint8_t tsb_poll; 238 }; 239 240 struct rtw_descs { 241 struct rtw_txdesc hd_txlo[RTW_NTXDESCLO]; 242 struct rtw_txdesc hd_txmd[RTW_NTXDESCMD]; 243 struct rtw_txdesc hd_txhi[RTW_NTXDESCMD]; 244 struct rtw_rxdesc hd_rx[RTW_RXQLEN]; 245 struct rtw_txdesc hd_bcn[RTW_NTXDESCBCN]; 246 }; 247 #define RTW_DESC_OFFSET(ring, i) offsetof(struct rtw_descs, ring[i]) 248 #define RTW_RING_OFFSET(ring) RTW_DESC_OFFSET(ring, 0) 249 #define RTW_RING_BASE(sc, ring) ((sc)->sc_desc_physaddr + \ 250 RTW_RING_OFFSET(ring)) 251 252 /* Radio capture format for RTL8180. */ 253 254 #define RTW_RX_RADIOTAP_PRESENT \ 255 ((1 << IEEE80211_RADIOTAP_TSFT) | \ 256 (1 << IEEE80211_RADIOTAP_FLAGS) | \ 257 (1 << IEEE80211_RADIOTAP_RATE) | \ 258 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 259 (1 << IEEE80211_RADIOTAP_LOCK_QUALITY) | \ 260 (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) | \ 261 0) 262 263 struct rtw_rx_radiotap_header { 264 struct ieee80211_radiotap_header rr_ihdr; 265 uint64_t rr_tsft; 266 uint8_t rr_flags; 267 uint8_t rr_rate; 268 uint16_t rr_chan_freq; 269 uint16_t rr_chan_flags; 270 uint16_t rr_barker_lock; 271 uint8_t rr_antsignal; 272 } __packed; 273 274 #define RTW_TX_RADIOTAP_PRESENT \ 275 ((1 << IEEE80211_RADIOTAP_FLAGS) | \ 276 (1 << IEEE80211_RADIOTAP_RATE) | \ 277 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 278 0) 279 280 struct rtw_tx_radiotap_header { 281 struct ieee80211_radiotap_header rt_ihdr; 282 uint8_t rt_flags; 283 uint8_t rt_rate; 284 uint16_t rt_chan_freq; 285 uint16_t rt_chan_flags; 286 } __packed; 287 288 enum rtw_attach_state {FINISHED, FINISH_DESCMAP_LOAD, FINISH_DESCMAP_CREATE, 289 FINISH_DESC_MAP, FINISH_DESC_ALLOC, FINISH_RXMAPS_CREATE, 290 FINISH_TXMAPS_CREATE, FINISH_RESET, FINISH_READ_SROM, FINISH_PARSE_SROM, 291 FINISH_RF_ATTACH, FINISH_ID_STA, FINISH_TXDESCBLK_SETUP, 292 FINISH_TXCTLBLK_SETUP, DETACHED}; 293 294 struct rtw_hooks { 295 void *rh_shutdown; /* shutdown hook */ 296 void *rh_power; /* power management hook */ 297 }; 298 299 struct rtw_mtbl { 300 int (*mt_newstate)(struct ieee80211com *, 301 enum ieee80211_state, int); 302 void (*mt_recv_mgmt)(struct ieee80211com *, 303 struct mbuf *, 304 struct ieee80211_node *, 305 int, int, uint32_t); 306 struct ieee80211_node *(*mt_node_alloc)(struct ieee80211_node_table*); 307 void (*mt_node_free)(struct ieee80211_node *); 308 }; 309 310 enum rtw_pwrstate { RTW_OFF = 0, RTW_SLEEP, RTW_ON }; 311 312 typedef void (*rtw_continuous_tx_cb_t)(void *arg, int); 313 314 struct rtw_phy { 315 struct rtw_rf *p_rf; 316 struct rtw_regs *p_regs; 317 }; 318 319 struct rtw_bbpset { 320 u_int bb_antatten; 321 u_int bb_chestlim; 322 u_int bb_chsqlim; 323 u_int bb_ifagcdet; 324 u_int bb_ifagcini; 325 u_int bb_ifagclimit; 326 u_int bb_lnadet; 327 u_int bb_sys1; 328 u_int bb_sys2; 329 u_int bb_sys3; 330 u_int bb_trl; 331 u_int bb_txagc; 332 }; 333 334 struct rtw_rf { 335 void (*rf_destroy)(struct rtw_rf *); 336 /* args: frequency, txpower, power state */ 337 int (*rf_init)(struct rtw_rf *, u_int, uint8_t, 338 enum rtw_pwrstate); 339 /* arg: power state */ 340 int (*rf_pwrstate)(struct rtw_rf *, 341 enum rtw_pwrstate); 342 /* arg: frequency */ 343 int (*rf_tune)(struct rtw_rf *, u_int); 344 /* arg: txpower */ 345 int (*rf_txpower)(struct rtw_rf *, uint8_t); 346 rtw_continuous_tx_cb_t rf_continuous_tx_cb; 347 void *rf_continuous_tx_arg; 348 struct rtw_bbpset rf_bbpset; 349 }; 350 351 static __inline void 352 rtw_rf_destroy(struct rtw_rf *rf) 353 { 354 rf->rf_destroy(rf); 355 } 356 357 static __inline int 358 rtw_rf_init(struct rtw_rf *rf, u_int freq, uint8_t opaque_txpower, 359 enum rtw_pwrstate power) 360 { 361 return rf->rf_init(rf, freq, opaque_txpower, power); 362 } 363 364 static __inline int 365 rtw_rf_pwrstate(struct rtw_rf *rf, enum rtw_pwrstate power) 366 { 367 return rf->rf_pwrstate(rf, power); 368 } 369 370 static __inline int 371 rtw_rf_tune(struct rtw_rf *rf, u_int freq) 372 { 373 return rf->rf_tune(rf, freq); 374 } 375 376 static __inline int 377 rtw_rf_txpower(struct rtw_rf *rf, uint8_t opaque_txpower) 378 { 379 return rf->rf_txpower(rf, opaque_txpower); 380 } 381 382 typedef int (*rtw_rf_write_t)(struct rtw_regs *, enum rtw_rfchipid, u_int, 383 uint32_t); 384 385 struct rtw_rfbus { 386 struct rtw_regs *b_regs; 387 rtw_rf_write_t b_write; 388 }; 389 390 static __inline int 391 rtw_rfbus_write(struct rtw_rfbus *bus, enum rtw_rfchipid rfchipid, u_int addr, 392 uint32_t val) 393 { 394 return bus->b_write(bus->b_regs, rfchipid, addr, val); 395 } 396 397 struct rtw_max2820 { 398 struct rtw_rf mx_rf; 399 struct rtw_rfbus mx_bus; 400 int mx_is_a; /* 1: MAX2820A/MAX2821A */ 401 }; 402 403 struct rtw_grf5101 { 404 struct rtw_rf gr_rf; 405 struct rtw_rfbus gr_bus; 406 }; 407 408 struct rtw_sa2400 { 409 struct rtw_rf sa_rf; 410 struct rtw_rfbus sa_bus; 411 int sa_digphy; /* 1: digital PHY */ 412 }; 413 414 union rtw_keys { 415 uint8_t rk_keys[4][16]; 416 uint32_t rk_words[16]; 417 }; 418 419 #define RTW_LED_SLOW_TICKS MAX(1, hz/2) 420 #define RTW_LED_FAST_TICKS MAX(1, hz/10) 421 422 struct rtw_led_state { 423 #define RTW_LED0 0x1 424 #define RTW_LED1 0x2 425 uint8_t ls_slowblink:2; 426 uint8_t ls_actblink:2; 427 uint8_t ls_default:2; 428 uint8_t ls_state; 429 uint8_t ls_event; 430 #define RTW_LED_S_RX 0x1 431 #define RTW_LED_S_TX 0x2 432 #define RTW_LED_S_SLOW 0x4 433 struct callout ls_slow_ch; 434 struct callout ls_fast_ch; 435 }; 436 437 struct rtw_softc { 438 struct ieee80211com sc_ic; 439 struct rtw_regs sc_regs; 440 uint32_t sc_flags; 441 442 struct resource *sc_irq_res; 443 int sc_irq_rid; 444 void *sc_irq_handle; 445 446 enum rtw_rfchipid sc_rfchipid; 447 enum rtw_locale sc_locale; 448 uint8_t sc_phydelay; 449 450 /* s/w Tx/Rx descriptors */ 451 bus_dma_tag_t sc_txsoft_dmat; 452 struct rtw_txsoft_blk sc_txsoft_blk[RTW_NTXPRI]; 453 struct rtw_txdesc_blk sc_txdesc_blk[RTW_NTXPRI]; 454 455 int sc_rxsoft_free; 456 bus_dmamap_t sc_rxsoft_dmamap; 457 bus_dma_tag_t sc_rxsoft_dmat; 458 struct rtw_rxsoft sc_rxsoft[RTW_RXQLEN]; 459 struct rtw_rxdesc_blk sc_rxdesc_blk; 460 461 struct rtw_srom sc_srom; 462 463 enum rtw_pwrstate sc_pwrstate; 464 465 void (*sc_pwrstate_cb) 466 (struct rtw_regs *, enum rtw_pwrstate, 467 int, int); 468 469 int (*sc_getrssi)(uint8_t, uint8_t); 470 471 struct rtw_rf *sc_rf; 472 473 uint16_t sc_inten; 474 475 /* interrupt acknowledge hook */ 476 void (*sc_intr_ack)(struct rtw_regs *); 477 478 void (*sc_power)(struct rtw_softc *, int); 479 struct rtw_mtbl sc_mtbl; 480 struct rtw_hooks sc_hooks; 481 482 struct bpf_if *sc_radiobpf; 483 484 struct callout sc_scan_ch; 485 u_int sc_cur_chan; 486 487 uint32_t sc_tsfth; /* most significant TSFT bits */ 488 uint32_t sc_rcr; /* RTW_RCR */ 489 uint8_t sc_csthr; /* carrier-sense threshold */ 490 491 int sc_do_tick; /* indicate 1s ticks */ 492 struct timeval sc_tick0; /* first tick */ 493 494 uint8_t sc_rev; /* PCI/Cardbus revision */ 495 496 uint32_t sc_anaparm; /* register RTW_ANAPARM */ 497 498 union { 499 struct rtw_rx_radiotap_header tap; 500 uint8_t pad[64]; 501 } sc_rxtapu; 502 union { 503 struct rtw_tx_radiotap_header tap; 504 uint8_t pad[64]; 505 } sc_txtapu; 506 union rtw_keys sc_keys; 507 struct ifqueue sc_beaconq; 508 struct rtw_led_state sc_led_state; 509 int sc_hwverid; 510 struct ieee80211_onoe_param sc_onoe_param; 511 }; 512 513 #define sc_if sc_ic.ic_if 514 #define sc_rxtap sc_rxtapu.tap 515 #define sc_txtap sc_txtapu.tap 516 517 extern devclass_t rtw_devclass; 518 519 #if 0 520 void rtw_txdac_enable(struct rtw_softc *, int); 521 void rtw_anaparm_enable(struct rtw_regs *, int); 522 void rtw_config0123_enable(struct rtw_regs *, int); 523 void rtw_continuous_tx_enable(struct rtw_softc *, int); 524 void rtw_set_access(struct rtw_regs *, enum rtw_access); 525 #endif 526 527 int rtw_attach(device_t); 528 int rtw_detach(device_t); 529 void rtw_stop(struct rtw_softc *, int); 530 #ifdef RTW_DEBUG 531 const char *rtw_pwrstate_string(enum rtw_pwrstate); 532 #endif 533 534 #endif /* _DEV_IC_RTWVAR_H_ */
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