The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/netif/sr/if_sr_pci.c

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    1 /*
    2  * Copyright (c) 1996 - 2001 John Hay.
    3  * Copyright (c) 1996 SDL Communications, Inc.
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  * 3. Neither the name of the author nor the names of any co-contributors
   15  *    may be used to endorse or promote products derived from this software
   16  *    without specific prior written permission.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  *
   30  * $FreeBSD: src/sys/dev/sr/if_sr_pci.c,v 1.15.2.1 2002/06/17 15:10:58 jhay Exp $
   31  */
   32 
   33 
   34 #include <sys/param.h>
   35 #include <sys/systm.h>
   36 #include <sys/kernel.h>
   37 #include <sys/malloc.h>
   38 #include <sys/bus.h>
   39 #include <sys/rman.h>
   40 
   41 #include <bus/pci/pcivar.h>
   42 #include <machine/md_var.h>
   43 
   44 #include "../ic_layer/hd64570.h"
   45 #include "if_srregs.h"
   46 
   47 #ifndef BUGGY
   48 #define BUGGY           0
   49 #endif
   50 
   51 static int      sr_pci_probe(device_t);
   52 static int      sr_pci_attach(device_t);
   53 
   54 static device_method_t sr_pci_methods[] = {
   55         /* Device interface */
   56         DEVMETHOD(device_probe,         sr_pci_probe),
   57         DEVMETHOD(device_attach,        sr_pci_attach),
   58         DEVMETHOD(device_detach,        sr_detach),
   59         DEVMETHOD_END
   60 };
   61 
   62 static driver_t sr_pci_driver = {
   63         "sr",
   64         sr_pci_methods,
   65         sizeof(struct sr_hardc),
   66 };
   67 
   68 DRIVER_MODULE(if_sr, pci, sr_pci_driver, sr_devclass, NULL, NULL);
   69 
   70 static u_int    src_get8_mem(u_int base, u_int off);
   71 static u_int    src_get16_mem(u_int base, u_int off);
   72 static void     src_put8_mem(u_int base, u_int off, u_int val);
   73 static void     src_put16_mem(u_int base, u_int off, u_int val);
   74 
   75 static int
   76 sr_pci_probe(device_t device)
   77 {
   78         u_int32_t       type = pci_get_devid(device);
   79 
   80         switch(type) {
   81         case 0x556812aa:
   82                 device_set_desc(device, "RISCom/N2pci");
   83                 return (0);
   84                 break;
   85         case 0x55684778:
   86         case 0x55684877:
   87                 /*
   88                  * XXX This can probably be removed sometime.
   89                  */
   90                 device_set_desc(device, "RISCom/N2pci (old id)");
   91                 return (0);
   92                 break;
   93         default:
   94                 break;
   95         }
   96         return (ENXIO);
   97 }
   98 
   99 static int
  100 sr_pci_attach(device_t device)
  101 {
  102         int numports;
  103         u_int fecr, *fecrp;
  104         struct sr_hardc *hc;
  105 
  106         hc = (struct sr_hardc *)device_get_softc(device);
  107 
  108         if (sr_allocate_plx_memory(device, 0x10, 1))
  109                 goto errexit;
  110 
  111         if (sr_allocate_memory(device, 0x18, 1))
  112                 goto errexit;
  113 
  114         if (sr_allocate_irq(device, 0, 1))
  115                 goto errexit;
  116 
  117         hc->plx_base = rman_get_virtual(hc->res_plx_memory);
  118         hc->sca_base = (vm_offset_t)rman_get_virtual(hc->res_memory);
  119 
  120         hc->cunit = device_get_unit(device);
  121 
  122 
  123         /*
  124          * Configure the PLX. This is magic. I'm doing it just like I'm told
  125          * to. :-)
  126          * 
  127          * offset
  128          *  0x00 - Map Range    - Mem-mapped to locate anywhere
  129          *  0x04 - Re-Map       - PCI address decode enable
  130          *  0x18 - Bus Region   - 32-bit bus, ready enable
  131          *  0x1c - Master Range - include all 16 MB
  132          *  0x20 - Master RAM   - Map SCA Base at 0
  133          *  0x28 - Master Remap - direct master memory enable
  134          *  0x68 - Interrupt    - Enable interrupt (0 to disable)
  135          * 
  136          * Note: This is "cargo cult" stuff.  - jrc
  137          */
  138         *((u_int *)(hc->plx_base + 0x00)) = 0xfffff000;
  139         *((u_int *)(hc->plx_base + 0x04)) = 1;
  140         *((u_int *)(hc->plx_base + 0x18)) = 0x40030043;
  141         *((u_int *)(hc->plx_base + 0x1c)) = 0xff000000;
  142         *((u_int *)(hc->plx_base + 0x20)) = 0;
  143         *((u_int *)(hc->plx_base + 0x28)) = 0xe9;
  144         *((u_int *)(hc->plx_base + 0x68)) = 0x10900;
  145 
  146         /*
  147          * Get info from card.
  148          *
  149          * Only look for the second port if the first exists. Too many things
  150          * will break if we have only a second port.
  151          */
  152         fecrp = (u_int *)(hc->sca_base + SR_FECR);
  153         fecr = *fecrp;
  154         numports = 0;
  155 
  156         if (((fecr & SR_FECR_ID0) >> SR_FE_ID0_SHFT) != SR_FE_ID_NONE) {
  157                 numports++;
  158                 if (((fecr & SR_FECR_ID1) >> SR_FE_ID1_SHFT) != SR_FE_ID_NONE)
  159                         numports++;
  160         }
  161         if (numports == 0)
  162                 goto errexit;
  163 
  164         hc->numports = numports;
  165         hc->cardtype = SR_CRD_N2PCI;
  166 
  167         hc->src_put8 = src_put8_mem;
  168         hc->src_put16 = src_put16_mem;
  169         hc->src_get8 = src_get8_mem;
  170         hc->src_get16 = src_get16_mem;
  171 
  172         /*
  173          * Malloc area for tx and rx buffers. For now allocate SRC_WIN_SIZ
  174          * (16k) for each buffer.
  175          *
  176          * Allocate the block below 16M because the N2pci card can only access
  177          * 16M memory at a time.
  178          *
  179          * (We could actually allocate a contiguous block above the 16MB limit,
  180          * but this would complicate card programming more than we want to
  181          * right now -jrc)
  182          */
  183         hc->memsize = 2 * hc->numports * SRC_WIN_SIZ;
  184         hc->mem_start = contigmalloc(hc->memsize,
  185                                      M_DEVBUF,
  186                                      M_NOWAIT | M_ZERO,
  187                                      0ul,
  188                                      0xfffffful,
  189                                      0x10000,
  190                                      0x1000000);
  191 
  192         if (hc->mem_start == NULL) {
  193                 kprintf("src%d: pci: failed to allocate buffer space.\n",
  194                     hc->cunit);
  195                 goto errexit;
  196         }
  197         hc->winmsk = 0xffffffff;
  198         hc->mem_end = (caddr_t)((u_int)hc->mem_start + hc->memsize);
  199         hc->mem_pstart = kvtop(hc->mem_start);
  200 
  201         *fecrp = SR_FECR_DTR0
  202             | SR_FECR_DTR1
  203             | SR_FECR_TE0
  204             | SR_FECR_TE1;
  205 
  206         if (sr_attach(device))
  207                 goto errexit;
  208 
  209         return (0);
  210 errexit:
  211         sr_deallocate_resources(device);
  212         return (ENXIO);
  213 }
  214 
  215 /*
  216  * I/O for PCI N2 card(s)
  217  */
  218 #define SRC_PCI_SCA_REG(y)      ((y & 2) ? ((y & 0xfd) + 0x100) : y)
  219 
  220 static u_int
  221 src_get8_mem(u_int base, u_int off)
  222 {
  223         return *((u_char *)(base + SRC_PCI_SCA_REG(off)));
  224 }
  225 
  226 static u_int
  227 src_get16_mem(u_int base, u_int off)
  228 {
  229         return *((u_short *)(base + SRC_PCI_SCA_REG(off)));
  230 }
  231 
  232 static void
  233 src_put8_mem(u_int base, u_int off, u_int val)
  234 {
  235         *((u_char *)(base + SRC_PCI_SCA_REG(off))) = (u_char)val;
  236 }
  237 
  238 static void
  239 src_put16_mem(u_int base, u_int off, u_int val)
  240 {
  241         *((u_short *)(base + SRC_PCI_SCA_REG(off))) = (u_short)val;
  242 }

Cache object: 3eb6a88a1d517baa0c7465b63d9b3609


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