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sys/dev/netif/txp/if_txp.c
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1 /* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */ 2 /* $FreeBSD: src/sys/dev/txp/if_txp.c,v 1.4.2.4 2001/12/14 19:50:43 jlemon Exp $ */ 3 4 /* 5 * Copyright (c) 2001 6 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and 7 * Aaron Campbell <aaron@monkey.org>. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Jason L. Wright, 20 * Theo de Raadt and Aaron Campbell. 21 * 4. Neither the name of the author nor the names of any co-contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 27 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 35 * THE POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Driver for 3c990 (Typhoon) Ethernet ASIC 40 */ 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/sockio.h> 45 #include <sys/mbuf.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/socket.h> 49 #include <sys/serialize.h> 50 #include <sys/bus.h> 51 #include <sys/rman.h> 52 #include <sys/thread2.h> 53 #include <sys/interrupt.h> 54 55 #include <net/if.h> 56 #include <net/ifq_var.h> 57 #include <net/if_arp.h> 58 #include <net/ethernet.h> 59 #include <net/if_dl.h> 60 #include <net/if_types.h> 61 #include <net/vlan/if_vlan_var.h> 62 #include <net/vlan/if_vlan_ether.h> 63 64 #include <netinet/in.h> 65 #include <netinet/in_systm.h> 66 #include <netinet/in_var.h> 67 #include <netinet/ip.h> 68 #include <netinet/if_ether.h> 69 #include <sys/in_cksum.h> 70 71 #include <net/if_media.h> 72 73 #include <net/bpf.h> 74 75 #include <vm/vm.h> /* for vtophys */ 76 #include <vm/pmap.h> /* for vtophys */ 77 78 #include "../mii_layer/mii.h" 79 #include "../mii_layer/miivar.h" 80 81 #include "pcidevs.h" 82 #include <bus/pci/pcireg.h> 83 #include <bus/pci/pcivar.h> 84 85 #define TXP_USEIOSPACE 86 #define __STRICT_ALIGNMENT 87 88 #include "if_txpreg.h" 89 #include "3c990img.h" 90 91 /* 92 * Various supported device vendors/types and their names. 93 */ 94 static struct txp_type txp_devs[] = { 95 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX95, 96 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" }, 97 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX97, 98 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" }, 99 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990B, 100 "3Com 3cR990B-TXM Etherlink with 3XP Processor" }, 101 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR95, 102 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" }, 103 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR97, 104 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" }, 105 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990BSVR, 106 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" }, 107 { 0, 0, NULL } 108 }; 109 110 static int txp_probe (device_t); 111 static int txp_attach (device_t); 112 static int txp_detach (device_t); 113 static void txp_intr (void *); 114 static void txp_tick (void *); 115 static int txp_shutdown (device_t); 116 static int txp_ioctl (struct ifnet *, u_long, caddr_t, struct ucred *); 117 static void txp_start (struct ifnet *, struct ifaltq_subque *); 118 static void txp_stop (struct txp_softc *); 119 static void txp_init (void *); 120 static void txp_watchdog (struct ifnet *); 121 122 static void txp_release_resources (device_t); 123 static int txp_chip_init (struct txp_softc *); 124 static int txp_reset_adapter (struct txp_softc *); 125 static int txp_download_fw (struct txp_softc *); 126 static int txp_download_fw_wait (struct txp_softc *); 127 static int txp_download_fw_section (struct txp_softc *, 128 struct txp_fw_section_header *, int); 129 static int txp_alloc_rings (struct txp_softc *); 130 static int txp_rxring_fill (struct txp_softc *); 131 static void txp_rxring_empty (struct txp_softc *); 132 static void txp_set_filter (struct txp_softc *); 133 134 static int txp_cmd_desc_numfree (struct txp_softc *); 135 static int txp_command (struct txp_softc *, u_int16_t, u_int16_t, u_int32_t, 136 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int); 137 static int txp_command2 (struct txp_softc *, u_int16_t, u_int16_t, 138 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t, 139 struct txp_rsp_desc **, int); 140 static int txp_response (struct txp_softc *, u_int32_t, u_int16_t, u_int16_t, 141 struct txp_rsp_desc **); 142 static void txp_rsp_fixup (struct txp_softc *, struct txp_rsp_desc *, 143 struct txp_rsp_desc *); 144 static void txp_capabilities (struct txp_softc *); 145 146 static void txp_ifmedia_sts (struct ifnet *, struct ifmediareq *); 147 static int txp_ifmedia_upd (struct ifnet *); 148 #ifdef TXP_DEBUG 149 static void txp_show_descriptor (void *); 150 #endif 151 static void txp_tx_reclaim (struct txp_softc *, struct txp_tx_ring *); 152 static void txp_rxbuf_reclaim (struct txp_softc *); 153 static void txp_rx_reclaim (struct txp_softc *, struct txp_rx_ring *); 154 155 #ifdef TXP_USEIOSPACE 156 #define TXP_RES SYS_RES_IOPORT 157 #define TXP_RID TXP_PCI_LOIO 158 #else 159 #define TXP_RES SYS_RES_MEMORY 160 #define TXP_RID TXP_PCI_LOMEM 161 #endif 162 163 static device_method_t txp_methods[] = { 164 /* Device interface */ 165 DEVMETHOD(device_probe, txp_probe), 166 DEVMETHOD(device_attach, txp_attach), 167 DEVMETHOD(device_detach, txp_detach), 168 DEVMETHOD(device_shutdown, txp_shutdown), 169 DEVMETHOD_END 170 }; 171 172 static driver_t txp_driver = { 173 "txp", 174 txp_methods, 175 sizeof(struct txp_softc) 176 }; 177 178 static devclass_t txp_devclass; 179 180 DECLARE_DUMMY_MODULE(if_txp); 181 DRIVER_MODULE(if_txp, pci, txp_driver, txp_devclass, NULL, NULL); 182 183 static int 184 txp_probe(device_t dev) 185 { 186 struct txp_type *t; 187 uint16_t vid, did; 188 189 vid = pci_get_vendor(dev); 190 did = pci_get_device(dev); 191 192 for (t = txp_devs; t->txp_name != NULL; ++t) { 193 if ((vid == t->txp_vid) && (did == t->txp_did)) { 194 device_set_desc(dev, t->txp_name); 195 return(0); 196 } 197 } 198 199 return(ENXIO); 200 } 201 202 static int 203 txp_attach(device_t dev) 204 { 205 struct txp_softc *sc; 206 struct ifnet *ifp; 207 uint16_t p1; 208 uint32_t p2; 209 uint8_t enaddr[ETHER_ADDR_LEN]; 210 int error = 0, rid; 211 212 sc = device_get_softc(dev); 213 callout_init(&sc->txp_stat_timer); 214 215 ifp = &sc->sc_arpcom.ac_if; 216 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 217 218 pci_enable_busmaster(dev); 219 220 rid = TXP_RID; 221 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, RF_ACTIVE); 222 223 if (sc->sc_res == NULL) { 224 device_printf(dev, "couldn't map ports/memory\n"); 225 return(ENXIO); 226 } 227 228 sc->sc_bt = rman_get_bustag(sc->sc_res); 229 sc->sc_bh = rman_get_bushandle(sc->sc_res); 230 231 /* Allocate interrupt */ 232 rid = 0; 233 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 234 RF_SHAREABLE | RF_ACTIVE); 235 236 if (sc->sc_irq == NULL) { 237 device_printf(dev, "couldn't map interrupt\n"); 238 error = ENXIO; 239 goto fail; 240 } 241 242 if (txp_chip_init(sc)) { 243 error = ENXIO; 244 goto fail; 245 } 246 247 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF, 248 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0); 249 error = txp_download_fw(sc); 250 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF); 251 sc->sc_fwbuf = NULL; 252 253 if (error) 254 goto fail; 255 256 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF, 257 M_WAITOK | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0); 258 259 if (txp_alloc_rings(sc)) { 260 error = ENXIO; 261 goto fail; 262 } 263 264 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 265 NULL, NULL, NULL, 1)) { 266 error = ENXIO; 267 goto fail; 268 } 269 270 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0, 271 &p1, &p2, NULL, 1)) { 272 error = ENXIO; 273 goto fail; 274 } 275 276 txp_set_filter(sc); 277 278 enaddr[0] = ((uint8_t *)&p1)[1]; 279 enaddr[1] = ((uint8_t *)&p1)[0]; 280 enaddr[2] = ((uint8_t *)&p2)[3]; 281 enaddr[3] = ((uint8_t *)&p2)[2]; 282 enaddr[4] = ((uint8_t *)&p2)[1]; 283 enaddr[5] = ((uint8_t *)&p2)[0]; 284 285 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts); 286 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 287 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 288 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 289 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 290 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL); 291 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 292 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 293 294 sc->sc_xcvr = TXP_XCVR_AUTO; 295 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0, 296 NULL, NULL, NULL, 0); 297 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO); 298 299 ifp->if_softc = sc; 300 ifp->if_mtu = ETHERMTU; 301 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 302 ifp->if_ioctl = txp_ioctl; 303 ifp->if_start = txp_start; 304 ifp->if_watchdog = txp_watchdog; 305 ifp->if_init = txp_init; 306 ifp->if_baudrate = 100000000; 307 ifq_set_maxlen(&ifp->if_snd, TX_ENTRIES); 308 ifq_set_ready(&ifp->if_snd); 309 ifp->if_hwassist = 0; 310 txp_capabilities(sc); 311 312 ether_ifattach(ifp, enaddr, NULL); 313 314 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(sc->sc_irq)); 315 316 error = bus_setup_intr(dev, sc->sc_irq, INTR_MPSAFE, 317 txp_intr, sc, &sc->sc_intrhand, 318 ifp->if_serializer); 319 if (error) { 320 device_printf(dev, "couldn't set up irq\n"); 321 ether_ifdetach(ifp); 322 goto fail; 323 } 324 325 return(0); 326 327 fail: 328 txp_release_resources(dev); 329 return(error); 330 } 331 332 static int 333 txp_detach(device_t dev) 334 { 335 struct txp_softc *sc = device_get_softc(dev); 336 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 337 int i; 338 339 lwkt_serialize_enter(ifp->if_serializer); 340 341 txp_stop(sc); 342 txp_shutdown(dev); 343 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand); 344 345 lwkt_serialize_exit(ifp->if_serializer); 346 347 ifmedia_removeall(&sc->sc_ifmedia); 348 ether_ifdetach(ifp); 349 350 for (i = 0; i < RXBUF_ENTRIES; i++) 351 kfree(sc->sc_rxbufs[i].rb_sd, M_DEVBUF); 352 353 txp_release_resources(dev); 354 355 return(0); 356 } 357 358 static void 359 txp_release_resources(device_t dev) 360 { 361 struct txp_softc *sc; 362 363 sc = device_get_softc(dev); 364 365 if (sc->sc_irq != NULL) 366 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq); 367 368 if (sc->sc_res != NULL) 369 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res); 370 371 if (sc->sc_ldata != NULL) 372 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF); 373 374 return; 375 } 376 377 static int 378 txp_chip_init(struct txp_softc *sc) 379 { 380 /* disable interrupts */ 381 WRITE_REG(sc, TXP_IER, 0); 382 WRITE_REG(sc, TXP_IMR, 383 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 384 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 385 TXP_INT_LATCH); 386 387 /* ack all interrupts */ 388 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 389 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 390 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 391 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 392 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 393 394 if (txp_reset_adapter(sc)) 395 return (-1); 396 397 /* disable interrupts */ 398 WRITE_REG(sc, TXP_IER, 0); 399 WRITE_REG(sc, TXP_IMR, 400 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 401 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 402 TXP_INT_LATCH); 403 404 /* ack all interrupts */ 405 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 406 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 407 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 408 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 409 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 410 411 return (0); 412 } 413 414 static int 415 txp_reset_adapter(struct txp_softc *sc) 416 { 417 u_int32_t r; 418 int i; 419 420 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL); 421 DELAY(1000); 422 WRITE_REG(sc, TXP_SRR, 0); 423 424 /* Should wait max 6 seconds */ 425 for (i = 0; i < 6000; i++) { 426 r = READ_REG(sc, TXP_A2H_0); 427 if (r == STAT_WAITING_FOR_HOST_REQUEST) 428 break; 429 DELAY(1000); 430 } 431 432 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 433 if_printf(&sc->sc_arpcom.ac_if, "reset hung\n"); 434 return (-1); 435 } 436 437 return (0); 438 } 439 440 static int 441 txp_download_fw(struct txp_softc *sc) 442 { 443 struct txp_fw_file_header *fileheader; 444 struct txp_fw_section_header *secthead; 445 int sect; 446 u_int32_t r, i, ier, imr; 447 448 ier = READ_REG(sc, TXP_IER); 449 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0); 450 451 imr = READ_REG(sc, TXP_IMR); 452 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0); 453 454 for (i = 0; i < 10000; i++) { 455 r = READ_REG(sc, TXP_A2H_0); 456 if (r == STAT_WAITING_FOR_HOST_REQUEST) 457 break; 458 DELAY(50); 459 } 460 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 461 if_printf(&sc->sc_arpcom.ac_if, 462 "not waiting for host request\n"); 463 return (-1); 464 } 465 466 /* Ack the status */ 467 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 468 469 fileheader = (struct txp_fw_file_header *)tc990image; 470 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) { 471 if_printf(&sc->sc_arpcom.ac_if, "fw invalid magic\n"); 472 return (-1); 473 } 474 475 /* Tell boot firmware to get ready for image */ 476 WRITE_REG(sc, TXP_H2A_1, fileheader->addr); 477 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE); 478 479 if (txp_download_fw_wait(sc)) { 480 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, initial\n"); 481 return (-1); 482 } 483 484 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) + 485 sizeof(struct txp_fw_file_header)); 486 487 for (sect = 0; sect < fileheader->nsections; sect++) { 488 if (txp_download_fw_section(sc, secthead, sect)) 489 return (-1); 490 secthead = (struct txp_fw_section_header *) 491 (((u_int8_t *)secthead) + secthead->nbytes + 492 sizeof(*secthead)); 493 } 494 495 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE); 496 497 for (i = 0; i < 10000; i++) { 498 r = READ_REG(sc, TXP_A2H_0); 499 if (r == STAT_WAITING_FOR_BOOT) 500 break; 501 DELAY(50); 502 } 503 if (r != STAT_WAITING_FOR_BOOT) { 504 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n"); 505 return (-1); 506 } 507 508 WRITE_REG(sc, TXP_IER, ier); 509 WRITE_REG(sc, TXP_IMR, imr); 510 511 return (0); 512 } 513 514 static int 515 txp_download_fw_wait(struct txp_softc *sc) 516 { 517 u_int32_t i, r; 518 519 for (i = 0; i < 10000; i++) { 520 r = READ_REG(sc, TXP_ISR); 521 if (r & TXP_INT_A2H_0) 522 break; 523 DELAY(50); 524 } 525 526 if (!(r & TXP_INT_A2H_0)) { 527 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed comm0\n"); 528 return (-1); 529 } 530 531 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 532 533 r = READ_REG(sc, TXP_A2H_0); 534 if (r != STAT_WAITING_FOR_SEGMENT) { 535 if_printf(&sc->sc_arpcom.ac_if, "fw not waiting for segment\n"); 536 return (-1); 537 } 538 return (0); 539 } 540 541 static int 542 txp_download_fw_section(struct txp_softc *sc, 543 struct txp_fw_section_header *sect, int sectnum) 544 { 545 vm_offset_t dma; 546 int rseg, err = 0; 547 struct mbuf m; 548 u_int16_t csum; 549 550 /* Skip zero length sections */ 551 if (sect->nbytes == 0) 552 return (0); 553 554 /* Make sure we aren't past the end of the image */ 555 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image); 556 if (rseg >= sizeof(tc990image)) { 557 if_printf(&sc->sc_arpcom.ac_if, "fw invalid section address, " 558 "section %d\n", sectnum); 559 return (-1); 560 } 561 562 /* Make sure this section doesn't go past the end */ 563 rseg += sect->nbytes; 564 if (rseg >= sizeof(tc990image)) { 565 if_printf(&sc->sc_arpcom.ac_if, "fw truncated section %d\n", 566 sectnum); 567 return (-1); 568 } 569 570 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes); 571 dma = vtophys(sc->sc_fwbuf); 572 573 /* 574 * dummy up mbuf and verify section checksum 575 */ 576 m.m_type = MT_DATA; 577 m.m_next = m.m_nextpkt = NULL; 578 m.m_len = sect->nbytes; 579 m.m_data = sc->sc_fwbuf; 580 m.m_flags = 0; 581 csum = in_cksum(&m, sect->nbytes); 582 if (csum != sect->cksum) { 583 if_printf(&sc->sc_arpcom.ac_if, "fw section %d, bad " 584 "cksum (expected 0x%x got 0x%x)\n", 585 sectnum, sect->cksum, csum); 586 err = -1; 587 goto bail; 588 } 589 590 WRITE_REG(sc, TXP_H2A_1, sect->nbytes); 591 WRITE_REG(sc, TXP_H2A_2, sect->cksum); 592 WRITE_REG(sc, TXP_H2A_3, sect->addr); 593 WRITE_REG(sc, TXP_H2A_4, 0); 594 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff); 595 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE); 596 597 if (txp_download_fw_wait(sc)) { 598 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, " 599 "section %d\n", sectnum); 600 err = -1; 601 } 602 603 bail: 604 return (err); 605 } 606 607 static void 608 txp_intr(void *vsc) 609 { 610 struct txp_softc *sc = vsc; 611 struct txp_hostvar *hv = sc->sc_hostvar; 612 u_int32_t isr; 613 614 /* mask all interrupts */ 615 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF | 616 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 617 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 618 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 619 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 620 621 isr = READ_REG(sc, TXP_ISR); 622 while (isr) { 623 WRITE_REG(sc, TXP_ISR, isr); 624 625 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff)) 626 txp_rx_reclaim(sc, &sc->sc_rxhir); 627 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff)) 628 txp_rx_reclaim(sc, &sc->sc_rxlor); 629 630 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx) 631 txp_rxbuf_reclaim(sc); 632 633 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons != 634 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off)))) 635 txp_tx_reclaim(sc, &sc->sc_txhir); 636 637 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons != 638 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off)))) 639 txp_tx_reclaim(sc, &sc->sc_txlor); 640 641 isr = READ_REG(sc, TXP_ISR); 642 } 643 644 /* unmask all interrupts */ 645 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 646 647 if_devstart(&sc->sc_arpcom.ac_if); 648 } 649 650 static void 651 txp_rx_reclaim(struct txp_softc *sc, struct txp_rx_ring *r) 652 { 653 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 654 struct txp_rx_desc *rxd; 655 struct mbuf *m; 656 struct txp_swdesc *sd = NULL; 657 u_int32_t roff, woff; 658 659 roff = *r->r_roff; 660 woff = *r->r_woff; 661 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc)); 662 663 while (roff != woff) { 664 665 if (rxd->rx_flags & RX_FLAGS_ERROR) { 666 if_printf(ifp, "error 0x%x\n", rxd->rx_stat); 667 IFNET_STAT_INC(ifp, ierrors, 1); 668 goto next; 669 } 670 671 /* retrieve stashed pointer */ 672 sd = rxd->rx_sd; 673 674 m = sd->sd_mbuf; 675 sd->sd_mbuf = NULL; 676 677 m->m_pkthdr.len = m->m_len = rxd->rx_len; 678 679 #ifdef __STRICT_ALIGNMENT 680 { 681 /* 682 * XXX Nice chip, except it won't accept "off by 2" 683 * buffers, so we're force to copy. Supposedly 684 * this will be fixed in a newer firmware rev 685 * and this will be temporary. 686 */ 687 struct mbuf *mnew; 688 689 MGETHDR(mnew, MB_DONTWAIT, MT_DATA); 690 if (mnew == NULL) { 691 m_freem(m); 692 goto next; 693 } 694 if (m->m_len > (MHLEN - 2)) { 695 MCLGET(mnew, MB_DONTWAIT); 696 if (!(mnew->m_flags & M_EXT)) { 697 m_freem(mnew); 698 m_freem(m); 699 goto next; 700 } 701 } 702 mnew->m_pkthdr.rcvif = ifp; 703 m_adj(mnew, 2); 704 mnew->m_pkthdr.len = mnew->m_len = m->m_len; 705 m_copydata(m, 0, m->m_pkthdr.len, mtod(mnew, caddr_t)); 706 m_freem(m); 707 m = mnew; 708 } 709 #endif 710 711 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD) 712 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 713 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD) 714 m->m_pkthdr.csum_flags |= 715 CSUM_IP_CHECKED|CSUM_IP_VALID; 716 717 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) || 718 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) { 719 m->m_pkthdr.csum_flags |= 720 CSUM_DATA_VALID|CSUM_PSEUDO_HDR| 721 CSUM_FRAG_NOT_CHECKED; 722 m->m_pkthdr.csum_data = 0xffff; 723 } 724 725 if (rxd->rx_stat & RX_STAT_VLAN) { 726 m->m_flags |= M_VLANTAG; 727 m->m_pkthdr.ether_vlantag = htons(rxd->rx_vlan >> 16); 728 } 729 ifp->if_input(ifp, m); 730 731 next: 732 733 roff += sizeof(struct txp_rx_desc); 734 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) { 735 roff = 0; 736 rxd = r->r_desc; 737 } else 738 rxd++; 739 woff = *r->r_woff; 740 } 741 742 *r->r_roff = woff; 743 744 return; 745 } 746 747 static void 748 txp_rxbuf_reclaim(struct txp_softc *sc) 749 { 750 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 751 struct txp_hostvar *hv = sc->sc_hostvar; 752 struct txp_rxbuf_desc *rbd; 753 struct txp_swdesc *sd; 754 u_int32_t i; 755 756 if (!(ifp->if_flags & IFF_RUNNING)) 757 return; 758 759 i = sc->sc_rxbufprod; 760 rbd = sc->sc_rxbufs + i; 761 762 while (1) { 763 sd = rbd->rb_sd; 764 if (sd->sd_mbuf != NULL) 765 break; 766 767 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA); 768 if (sd->sd_mbuf == NULL) 769 goto err_sd; 770 771 MCLGET(sd->sd_mbuf, MB_DONTWAIT); 772 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) 773 goto err_mbuf; 774 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 775 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 776 777 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t)) 778 & 0xffffffff; 779 rbd->rb_paddrhi = 0; 780 781 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i); 782 783 if (++i == RXBUF_ENTRIES) { 784 i = 0; 785 rbd = sc->sc_rxbufs; 786 } else 787 rbd++; 788 } 789 790 sc->sc_rxbufprod = i; 791 792 return; 793 794 err_mbuf: 795 m_freem(sd->sd_mbuf); 796 err_sd: 797 kfree(sd, M_DEVBUF); 798 } 799 800 /* 801 * Reclaim mbufs and entries from a transmit ring. 802 */ 803 static void 804 txp_tx_reclaim(struct txp_softc *sc, struct txp_tx_ring *r) 805 { 806 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 807 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off)); 808 u_int32_t cons = r->r_cons, cnt = r->r_cnt; 809 struct txp_tx_desc *txd = r->r_desc + cons; 810 struct txp_swdesc *sd = sc->sc_txd + cons; 811 struct mbuf *m; 812 813 while (cons != idx) { 814 if (cnt == 0) 815 break; 816 817 if ((txd->tx_flags & TX_FLAGS_TYPE_M) == 818 TX_FLAGS_TYPE_DATA) { 819 m = sd->sd_mbuf; 820 if (m != NULL) { 821 m_freem(m); 822 txd->tx_addrlo = 0; 823 txd->tx_addrhi = 0; 824 IFNET_STAT_INC(ifp, opackets, 1); 825 } 826 } 827 ifq_clr_oactive(&ifp->if_snd); 828 829 if (++cons == TX_ENTRIES) { 830 txd = r->r_desc; 831 cons = 0; 832 sd = sc->sc_txd; 833 } else { 834 txd++; 835 sd++; 836 } 837 838 cnt--; 839 } 840 841 r->r_cons = cons; 842 r->r_cnt = cnt; 843 if (cnt == 0) 844 ifp->if_timer = 0; 845 } 846 847 static int 848 txp_shutdown(device_t dev) 849 { 850 struct txp_softc *sc; 851 struct ifnet *ifp; 852 853 sc = device_get_softc(dev); 854 ifp = &sc->sc_arpcom.ac_if; 855 lwkt_serialize_enter(ifp->if_serializer); 856 857 /* mask all interrupts */ 858 WRITE_REG(sc, TXP_IMR, 859 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 860 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 861 TXP_INT_LATCH); 862 863 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 864 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 865 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0); 866 867 lwkt_serialize_exit(ifp->if_serializer); 868 return(0); 869 } 870 871 static int 872 txp_alloc_rings(struct txp_softc *sc) 873 { 874 struct txp_boot_record *boot; 875 struct txp_ldata *ld; 876 u_int32_t r; 877 int i; 878 879 ld = sc->sc_ldata; 880 boot = &ld->txp_boot; 881 882 /* boot record */ 883 sc->sc_boot = boot; 884 885 /* host variables */ 886 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar)); 887 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar); 888 boot->br_hostvar_hi = 0; 889 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar; 890 891 /* hi priority tx ring */ 892 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring); 893 boot->br_txhipri_hi = 0; 894 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 895 sc->sc_txhir.r_reg = TXP_H2A_1; 896 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring; 897 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0; 898 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx; 899 900 /* lo priority tx ring */ 901 boot->br_txlopri_lo = vtophys(&ld->txp_txloring); 902 boot->br_txlopri_hi = 0; 903 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 904 sc->sc_txlor.r_reg = TXP_H2A_3; 905 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring; 906 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0; 907 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx; 908 909 /* high priority rx ring */ 910 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring); 911 boot->br_rxhipri_hi = 0; 912 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 913 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring; 914 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx; 915 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx; 916 917 /* low priority rx ring */ 918 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring); 919 boot->br_rxlopri_hi = 0; 920 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 921 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring; 922 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx; 923 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx; 924 925 /* command ring */ 926 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES); 927 boot->br_cmd_lo = vtophys(&ld->txp_cmdring); 928 boot->br_cmd_hi = 0; 929 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 930 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring; 931 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 932 sc->sc_cmdring.lastwrite = 0; 933 934 /* response ring */ 935 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES); 936 boot->br_resp_lo = vtophys(&ld->txp_rspring); 937 boot->br_resp_hi = 0; 938 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc); 939 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring; 940 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc); 941 sc->sc_rspring.lastwrite = 0; 942 943 /* receive buffer ring */ 944 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs); 945 boot->br_rxbuf_hi = 0; 946 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc); 947 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs; 948 949 for (i = 0; i < RXBUF_ENTRIES; i++) { 950 struct txp_swdesc *sd; 951 if (sc->sc_rxbufs[i].rb_sd != NULL) 952 continue; 953 sc->sc_rxbufs[i].rb_sd = kmalloc(sizeof(struct txp_swdesc), 954 M_DEVBUF, M_WAITOK); 955 sd = sc->sc_rxbufs[i].rb_sd; 956 sd->sd_mbuf = NULL; 957 } 958 sc->sc_rxbufprod = 0; 959 960 /* zero dma */ 961 bzero(&ld->txp_zero, sizeof(u_int32_t)); 962 boot->br_zero_lo = vtophys(&ld->txp_zero); 963 boot->br_zero_hi = 0; 964 965 /* See if it's waiting for boot, and try to boot it */ 966 for (i = 0; i < 10000; i++) { 967 r = READ_REG(sc, TXP_A2H_0); 968 if (r == STAT_WAITING_FOR_BOOT) 969 break; 970 DELAY(50); 971 } 972 973 if (r != STAT_WAITING_FOR_BOOT) { 974 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n"); 975 return(ENXIO); 976 } 977 978 WRITE_REG(sc, TXP_H2A_2, 0); 979 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot)); 980 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD); 981 982 /* See if it booted */ 983 for (i = 0; i < 10000; i++) { 984 r = READ_REG(sc, TXP_A2H_0); 985 if (r == STAT_RUNNING) 986 break; 987 DELAY(50); 988 } 989 if (r != STAT_RUNNING) { 990 if_printf(&sc->sc_arpcom.ac_if, "fw not running\n"); 991 return(ENXIO); 992 } 993 994 /* Clear TX and CMD ring write registers */ 995 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL); 996 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL); 997 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL); 998 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL); 999 1000 return (0); 1001 } 1002 1003 static int 1004 txp_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr) 1005 { 1006 struct txp_softc *sc = ifp->if_softc; 1007 struct ifreq *ifr = (struct ifreq *)data; 1008 int error = 0; 1009 1010 switch(command) { 1011 case SIOCSIFFLAGS: 1012 if (ifp->if_flags & IFF_UP) { 1013 txp_init(sc); 1014 } else { 1015 if (ifp->if_flags & IFF_RUNNING) 1016 txp_stop(sc); 1017 } 1018 break; 1019 case SIOCADDMULTI: 1020 case SIOCDELMULTI: 1021 /* 1022 * Multicast list has changed; set the hardware 1023 * filter accordingly. 1024 */ 1025 txp_set_filter(sc); 1026 error = 0; 1027 break; 1028 case SIOCGIFMEDIA: 1029 case SIOCSIFMEDIA: 1030 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command); 1031 break; 1032 default: 1033 error = ether_ioctl(ifp, command, data); 1034 break; 1035 } 1036 return(error); 1037 } 1038 1039 static int 1040 txp_rxring_fill(struct txp_softc *sc) 1041 { 1042 int i; 1043 struct ifnet *ifp; 1044 struct txp_swdesc *sd; 1045 1046 ifp = &sc->sc_arpcom.ac_if; 1047 1048 for (i = 0; i < RXBUF_ENTRIES; i++) { 1049 sd = sc->sc_rxbufs[i].rb_sd; 1050 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA); 1051 if (sd->sd_mbuf == NULL) 1052 return(ENOBUFS); 1053 1054 MCLGET(sd->sd_mbuf, MB_DONTWAIT); 1055 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) { 1056 m_freem(sd->sd_mbuf); 1057 return(ENOBUFS); 1058 } 1059 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 1060 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 1061 1062 sc->sc_rxbufs[i].rb_paddrlo = 1063 vtophys(mtod(sd->sd_mbuf, vm_offset_t)); 1064 sc->sc_rxbufs[i].rb_paddrhi = 0; 1065 } 1066 1067 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) * 1068 sizeof(struct txp_rxbuf_desc); 1069 1070 return(0); 1071 } 1072 1073 static void 1074 txp_rxring_empty(struct txp_softc *sc) 1075 { 1076 int i; 1077 struct txp_swdesc *sd; 1078 1079 if (sc->sc_rxbufs == NULL) 1080 return; 1081 1082 for (i = 0; i < RXBUF_ENTRIES; i++) { 1083 if (&sc->sc_rxbufs[i] == NULL) 1084 continue; 1085 sd = sc->sc_rxbufs[i].rb_sd; 1086 if (sd == NULL) 1087 continue; 1088 if (sd->sd_mbuf != NULL) { 1089 m_freem(sd->sd_mbuf); 1090 sd->sd_mbuf = NULL; 1091 } 1092 } 1093 1094 return; 1095 } 1096 1097 static void 1098 txp_init(void *xsc) 1099 { 1100 struct txp_softc *sc; 1101 struct ifnet *ifp; 1102 u_int16_t p1; 1103 u_int32_t p2; 1104 1105 sc = xsc; 1106 ifp = &sc->sc_arpcom.ac_if; 1107 1108 if (ifp->if_flags & IFF_RUNNING) 1109 return; 1110 1111 txp_stop(sc); 1112 1113 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 1114 NULL, NULL, NULL, 1); 1115 1116 /* Set station address. */ 1117 ((u_int8_t *)&p1)[1] = sc->sc_arpcom.ac_enaddr[0]; 1118 ((u_int8_t *)&p1)[0] = sc->sc_arpcom.ac_enaddr[1]; 1119 ((u_int8_t *)&p2)[3] = sc->sc_arpcom.ac_enaddr[2]; 1120 ((u_int8_t *)&p2)[2] = sc->sc_arpcom.ac_enaddr[3]; 1121 ((u_int8_t *)&p2)[1] = sc->sc_arpcom.ac_enaddr[4]; 1122 ((u_int8_t *)&p2)[0] = sc->sc_arpcom.ac_enaddr[5]; 1123 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0, 1124 NULL, NULL, NULL, 1); 1125 1126 txp_set_filter(sc); 1127 1128 txp_rxring_fill(sc); 1129 1130 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1131 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1132 1133 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF | 1134 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 1135 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 1136 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 1137 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 1138 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 1139 1140 ifp->if_flags |= IFF_RUNNING; 1141 ifq_clr_oactive(&ifp->if_snd); 1142 ifp->if_timer = 0; 1143 1144 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc); 1145 } 1146 1147 static void 1148 txp_tick(void *vsc) 1149 { 1150 struct txp_softc *sc = vsc; 1151 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1152 struct txp_rsp_desc *rsp = NULL; 1153 struct txp_ext_desc *ext; 1154 1155 lwkt_serialize_enter(ifp->if_serializer); 1156 txp_rxbuf_reclaim(sc); 1157 1158 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0, 1159 &rsp, 1)) 1160 goto out; 1161 if (rsp->rsp_numdesc != 6) 1162 goto out; 1163 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0, 1164 NULL, NULL, NULL, 1)) 1165 goto out; 1166 ext = (struct txp_ext_desc *)(rsp + 1); 1167 1168 IFNET_STAT_INC(ifp, ierrors, 1169 ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 + 1170 ext[4].ext_1 + ext[4].ext_4); 1171 IFNET_STAT_INC(ifp, oerrors, 1172 ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 + ext[2].ext_1); 1173 IFNET_STAT_INC(ifp, collisions, 1174 ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 + ext[1].ext_3); 1175 IFNET_STAT_INC(ifp, opackets, rsp->rsp_par2); 1176 IFNET_STAT_INC(ifp, ipackets, ext[2].ext_3); 1177 1178 out: 1179 if (rsp != NULL) 1180 kfree(rsp, M_DEVBUF); 1181 1182 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc); 1183 lwkt_serialize_exit(ifp->if_serializer); 1184 } 1185 1186 static void 1187 txp_start(struct ifnet *ifp, struct ifaltq_subque *ifsq) 1188 { 1189 struct txp_softc *sc = ifp->if_softc; 1190 struct txp_tx_ring *r = &sc->sc_txhir; 1191 struct txp_tx_desc *txd; 1192 struct txp_frag_desc *fxd; 1193 struct mbuf *m, *m0, *m_defragged; 1194 struct txp_swdesc *sd; 1195 u_int32_t firstprod, firstcnt, prod, cnt; 1196 1197 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq); 1198 1199 if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd)) 1200 return; 1201 1202 prod = r->r_prod; 1203 cnt = r->r_cnt; 1204 1205 while (1) { 1206 int frag; 1207 1208 firstprod = prod; 1209 firstcnt = cnt; 1210 1211 if ((TX_ENTRIES - cnt) < 4) 1212 goto oactive; 1213 1214 m_defragged = NULL; 1215 m = ifq_dequeue(&ifp->if_snd); 1216 if (m == NULL) 1217 break; 1218 again: 1219 frag = 1; /* Extra desc */ 1220 for (m0 = m; m0 != NULL; m0 = m0->m_next) 1221 ++frag; 1222 if ((cnt + frag) >= (TX_ENTRIES - 4)) { 1223 if (m_defragged != NULL) { 1224 /* 1225 * Even after defragmentation, there 1226 * are still too many fragments, so 1227 * drop this packet. 1228 */ 1229 m_freem(m); 1230 goto oactive; 1231 } 1232 1233 m_defragged = m_defrag(m, MB_DONTWAIT); 1234 if (m_defragged == NULL) { 1235 m_freem(m); 1236 continue; 1237 } 1238 m = m_defragged; 1239 1240 /* Recount # of fragments */ 1241 goto again; 1242 } 1243 1244 sd = sc->sc_txd + prod; 1245 sd->sd_mbuf = m; 1246 1247 txd = r->r_desc + prod; 1248 txd->tx_flags = TX_FLAGS_TYPE_DATA; 1249 txd->tx_numdesc = 0; 1250 txd->tx_addrlo = 0; 1251 txd->tx_addrhi = 0; 1252 txd->tx_totlen = 0; 1253 txd->tx_pflags = 0; 1254 1255 if (++prod == TX_ENTRIES) 1256 prod = 0; 1257 1258 ++cnt; 1259 KASSERT(cnt < (TX_ENTRIES - 4), ("too many frag")); 1260 1261 if (m->m_flags & M_VLANTAG) { 1262 txd->tx_pflags = TX_PFLAGS_VLAN | 1263 (htons(m->m_pkthdr.ether_vlantag) << 1264 TX_PFLAGS_VLANTAG_S); 1265 } 1266 1267 if (m->m_pkthdr.csum_flags & CSUM_IP) 1268 txd->tx_pflags |= TX_PFLAGS_IPCKSUM; 1269 1270 #if 0 1271 if (m->m_pkthdr.csum_flags & CSUM_TCP) 1272 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM; 1273 if (m->m_pkthdr.csum_flags & CSUM_UDP) 1274 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM; 1275 #endif 1276 1277 fxd = (struct txp_frag_desc *)(r->r_desc + prod); 1278 for (m0 = m; m0 != NULL; m0 = m0->m_next) { 1279 if (m0->m_len == 0) 1280 continue; 1281 1282 ++cnt; 1283 KASSERT(cnt < (TX_ENTRIES - 4), ("too many frag")); 1284 1285 txd->tx_numdesc++; 1286 1287 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG; 1288 fxd->frag_rsvd1 = 0; 1289 fxd->frag_len = m0->m_len; 1290 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t)); 1291 fxd->frag_addrhi = 0; 1292 fxd->frag_rsvd2 = 0; 1293 1294 if (++prod == TX_ENTRIES) { 1295 fxd = (struct txp_frag_desc *)r->r_desc; 1296 prod = 0; 1297 } else 1298 fxd++; 1299 } 1300 1301 ifp->if_timer = 5; 1302 1303 ETHER_BPF_MTAP(ifp, m); 1304 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod)); 1305 } 1306 1307 r->r_prod = prod; 1308 r->r_cnt = cnt; 1309 return; 1310 1311 oactive: 1312 ifq_set_oactive(&ifp->if_snd); 1313 r->r_prod = firstprod; 1314 r->r_cnt = firstcnt; 1315 return; 1316 } 1317 1318 /* 1319 * Handle simple commands sent to the typhoon 1320 */ 1321 static int 1322 txp_command(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2, 1323 u_int32_t in3, u_int16_t *out1, u_int32_t *out2, u_int32_t *out3, 1324 int wait) 1325 { 1326 struct txp_rsp_desc *rsp = NULL; 1327 1328 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait)) 1329 return (-1); 1330 1331 if (!wait) 1332 return (0); 1333 1334 if (out1 != NULL) 1335 *out1 = rsp->rsp_par1; 1336 if (out2 != NULL) 1337 *out2 = rsp->rsp_par2; 1338 if (out3 != NULL) 1339 *out3 = rsp->rsp_par3; 1340 kfree(rsp, M_DEVBUF); 1341 return (0); 1342 } 1343 1344 static int 1345 txp_command2(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2, 1346 u_int32_t in3, struct txp_ext_desc *in_extp, u_int8_t in_extn, 1347 struct txp_rsp_desc **rspp, int wait) 1348 { 1349 struct txp_hostvar *hv = sc->sc_hostvar; 1350 struct txp_cmd_desc *cmd; 1351 struct txp_ext_desc *ext; 1352 u_int32_t idx, i; 1353 u_int16_t seq; 1354 1355 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) { 1356 if_printf(&sc->sc_arpcom.ac_if, "no free cmd descriptors\n"); 1357 return (-1); 1358 } 1359 1360 idx = sc->sc_cmdring.lastwrite; 1361 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1362 bzero(cmd, sizeof(*cmd)); 1363 1364 cmd->cmd_numdesc = in_extn; 1365 cmd->cmd_seq = seq = sc->sc_seq++; 1366 cmd->cmd_id = id; 1367 cmd->cmd_par1 = in1; 1368 cmd->cmd_par2 = in2; 1369 cmd->cmd_par3 = in3; 1370 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD | 1371 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID; 1372 1373 idx += sizeof(struct txp_cmd_desc); 1374 if (idx == sc->sc_cmdring.size) 1375 idx = 0; 1376 1377 for (i = 0; i < in_extn; i++) { 1378 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1379 bcopy(in_extp, ext, sizeof(struct txp_ext_desc)); 1380 in_extp++; 1381 idx += sizeof(struct txp_cmd_desc); 1382 if (idx == sc->sc_cmdring.size) 1383 idx = 0; 1384 } 1385 1386 sc->sc_cmdring.lastwrite = idx; 1387 1388 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite); 1389 1390 if (!wait) 1391 return (0); 1392 1393 for (i = 0; i < 10000; i++) { 1394 idx = hv->hv_resp_read_idx; 1395 if (idx != hv->hv_resp_write_idx) { 1396 *rspp = NULL; 1397 if (txp_response(sc, idx, id, seq, rspp)) 1398 return (-1); 1399 if (*rspp != NULL) 1400 break; 1401 } 1402 DELAY(50); 1403 } 1404 if (i == 1000 || (*rspp) == NULL) { 1405 if_printf(&sc->sc_arpcom.ac_if, "0x%x command failed\n", id); 1406 return (-1); 1407 } 1408 1409 return (0); 1410 } 1411 1412 static int 1413 txp_response(struct txp_softc *sc, u_int32_t ridx, u_int16_t id, u_int16_t seq, 1414 struct txp_rsp_desc **rspp) 1415 { 1416 struct txp_hostvar *hv = sc->sc_hostvar; 1417 struct txp_rsp_desc *rsp; 1418 1419 while (ridx != hv->hv_resp_write_idx) { 1420 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx); 1421 1422 if (id == rsp->rsp_id && rsp->rsp_seq == seq) { 1423 *rspp = (struct txp_rsp_desc *)kmalloc( 1424 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1), 1425 M_DEVBUF, M_INTWAIT); 1426 if ((*rspp) == NULL) 1427 return (-1); 1428 txp_rsp_fixup(sc, rsp, *rspp); 1429 return (0); 1430 } 1431 1432 if (rsp->rsp_flags & RSP_FLAGS_ERROR) { 1433 if_printf(&sc->sc_arpcom.ac_if, "response error!\n"); 1434 txp_rsp_fixup(sc, rsp, NULL); 1435 ridx = hv->hv_resp_read_idx; 1436 continue; 1437 } 1438 1439 switch (rsp->rsp_id) { 1440 case TXP_CMD_CYCLE_STATISTICS: 1441 case TXP_CMD_MEDIA_STATUS_READ: 1442 break; 1443 case TXP_CMD_HELLO_RESPONSE: 1444 if_printf(&sc->sc_arpcom.ac_if, "hello\n"); 1445 break; 1446 default: 1447 if_printf(&sc->sc_arpcom.ac_if, "unknown id(0x%x)\n", 1448 rsp->rsp_id); 1449 } 1450 1451 txp_rsp_fixup(sc, rsp, NULL); 1452 ridx = hv->hv_resp_read_idx; 1453 hv->hv_resp_read_idx = ridx; 1454 } 1455 1456 return (0); 1457 } 1458 1459 static void 1460 txp_rsp_fixup(struct txp_softc *sc, struct txp_rsp_desc *rsp, 1461 struct txp_rsp_desc *dst) 1462 { 1463 struct txp_rsp_desc *src = rsp; 1464 struct txp_hostvar *hv = sc->sc_hostvar; 1465 u_int32_t i, ridx; 1466 1467 ridx = hv->hv_resp_read_idx; 1468 1469 for (i = 0; i < rsp->rsp_numdesc + 1; i++) { 1470 if (dst != NULL) 1471 bcopy(src, dst++, sizeof(struct txp_rsp_desc)); 1472 ridx += sizeof(struct txp_rsp_desc); 1473 if (ridx == sc->sc_rspring.size) { 1474 src = sc->sc_rspring.base; 1475 ridx = 0; 1476 } else 1477 src++; 1478 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx; 1479 } 1480 1481 hv->hv_resp_read_idx = ridx; 1482 } 1483 1484 static int 1485 txp_cmd_desc_numfree(struct txp_softc *sc) 1486 { 1487 struct txp_hostvar *hv = sc->sc_hostvar; 1488 struct txp_boot_record *br = sc->sc_boot; 1489 u_int32_t widx, ridx, nfree; 1490 1491 widx = sc->sc_cmdring.lastwrite; 1492 ridx = hv->hv_cmd_read_idx; 1493 1494 if (widx == ridx) { 1495 /* Ring is completely free */ 1496 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc); 1497 } else { 1498 if (widx > ridx) 1499 nfree = br->br_cmd_siz - 1500 (widx - ridx + sizeof(struct txp_cmd_desc)); 1501 else 1502 nfree = ridx - widx - sizeof(struct txp_cmd_desc); 1503 } 1504 1505 return (nfree / sizeof(struct txp_cmd_desc)); 1506 } 1507 1508 static void 1509 txp_stop(struct txp_softc *sc) 1510 { 1511 struct ifnet *ifp; 1512 1513 ifp = &sc->sc_arpcom.ac_if; 1514 1515 ifp->if_flags &= ~IFF_RUNNING; 1516 ifq_clr_oactive(&ifp->if_snd); 1517 1518 callout_stop(&sc->txp_stat_timer); 1519 1520 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1521 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1522 1523 txp_rxring_empty(sc); 1524 1525 return; 1526 } 1527 1528 static void 1529 txp_watchdog(struct ifnet *ifp) 1530 { 1531 return; 1532 } 1533 1534 static int 1535 txp_ifmedia_upd(struct ifnet *ifp) 1536 { 1537 struct txp_softc *sc = ifp->if_softc; 1538 struct ifmedia *ifm = &sc->sc_ifmedia; 1539 u_int16_t new_xcvr; 1540 1541 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1542 return (EINVAL); 1543 1544 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) { 1545 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1546 new_xcvr = TXP_XCVR_10_FDX; 1547 else 1548 new_xcvr = TXP_XCVR_10_HDX; 1549 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { 1550 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1551 new_xcvr = TXP_XCVR_100_FDX; 1552 else 1553 new_xcvr = TXP_XCVR_100_HDX; 1554 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1555 new_xcvr = TXP_XCVR_AUTO; 1556 } else 1557 return (EINVAL); 1558 1559 /* nothing to do */ 1560 if (sc->sc_xcvr == new_xcvr) 1561 return (0); 1562 1563 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0, 1564 NULL, NULL, NULL, 0); 1565 sc->sc_xcvr = new_xcvr; 1566 1567 return (0); 1568 } 1569 1570 static void 1571 txp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1572 { 1573 struct txp_softc *sc = ifp->if_softc; 1574 struct ifmedia *ifm = &sc->sc_ifmedia; 1575 u_int16_t bmsr, bmcr, anlpar; 1576 1577 ifmr->ifm_status = IFM_AVALID; 1578 ifmr->ifm_active = IFM_ETHER; 1579 1580 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1581 &bmsr, NULL, NULL, 1)) 1582 goto bail; 1583 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1584 &bmsr, NULL, NULL, 1)) 1585 goto bail; 1586 1587 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0, 1588 &bmcr, NULL, NULL, 1)) 1589 goto bail; 1590 1591 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0, 1592 &anlpar, NULL, NULL, 1)) 1593 goto bail; 1594 1595 if (bmsr & BMSR_LINK) 1596 ifmr->ifm_status |= IFM_ACTIVE; 1597 1598 if (bmcr & BMCR_ISO) { 1599 ifmr->ifm_active |= IFM_NONE; 1600 ifmr->ifm_status = 0; 1601 return; 1602 } 1603 1604 if (bmcr & BMCR_LOOP) 1605 ifmr->ifm_active |= IFM_LOOP; 1606 1607 if (bmcr & BMCR_AUTOEN) { 1608 if ((bmsr & BMSR_ACOMP) == 0) { 1609 ifmr->ifm_active |= IFM_NONE; 1610 return; 1611 } 1612 1613 if (anlpar & ANLPAR_T4) 1614 ifmr->ifm_active |= IFM_100_T4; 1615 else if (anlpar & ANLPAR_TX_FD) 1616 ifmr->ifm_active |= IFM_100_TX|IFM_FDX; 1617 else if (anlpar & ANLPAR_TX) 1618 ifmr->ifm_active |= IFM_100_TX; 1619 else if (anlpar & ANLPAR_10_FD) 1620 ifmr->ifm_active |= IFM_10_T|IFM_FDX; 1621 else if (anlpar & ANLPAR_10) 1622 ifmr->ifm_active |= IFM_10_T; 1623 else 1624 ifmr->ifm_active |= IFM_NONE; 1625 } else 1626 ifmr->ifm_active = ifm->ifm_cur->ifm_media; 1627 return; 1628 1629 bail: 1630 ifmr->ifm_active |= IFM_NONE; 1631 ifmr->ifm_status &= ~IFM_AVALID; 1632 } 1633 1634 #ifdef TXP_DEBUG 1635 static void 1636 txp_show_descriptor(void *d) 1637 { 1638 struct txp_cmd_desc *cmd = d; 1639 struct txp_rsp_desc *rsp = d; 1640 struct txp_tx_desc *txd = d; 1641 struct txp_frag_desc *frgd = d; 1642 1643 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) { 1644 case CMD_FLAGS_TYPE_CMD: 1645 /* command descriptor */ 1646 kprintf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1647 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1648 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1649 break; 1650 case CMD_FLAGS_TYPE_RESP: 1651 /* response descriptor */ 1652 kprintf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1653 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq, 1654 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3); 1655 break; 1656 case CMD_FLAGS_TYPE_DATA: 1657 /* data header (assuming tx for now) */ 1658 kprintf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]", 1659 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen, 1660 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags); 1661 break; 1662 case CMD_FLAGS_TYPE_FRAG: 1663 /* fragment descriptor */ 1664 kprintf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]", 1665 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len, 1666 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2); 1667 break; 1668 default: 1669 kprintf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1670 cmd->cmd_flags & CMD_FLAGS_TYPE_M, 1671 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1672 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1673 break; 1674 } 1675 } 1676 #endif 1677 1678 static void 1679 txp_set_filter(struct txp_softc *sc) 1680 { 1681 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1682 uint16_t filter; 1683 struct ifmultiaddr *ifma; 1684 1685 if (ifp->if_flags & IFF_PROMISC) { 1686 filter = TXP_RXFILT_PROMISC; 1687 goto setit; 1688 } 1689 1690 filter = TXP_RXFILT_DIRECT; 1691 1692 if (ifp->if_flags & IFF_BROADCAST) 1693 filter |= TXP_RXFILT_BROADCAST; 1694 1695 if (ifp->if_flags & IFF_ALLMULTI) { 1696 filter |= TXP_RXFILT_ALLMULTI; 1697 } else { 1698 uint32_t hashbit, hash[2]; 1699 int mcnt = 0; 1700 1701 hash[0] = hash[1] = 0; 1702 1703 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1704 if (ifma->ifma_addr->sa_family != AF_LINK) 1705 continue; 1706 1707 mcnt++; 1708 hashbit = (uint16_t)(ether_crc32_be( 1709 LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1710 ETHER_ADDR_LEN) & (64 - 1)); 1711 hash[hashbit / 32] |= (1 << hashbit % 32); 1712 } 1713 1714 if (mcnt > 0) { 1715 filter |= TXP_RXFILT_HASHMULTI; 1716 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE, 1717 2, hash[0], hash[1], NULL, NULL, NULL, 0); 1718 } 1719 } 1720 1721 setit: 1722 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0, 1723 NULL, NULL, NULL, 1); 1724 } 1725 1726 static void 1727 txp_capabilities(struct txp_softc *sc) 1728 { 1729 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1730 struct txp_rsp_desc *rsp = NULL; 1731 struct txp_ext_desc *ext; 1732 1733 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1)) 1734 goto out; 1735 1736 if (rsp->rsp_numdesc != 1) 1737 goto out; 1738 ext = (struct txp_ext_desc *)(rsp + 1); 1739 1740 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK; 1741 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK; 1742 ifp->if_capabilities = 0; 1743 1744 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) { 1745 sc->sc_tx_capability |= OFFLOAD_VLAN; 1746 sc->sc_rx_capability |= OFFLOAD_VLAN; 1747 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 1748 } 1749 1750 #if 0 1751 /* not ready yet */ 1752 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) { 1753 sc->sc_tx_capability |= OFFLOAD_IPSEC; 1754 sc->sc_rx_capability |= OFFLOAD_IPSEC; 1755 ifp->if_capabilities |= IFCAP_IPSEC; 1756 } 1757 #endif 1758 1759 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) { 1760 sc->sc_tx_capability |= OFFLOAD_IPCKSUM; 1761 sc->sc_rx_capability |= OFFLOAD_IPCKSUM; 1762 ifp->if_capabilities |= IFCAP_HWCSUM; 1763 ifp->if_hwassist |= CSUM_IP; 1764 } 1765 1766 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) { 1767 #if 0 1768 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM; 1769 #endif 1770 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM; 1771 ifp->if_capabilities |= IFCAP_HWCSUM; 1772 } 1773 1774 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) { 1775 #if 0 1776 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM; 1777 #endif 1778 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM; 1779 ifp->if_capabilities |= IFCAP_HWCSUM; 1780 } 1781 ifp->if_capenable = ifp->if_capabilities; 1782 1783 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0, 1784 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1)) 1785 goto out; 1786 1787 out: 1788 if (rsp != NULL) 1789 kfree(rsp, M_DEVBUF); 1790 1791 return; 1792 }
Cache object: e78d734fa795360c12d606d6790c734b
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