FreeBSD/Linux Kernel Cross Reference
sys/dev/nve/if_nve.c
1 /*-
2 * Copyright (c) 2005 by David E. O'Brien <obrien@FreeBSD.org>.
3 * Copyright (c) 2003,2004 by Quinton Dolan <q@onthenet.com.au>.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
16 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $Id: if_nv.c,v 1.19 2004/08/12 14:00:05 q Exp $
28 */
29 /*
30 * NVIDIA nForce MCP Networking Adapter driver
31 *
32 * This is a port of the NVIDIA MCP Linux ethernet driver distributed by NVIDIA
33 * through their web site.
34 *
35 * All mainstream nForce and nForce2 motherboards are supported. This module
36 * is as stable, sometimes more stable, than the linux version. (Recent
37 * Linux stability issues seem to be related to some issues with newer
38 * distributions using GCC 3.x, however this don't appear to effect FreeBSD
39 * 5.x).
40 *
41 * In accordance with the NVIDIA distribution license it is necessary to
42 * link this module against the nvlibnet.o binary object included in the
43 * Linux driver source distribution. The binary component is not modified in
44 * any way and is simply linked against a FreeBSD equivalent of the nvnet.c
45 * linux kernel module "wrapper".
46 *
47 * The Linux driver uses a common code API that is shared between Win32 and
48 * i386 Linux. This abstracts the low level driver functions and uses
49 * callbacks and hooks to access the underlying hardware device. By using
50 * this same API in a FreeBSD kernel module it is possible to support the
51 * hardware without breaching the Linux source distributions licensing
52 * requirements, or obtaining the hardware programming specifications.
53 *
54 * Although not conventional, it works, and given the relatively small
55 * amount of hardware centric code, it's hopefully no more buggy than its
56 * linux counterpart.
57 *
58 * NVIDIA now support the nForce3 AMD64 platform, however I have been
59 * unable to access such a system to verify support. However, the code is
60 * reported to work with little modification when compiled with the AMD64
61 * version of the NVIDIA Linux library. All that should be necessary to make
62 * the driver work is to link it directly into the kernel, instead of as a
63 * module, and apply the docs/amd64.diff patch in this source distribution to
64 * the NVIDIA Linux driver source.
65 *
66 * This driver should work on all versions of FreeBSD since 4.9/5.1 as well
67 * as recent versions of DragonFly.
68 *
69 * Written by Quinton Dolan <q@onthenet.com.au>
70 * Portions based on existing FreeBSD network drivers.
71 * NVIDIA API usage derived from distributed NVIDIA NVNET driver source files.
72 */
73
74 #include <sys/cdefs.h>
75 __FBSDID("$FreeBSD: releng/7.4/sys/dev/nve/if_nve.c 214925 2010-11-07 17:38:54Z marius $");
76
77 #include <sys/param.h>
78 #include <sys/systm.h>
79 #include <sys/sockio.h>
80 #include <sys/mbuf.h>
81 #include <sys/malloc.h>
82 #include <sys/kernel.h>
83 #include <sys/socket.h>
84 #include <sys/sysctl.h>
85 #include <sys/queue.h>
86 #include <sys/module.h>
87
88 #include <net/if.h>
89 #include <net/if_arp.h>
90 #include <net/ethernet.h>
91 #include <net/if_dl.h>
92 #include <net/if_media.h>
93 #include <net/if_types.h>
94 #include <net/bpf.h>
95 #include <net/if_vlan_var.h>
96
97 #include <machine/bus.h>
98 #include <machine/resource.h>
99
100 #include <vm/vm.h> /* for vtophys */
101 #include <vm/pmap.h> /* for vtophys */
102 #include <sys/bus.h>
103 #include <sys/rman.h>
104
105 #include <dev/pci/pcireg.h>
106 #include <dev/pci/pcivar.h>
107 #include <dev/mii/mii.h>
108 #include <dev/mii/miivar.h>
109 #include "miibus_if.h"
110
111 /* Include NVIDIA Linux driver header files */
112 #include <contrib/dev/nve/nvenet_version.h>
113 #define linux
114 #include <contrib/dev/nve/basetype.h>
115 #include <contrib/dev/nve/phy.h>
116 #include "os+%DIKED-nve.h"
117 #include <contrib/dev/nve/drvinfo.h>
118 #include <contrib/dev/nve/adapter.h>
119 #undef linux
120
121 #include <dev/nve/if_nvereg.h>
122
123 MODULE_DEPEND(nve, pci, 1, 1, 1);
124 MODULE_DEPEND(nve, ether, 1, 1, 1);
125 MODULE_DEPEND(nve, miibus, 1, 1, 1);
126
127 static int nve_probe(device_t);
128 static int nve_attach(device_t);
129 static int nve_detach(device_t);
130 static void nve_init(void *);
131 static void nve_init_locked(struct nve_softc *);
132 static void nve_stop(struct nve_softc *);
133 static int nve_shutdown(device_t);
134 static int nve_init_rings(struct nve_softc *);
135 static void nve_free_rings(struct nve_softc *);
136
137 static void nve_ifstart(struct ifnet *);
138 static void nve_ifstart_locked(struct ifnet *);
139 static int nve_ioctl(struct ifnet *, u_long, caddr_t);
140 static void nve_intr(void *);
141 static void nve_tick(void *);
142 static void nve_setmulti(struct nve_softc *);
143 static void nve_watchdog(struct ifnet *);
144 static void nve_update_stats(struct nve_softc *);
145
146 static int nve_ifmedia_upd(struct ifnet *);
147 static void nve_ifmedia_upd_locked(struct ifnet *);
148 static void nve_ifmedia_sts(struct ifnet *, struct ifmediareq *);
149 static int nve_miibus_readreg(device_t, int, int);
150 static void nve_miibus_writereg(device_t, int, int, int);
151
152 static void nve_dmamap_cb(void *, bus_dma_segment_t *, int, int);
153 static void nve_dmamap_tx_cb(void *, bus_dma_segment_t *, int, bus_size_t, int);
154
155 static NV_SINT32 nve_osalloc(PNV_VOID, PMEMORY_BLOCK);
156 static NV_SINT32 nve_osfree(PNV_VOID, PMEMORY_BLOCK);
157 static NV_SINT32 nve_osallocex(PNV_VOID, PMEMORY_BLOCKEX);
158 static NV_SINT32 nve_osfreeex(PNV_VOID, PMEMORY_BLOCKEX);
159 static NV_SINT32 nve_osclear(PNV_VOID, PNV_VOID, NV_SINT32);
160 static NV_SINT32 nve_osdelay(PNV_VOID, NV_UINT32);
161 static NV_SINT32 nve_osallocrxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID *);
162 static NV_SINT32 nve_osfreerxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID);
163 static NV_SINT32 nve_ospackettx(PNV_VOID, PNV_VOID, NV_UINT32);
164 static NV_SINT32 nve_ospacketrx(PNV_VOID, PNV_VOID, NV_UINT32, NV_UINT8 *, NV_UINT8);
165 static NV_SINT32 nve_oslinkchg(PNV_VOID, NV_SINT32);
166 static NV_SINT32 nve_osalloctimer(PNV_VOID, PNV_VOID *);
167 static NV_SINT32 nve_osfreetimer(PNV_VOID, PNV_VOID);
168 static NV_SINT32 nve_osinittimer(PNV_VOID, PNV_VOID, PTIMER_FUNC, PNV_VOID);
169 static NV_SINT32 nve_ossettimer(PNV_VOID, PNV_VOID, NV_UINT32);
170 static NV_SINT32 nve_oscanceltimer(PNV_VOID, PNV_VOID);
171
172 static NV_SINT32 nve_ospreprocpkt(PNV_VOID, PNV_VOID, PNV_VOID *, NV_UINT8 *, NV_UINT8);
173 static PNV_VOID nve_ospreprocpktnopq(PNV_VOID, PNV_VOID);
174 static NV_SINT32 nve_osindicatepkt(PNV_VOID, PNV_VOID *, NV_UINT32);
175 static NV_SINT32 nve_oslockalloc(PNV_VOID, NV_SINT32, PNV_VOID *);
176 static NV_SINT32 nve_oslockacquire(PNV_VOID, NV_SINT32, PNV_VOID);
177 static NV_SINT32 nve_oslockrelease(PNV_VOID, NV_SINT32, PNV_VOID);
178 static PNV_VOID nve_osreturnbufvirt(PNV_VOID, PNV_VOID);
179
180 static device_method_t nve_methods[] = {
181 /* Device interface */
182 DEVMETHOD(device_probe, nve_probe),
183 DEVMETHOD(device_attach, nve_attach),
184 DEVMETHOD(device_detach, nve_detach),
185 DEVMETHOD(device_shutdown, nve_shutdown),
186
187 /* Bus interface */
188 DEVMETHOD(bus_print_child, bus_generic_print_child),
189 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
190
191 /* MII interface */
192 DEVMETHOD(miibus_readreg, nve_miibus_readreg),
193 DEVMETHOD(miibus_writereg, nve_miibus_writereg),
194
195 {0, 0}
196 };
197
198 static driver_t nve_driver = {
199 "nve",
200 nve_methods,
201 sizeof(struct nve_softc)
202 };
203
204 static devclass_t nve_devclass;
205
206 static int nve_pollinterval = 0;
207 SYSCTL_INT(_hw, OID_AUTO, nve_pollinterval, CTLFLAG_RW,
208 &nve_pollinterval, 0, "delay between interface polls");
209
210 DRIVER_MODULE(nve, pci, nve_driver, nve_devclass, 0, 0);
211 DRIVER_MODULE(miibus, nve, miibus_driver, miibus_devclass, 0, 0);
212
213 static struct nve_type nve_devs[] = {
214 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_LAN,
215 "NVIDIA nForce MCP Networking Adapter"},
216 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_LAN,
217 "NVIDIA nForce2 MCP2 Networking Adapter"},
218 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN1,
219 "NVIDIA nForce2 400 MCP4 Networking Adapter"},
220 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN2,
221 "NVIDIA nForce2 400 MCP5 Networking Adapter"},
222 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN1,
223 "NVIDIA nForce3 MCP3 Networking Adapter"},
224 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_LAN,
225 "NVIDIA nForce3 250 MCP6 Networking Adapter"},
226 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN4,
227 "NVIDIA nForce3 MCP7 Networking Adapter"},
228 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN1,
229 "NVIDIA nForce4 CK804 MCP8 Networking Adapter"},
230 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN2,
231 "NVIDIA nForce4 CK804 MCP9 Networking Adapter"},
232 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN1,
233 "NVIDIA nForce MCP04 Networking Adapter"}, // MCP10
234 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN2,
235 "NVIDIA nForce MCP04 Networking Adapter"}, // MCP11
236 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN1,
237 "NVIDIA nForce 430 MCP12 Networking Adapter"},
238 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN2,
239 "NVIDIA nForce 430 MCP13 Networking Adapter"},
240 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN1,
241 "NVIDIA nForce MCP55 Networking Adapter"},
242 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN2,
243 "NVIDIA nForce MCP55 Networking Adapter"},
244 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN1,
245 "NVIDIA nForce MCP61 Networking Adapter"},
246 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN2,
247 "NVIDIA nForce MCP61 Networking Adapter"},
248 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN3,
249 "NVIDIA nForce MCP61 Networking Adapter"},
250 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN4,
251 "NVIDIA nForce MCP61 Networking Adapter"},
252 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN1,
253 "NVIDIA nForce MCP65 Networking Adapter"},
254 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN2,
255 "NVIDIA nForce MCP65 Networking Adapter"},
256 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN3,
257 "NVIDIA nForce MCP65 Networking Adapter"},
258 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN4,
259 "NVIDIA nForce MCP65 Networking Adapter"},
260 {0, 0, NULL}
261 };
262
263 /* DMA MEM map callback function to get data segment physical address */
264 static void
265 nve_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nsegs, int error)
266 {
267 if (error)
268 return;
269
270 KASSERT(nsegs == 1,
271 ("Too many DMA segments returned when mapping DMA memory"));
272 *(bus_addr_t *)arg = segs->ds_addr;
273 }
274
275 /* DMA RX map callback function to get data segment physical address */
276 static void
277 nve_dmamap_rx_cb(void *arg, bus_dma_segment_t * segs, int nsegs,
278 bus_size_t mapsize, int error)
279 {
280 if (error)
281 return;
282 *(bus_addr_t *)arg = segs->ds_addr;
283 }
284
285 /*
286 * DMA TX buffer callback function to allocate fragment data segment
287 * addresses
288 */
289 static void
290 nve_dmamap_tx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, bus_size_t mapsize, int error)
291 {
292 struct nve_tx_desc *info;
293
294 info = arg;
295 if (error)
296 return;
297 KASSERT(nsegs < NV_MAX_FRAGS,
298 ("Too many DMA segments returned when mapping mbuf"));
299 info->numfrags = nsegs;
300 bcopy(segs, info->frags, nsegs * sizeof(bus_dma_segment_t));
301 }
302
303 /* Probe for supported hardware ID's */
304 static int
305 nve_probe(device_t dev)
306 {
307 struct nve_type *t;
308
309 t = nve_devs;
310 /* Check for matching PCI DEVICE ID's */
311 while (t->name != NULL) {
312 if ((pci_get_vendor(dev) == t->vid_id) &&
313 (pci_get_device(dev) == t->dev_id)) {
314 device_set_desc(dev, t->name);
315 return (BUS_PROBE_LOW_PRIORITY);
316 }
317 t++;
318 }
319
320 return (ENXIO);
321 }
322
323 /* Attach driver and initialise hardware for use */
324 static int
325 nve_attach(device_t dev)
326 {
327 u_char eaddr[ETHER_ADDR_LEN];
328 struct nve_softc *sc;
329 struct ifnet *ifp;
330 OS_API *osapi;
331 ADAPTER_OPEN_PARAMS OpenParams;
332 int error = 0, i, rid;
333
334 if (bootverbose)
335 device_printf(dev, "nvenetlib.o version %s\n", DRIVER_VERSION);
336
337 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - entry\n");
338
339 sc = device_get_softc(dev);
340
341 /* Allocate mutex */
342 mtx_init(&sc->mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
343 MTX_DEF);
344 callout_init_mtx(&sc->stat_callout, &sc->mtx, 0);
345
346 sc->dev = dev;
347
348 /* Preinitialize data structures */
349 bzero(&OpenParams, sizeof(ADAPTER_OPEN_PARAMS));
350
351 /* Enable bus mastering */
352 pci_enable_busmaster(dev);
353
354 /* Allocate memory mapped address space */
355 rid = NV_RID;
356 sc->res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1,
357 RF_ACTIVE);
358
359 if (sc->res == NULL) {
360 device_printf(dev, "couldn't map memory\n");
361 error = ENXIO;
362 goto fail;
363 }
364 sc->sc_st = rman_get_bustag(sc->res);
365 sc->sc_sh = rman_get_bushandle(sc->res);
366
367 /* Allocate interrupt */
368 rid = 0;
369 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
370 RF_SHAREABLE | RF_ACTIVE);
371
372 if (sc->irq == NULL) {
373 device_printf(dev, "couldn't map interrupt\n");
374 error = ENXIO;
375 goto fail;
376 }
377 /* Allocate DMA tags */
378 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
379 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * NV_MAX_FRAGS,
380 NV_MAX_FRAGS, MCLBYTES, 0,
381 busdma_lock_mutex, &Giant,
382 &sc->mtag);
383 if (error) {
384 device_printf(dev, "couldn't allocate dma tag\n");
385 goto fail;
386 }
387 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
388 BUS_SPACE_MAXADDR, NULL, NULL,
389 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 1,
390 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 0,
391 busdma_lock_mutex, &Giant,
392 &sc->rtag);
393 if (error) {
394 device_printf(dev, "couldn't allocate dma tag\n");
395 goto fail;
396 }
397 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
398 BUS_SPACE_MAXADDR, NULL, NULL,
399 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 1,
400 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 0,
401 busdma_lock_mutex, &Giant,
402 &sc->ttag);
403 if (error) {
404 device_printf(dev, "couldn't allocate dma tag\n");
405 goto fail;
406 }
407 /* Allocate DMA safe memory and get the DMA addresses. */
408 error = bus_dmamem_alloc(sc->ttag, (void **)&sc->tx_desc,
409 BUS_DMA_WAITOK, &sc->tmap);
410 if (error) {
411 device_printf(dev, "couldn't allocate dma memory\n");
412 goto fail;
413 }
414 bzero(sc->tx_desc, sizeof(struct nve_tx_desc) * TX_RING_SIZE);
415 error = bus_dmamap_load(sc->ttag, sc->tmap, sc->tx_desc,
416 sizeof(struct nve_tx_desc) * TX_RING_SIZE, nve_dmamap_cb,
417 &sc->tx_addr, 0);
418 if (error) {
419 device_printf(dev, "couldn't map dma memory\n");
420 goto fail;
421 }
422 error = bus_dmamem_alloc(sc->rtag, (void **)&sc->rx_desc,
423 BUS_DMA_WAITOK, &sc->rmap);
424 if (error) {
425 device_printf(dev, "couldn't allocate dma memory\n");
426 goto fail;
427 }
428 bzero(sc->rx_desc, sizeof(struct nve_rx_desc) * RX_RING_SIZE);
429 error = bus_dmamap_load(sc->rtag, sc->rmap, sc->rx_desc,
430 sizeof(struct nve_rx_desc) * RX_RING_SIZE, nve_dmamap_cb,
431 &sc->rx_addr, 0);
432 if (error) {
433 device_printf(dev, "couldn't map dma memory\n");
434 goto fail;
435 }
436 /* Initialize rings. */
437 if (nve_init_rings(sc)) {
438 device_printf(dev, "failed to init rings\n");
439 error = ENXIO;
440 goto fail;
441 }
442 /* Setup NVIDIA API callback routines */
443 osapi = &sc->osapi;
444 osapi->pOSCX = sc;
445 osapi->pfnAllocMemory = nve_osalloc;
446 osapi->pfnFreeMemory = nve_osfree;
447 osapi->pfnAllocMemoryEx = nve_osallocex;
448 osapi->pfnFreeMemoryEx = nve_osfreeex;
449 osapi->pfnClearMemory = nve_osclear;
450 osapi->pfnStallExecution = nve_osdelay;
451 osapi->pfnAllocReceiveBuffer = nve_osallocrxbuf;
452 osapi->pfnFreeReceiveBuffer = nve_osfreerxbuf;
453 osapi->pfnPacketWasSent = nve_ospackettx;
454 osapi->pfnPacketWasReceived = nve_ospacketrx;
455 osapi->pfnLinkStateHasChanged = nve_oslinkchg;
456 osapi->pfnAllocTimer = nve_osalloctimer;
457 osapi->pfnFreeTimer = nve_osfreetimer;
458 osapi->pfnInitializeTimer = nve_osinittimer;
459 osapi->pfnSetTimer = nve_ossettimer;
460 osapi->pfnCancelTimer = nve_oscanceltimer;
461 osapi->pfnPreprocessPacket = nve_ospreprocpkt;
462 osapi->pfnPreprocessPacketNopq = nve_ospreprocpktnopq;
463 osapi->pfnIndicatePackets = nve_osindicatepkt;
464 osapi->pfnLockAlloc = nve_oslockalloc;
465 osapi->pfnLockAcquire = nve_oslockacquire;
466 osapi->pfnLockRelease = nve_oslockrelease;
467 osapi->pfnReturnBufferVirtual = nve_osreturnbufvirt;
468
469 sc->linkup = FALSE;
470 sc->max_frame_size = ETHERMTU + ETHER_HDR_LEN + FCS_LEN;
471
472 /* TODO - We don't support hardware offload yet */
473 sc->hwmode = 1;
474 sc->media = 0;
475
476 /* Set NVIDIA API startup parameters */
477 OpenParams.MaxDpcLoop = 2;
478 OpenParams.MaxRxPkt = RX_RING_SIZE;
479 OpenParams.MaxTxPkt = TX_RING_SIZE;
480 OpenParams.SentPacketStatusSuccess = 1;
481 OpenParams.SentPacketStatusFailure = 0;
482 OpenParams.MaxRxPktToAccumulate = 6;
483 OpenParams.ulPollInterval = nve_pollinterval;
484 OpenParams.SetForcedModeEveryNthRxPacket = 0;
485 OpenParams.SetForcedModeEveryNthTxPacket = 0;
486 OpenParams.RxForcedInterrupt = 0;
487 OpenParams.TxForcedInterrupt = 0;
488 OpenParams.pOSApi = osapi;
489 OpenParams.pvHardwareBaseAddress = rman_get_virtual(sc->res);
490 OpenParams.bASFEnabled = 0;
491 OpenParams.ulDescriptorVersion = sc->hwmode;
492 OpenParams.ulMaxPacketSize = sc->max_frame_size;
493 OpenParams.DeviceId = pci_get_device(dev);
494
495 /* Open NVIDIA Hardware API */
496 error = ADAPTER_Open(&OpenParams, (void **)&(sc->hwapi), &sc->phyaddr);
497 if (error) {
498 device_printf(dev,
499 "failed to open NVIDIA Hardware API: 0x%x\n", error);
500 goto fail;
501 }
502
503 /* TODO - Add support for MODE2 hardware offload */
504
505 bzero(&sc->adapterdata, sizeof(sc->adapterdata));
506
507 sc->adapterdata.ulMediaIF = sc->media;
508 sc->adapterdata.ulModeRegTxReadCompleteEnable = 1;
509 sc->hwapi->pfnSetCommonData(sc->hwapi->pADCX, &sc->adapterdata);
510
511 /* MAC is loaded backwards into h/w reg */
512 sc->hwapi->pfnGetNodeAddress(sc->hwapi->pADCX, sc->original_mac_addr);
513 for (i = 0; i < 6; i++) {
514 eaddr[i] = sc->original_mac_addr[5 - i];
515 }
516 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, eaddr);
517
518 /* Display ethernet address ,... */
519 device_printf(dev, "Ethernet address %6D\n", eaddr, ":");
520
521 /* Allocate interface structures */
522 ifp = sc->ifp = if_alloc(IFT_ETHER);
523 if (ifp == NULL) {
524 device_printf(dev, "can not if_alloc()\n");
525 error = ENOSPC;
526 goto fail;
527 }
528
529 /* Setup interface parameters */
530 ifp->if_softc = sc;
531 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
532 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
533 ifp->if_ioctl = nve_ioctl;
534 ifp->if_output = ether_output;
535 ifp->if_start = nve_ifstart;
536 ifp->if_watchdog = nve_watchdog;
537 ifp->if_timer = 0;
538 ifp->if_init = nve_init;
539 ifp->if_mtu = ETHERMTU;
540 ifp->if_baudrate = IF_Mbps(100);
541 IFQ_SET_MAXLEN(&ifp->if_snd, TX_RING_SIZE - 1);
542 ifp->if_snd.ifq_drv_maxlen = TX_RING_SIZE - 1;
543 IFQ_SET_READY(&ifp->if_snd);
544 ifp->if_capabilities |= IFCAP_VLAN_MTU;
545 ifp->if_capenable |= IFCAP_VLAN_MTU;
546
547 /* Attach device for MII interface to PHY */
548 DEBUGOUT(NVE_DEBUG_INIT, "nve: do mii_attach\n");
549 error = mii_attach(dev, &sc->miibus, ifp, nve_ifmedia_upd,
550 nve_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0);
551 if (error != 0) {
552 device_printf(dev, "attaching PHYs failed\n");
553 goto fail;
554 }
555
556 /* Attach to OS's managers. */
557 ether_ifattach(ifp, eaddr);
558
559 /* Activate our interrupt handler. - attach last to avoid lock */
560 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
561 NULL, nve_intr, sc, &sc->sc_ih);
562 if (error) {
563 device_printf(dev, "couldn't set up interrupt handler\n");
564 goto fail;
565 }
566 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - exit\n");
567
568 fail:
569 if (error)
570 nve_detach(dev);
571
572 return (error);
573 }
574
575 /* Detach interface for module unload */
576 static int
577 nve_detach(device_t dev)
578 {
579 struct nve_softc *sc = device_get_softc(dev);
580 struct ifnet *ifp;
581
582 KASSERT(mtx_initialized(&sc->mtx), ("mutex not initialized"));
583
584 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - entry\n");
585
586 ifp = sc->ifp;
587
588 if (device_is_attached(dev)) {
589 NVE_LOCK(sc);
590 nve_stop(sc);
591 NVE_UNLOCK(sc);
592 callout_drain(&sc->stat_callout);
593 ether_ifdetach(ifp);
594 }
595
596 if (sc->miibus)
597 device_delete_child(dev, sc->miibus);
598 bus_generic_detach(dev);
599
600 /* Reload unreversed address back into MAC in original state */
601 if (sc->original_mac_addr)
602 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX,
603 sc->original_mac_addr);
604
605 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnClose\n");
606 /* Detach from NVIDIA hardware API */
607 if (sc->hwapi->pfnClose)
608 sc->hwapi->pfnClose(sc->hwapi->pADCX, FALSE);
609 /* Release resources */
610 if (sc->sc_ih)
611 bus_teardown_intr(sc->dev, sc->irq, sc->sc_ih);
612 if (sc->irq)
613 bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq);
614 if (sc->res)
615 bus_release_resource(sc->dev, SYS_RES_MEMORY, NV_RID, sc->res);
616
617 nve_free_rings(sc);
618
619 if (sc->tx_desc) {
620 bus_dmamap_unload(sc->rtag, sc->rmap);
621 bus_dmamem_free(sc->rtag, sc->rx_desc, sc->rmap);
622 bus_dmamap_destroy(sc->rtag, sc->rmap);
623 }
624 if (sc->mtag)
625 bus_dma_tag_destroy(sc->mtag);
626 if (sc->ttag)
627 bus_dma_tag_destroy(sc->ttag);
628 if (sc->rtag)
629 bus_dma_tag_destroy(sc->rtag);
630
631 if (ifp)
632 if_free(ifp);
633 mtx_destroy(&sc->mtx);
634
635 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - exit\n");
636
637 return (0);
638 }
639
640 /* Initialise interface and start it "RUNNING" */
641 static void
642 nve_init(void *xsc)
643 {
644 struct nve_softc *sc = xsc;
645
646 NVE_LOCK(sc);
647 nve_init_locked(sc);
648 NVE_UNLOCK(sc);
649 }
650
651 static void
652 nve_init_locked(struct nve_softc *sc)
653 {
654 struct ifnet *ifp;
655 int error;
656
657 NVE_LOCK_ASSERT(sc);
658 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - entry (%d)\n", sc->linkup);
659
660 ifp = sc->ifp;
661
662 /* Do nothing if already running */
663 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
664 return;
665
666 nve_stop(sc);
667 DEBUGOUT(NVE_DEBUG_INIT, "nve: do pfnInit\n");
668
669 nve_ifmedia_upd_locked(ifp);
670
671 /* Setup Hardware interface and allocate memory structures */
672 error = sc->hwapi->pfnInit(sc->hwapi->pADCX,
673 0, /* force speed */
674 0, /* force full duplex */
675 0, /* force mode */
676 0, /* force async mode */
677 &sc->linkup);
678
679 if (error) {
680 device_printf(sc->dev,
681 "failed to start NVIDIA Hardware interface\n");
682 return;
683 }
684 /* Set the MAC address */
685 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, IF_LLADDR(sc->ifp));
686 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
687 sc->hwapi->pfnStart(sc->hwapi->pADCX);
688
689 /* Setup multicast filter */
690 nve_setmulti(sc);
691
692 /* Update interface parameters */
693 ifp->if_drv_flags |= IFF_DRV_RUNNING;
694 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
695
696 callout_reset(&sc->stat_callout, hz, nve_tick, sc);
697
698 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - exit\n");
699
700 return;
701 }
702
703 /* Stop interface activity ie. not "RUNNING" */
704 static void
705 nve_stop(struct nve_softc *sc)
706 {
707 struct ifnet *ifp;
708
709 NVE_LOCK_ASSERT(sc);
710
711 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - entry\n");
712
713 ifp = sc->ifp;
714 ifp->if_timer = 0;
715
716 /* Cancel tick timer */
717 callout_stop(&sc->stat_callout);
718
719 /* Stop hardware activity */
720 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
721 sc->hwapi->pfnStop(sc->hwapi->pADCX, 0);
722
723 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnDeinit\n");
724 /* Shutdown interface and deallocate memory buffers */
725 if (sc->hwapi->pfnDeinit)
726 sc->hwapi->pfnDeinit(sc->hwapi->pADCX, 0);
727
728 sc->linkup = 0;
729 sc->cur_rx = 0;
730 sc->pending_rxs = 0;
731 sc->pending_txs = 0;
732
733 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
734
735 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - exit\n");
736
737 return;
738 }
739
740 /* Shutdown interface for unload/reboot */
741 static int
742 nve_shutdown(device_t dev)
743 {
744 struct nve_softc *sc;
745
746 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_shutdown\n");
747
748 sc = device_get_softc(dev);
749
750 /* Stop hardware activity */
751 NVE_LOCK(sc);
752 nve_stop(sc);
753 NVE_UNLOCK(sc);
754
755 return (0);
756 }
757
758 /* Allocate TX ring buffers */
759 static int
760 nve_init_rings(struct nve_softc *sc)
761 {
762 int error, i;
763
764 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - entry\n");
765
766 sc->cur_rx = sc->cur_tx = sc->pending_rxs = sc->pending_txs = 0;
767 /* Initialise RX ring */
768 for (i = 0; i < RX_RING_SIZE; i++) {
769 struct nve_rx_desc *desc = sc->rx_desc + i;
770 struct nve_map_buffer *buf = &desc->buf;
771
772 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
773 if (buf->mbuf == NULL) {
774 device_printf(sc->dev, "couldn't allocate mbuf\n");
775 nve_free_rings(sc);
776 return (ENOBUFS);
777 }
778 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES;
779 m_adj(buf->mbuf, ETHER_ALIGN);
780
781 error = bus_dmamap_create(sc->mtag, 0, &buf->map);
782 if (error) {
783 device_printf(sc->dev, "couldn't create dma map\n");
784 nve_free_rings(sc);
785 return (error);
786 }
787 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf,
788 nve_dmamap_rx_cb, &desc->paddr, 0);
789 if (error) {
790 device_printf(sc->dev, "couldn't dma map mbuf\n");
791 nve_free_rings(sc);
792 return (error);
793 }
794 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD);
795
796 desc->buflength = buf->mbuf->m_len;
797 desc->vaddr = mtod(buf->mbuf, caddr_t);
798 }
799 bus_dmamap_sync(sc->rtag, sc->rmap,
800 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
801
802 /* Initialize TX ring */
803 for (i = 0; i < TX_RING_SIZE; i++) {
804 struct nve_tx_desc *desc = sc->tx_desc + i;
805 struct nve_map_buffer *buf = &desc->buf;
806
807 buf->mbuf = NULL;
808
809 error = bus_dmamap_create(sc->mtag, 0, &buf->map);
810 if (error) {
811 device_printf(sc->dev, "couldn't create dma map\n");
812 nve_free_rings(sc);
813 return (error);
814 }
815 }
816 bus_dmamap_sync(sc->ttag, sc->tmap,
817 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
818
819 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - exit\n");
820
821 return (error);
822 }
823
824 /* Free the TX ring buffers */
825 static void
826 nve_free_rings(struct nve_softc *sc)
827 {
828 int i;
829
830 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - entry\n");
831
832 for (i = 0; i < RX_RING_SIZE; i++) {
833 struct nve_rx_desc *desc = sc->rx_desc + i;
834 struct nve_map_buffer *buf = &desc->buf;
835
836 if (buf->mbuf) {
837 bus_dmamap_unload(sc->mtag, buf->map);
838 bus_dmamap_destroy(sc->mtag, buf->map);
839 m_freem(buf->mbuf);
840 }
841 buf->mbuf = NULL;
842 }
843
844 for (i = 0; i < TX_RING_SIZE; i++) {
845 struct nve_tx_desc *desc = sc->tx_desc + i;
846 struct nve_map_buffer *buf = &desc->buf;
847
848 if (buf->mbuf) {
849 bus_dmamap_unload(sc->mtag, buf->map);
850 bus_dmamap_destroy(sc->mtag, buf->map);
851 m_freem(buf->mbuf);
852 }
853 buf->mbuf = NULL;
854 }
855
856 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - exit\n");
857 }
858
859 /* Main loop for sending packets from OS to interface */
860 static void
861 nve_ifstart(struct ifnet *ifp)
862 {
863 struct nve_softc *sc = ifp->if_softc;
864
865 NVE_LOCK(sc);
866 nve_ifstart_locked(ifp);
867 NVE_UNLOCK(sc);
868 }
869
870 static void
871 nve_ifstart_locked(struct ifnet *ifp)
872 {
873 struct nve_softc *sc = ifp->if_softc;
874 struct nve_map_buffer *buf;
875 struct mbuf *m0, *m;
876 struct nve_tx_desc *desc;
877 ADAPTER_WRITE_DATA txdata;
878 int error, i;
879
880 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - entry\n");
881
882 NVE_LOCK_ASSERT(sc);
883
884 /* If link is down/busy or queue is empty do nothing */
885 if (ifp->if_drv_flags & IFF_DRV_OACTIVE ||
886 IFQ_DRV_IS_EMPTY(&ifp->if_snd))
887 return;
888
889 /* Transmit queued packets until sent or TX ring is full */
890 while (sc->pending_txs < TX_RING_SIZE) {
891 desc = sc->tx_desc + sc->cur_tx;
892 buf = &desc->buf;
893
894 /* Get next packet to send. */
895 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0);
896
897 /* If nothing to send, return. */
898 if (m0 == NULL)
899 return;
900
901 /*
902 * On nForce4, the chip doesn't interrupt on transmit,
903 * so try to flush transmitted packets from the queue
904 * if it's getting large (see note in nve_watchdog).
905 */
906 if (sc->pending_txs > TX_RING_SIZE/2) {
907 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
908 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
909 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
910 }
911
912 /* Map MBUF for DMA access */
913 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m0,
914 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT);
915
916 if (error && error != EFBIG) {
917 m_freem(m0);
918 sc->tx_errors++;
919 continue;
920 }
921 /*
922 * Packet has too many fragments - defrag into new mbuf
923 * cluster
924 */
925 if (error) {
926 m = m_defrag(m0, M_DONTWAIT);
927 if (m == NULL) {
928 m_freem(m0);
929 sc->tx_errors++;
930 continue;
931 }
932 m0 = m;
933
934 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m,
935 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT);
936 if (error) {
937 m_freem(m);
938 sc->tx_errors++;
939 continue;
940 }
941 }
942 /* Do sync on DMA bounce buffer */
943 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREWRITE);
944
945 buf->mbuf = m0;
946 txdata.ulNumberOfElements = desc->numfrags;
947 txdata.pvID = (PVOID)desc;
948
949 /* Put fragments into API element list */
950 txdata.ulTotalLength = buf->mbuf->m_len;
951 for (i = 0; i < desc->numfrags; i++) {
952 txdata.sElement[i].ulLength =
953 (ulong)desc->frags[i].ds_len;
954 txdata.sElement[i].pPhysical =
955 (PVOID)desc->frags[i].ds_addr;
956 }
957
958 /* Send packet to Nvidia API for transmission */
959 error = sc->hwapi->pfnWrite(sc->hwapi->pADCX, &txdata);
960
961 switch (error) {
962 case ADAPTERERR_NONE:
963 /* Packet was queued in API TX queue successfully */
964 sc->pending_txs++;
965 sc->cur_tx = (sc->cur_tx + 1) % TX_RING_SIZE;
966 break;
967
968 case ADAPTERERR_TRANSMIT_QUEUE_FULL:
969 /* The API TX queue is full - requeue the packet */
970 device_printf(sc->dev,
971 "nve_ifstart: transmit queue is full\n");
972 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
973 bus_dmamap_unload(sc->mtag, buf->map);
974 IFQ_DRV_PREPEND(&ifp->if_snd, buf->mbuf);
975 buf->mbuf = NULL;
976 return;
977
978 default:
979 /* The API failed to queue/send the packet so dump it */
980 device_printf(sc->dev, "nve_ifstart: transmit error\n");
981 bus_dmamap_unload(sc->mtag, buf->map);
982 m_freem(buf->mbuf);
983 buf->mbuf = NULL;
984 sc->tx_errors++;
985 return;
986 }
987 /* Set watchdog timer. */
988 ifp->if_timer = 8;
989
990 /* Copy packet to BPF tap */
991 BPF_MTAP(ifp, m0);
992 }
993 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
994
995 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - exit\n");
996 }
997
998 /* Handle IOCTL events */
999 static int
1000 nve_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1001 {
1002 struct nve_softc *sc = ifp->if_softc;
1003 struct ifreq *ifr = (struct ifreq *) data;
1004 struct mii_data *mii;
1005 int error = 0;
1006
1007 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - entry\n");
1008
1009 switch (command) {
1010 case SIOCSIFMTU:
1011 /* Set MTU size */
1012 NVE_LOCK(sc);
1013 if (ifp->if_mtu == ifr->ifr_mtu) {
1014 NVE_UNLOCK(sc);
1015 break;
1016 }
1017 if (ifr->ifr_mtu + ifp->if_hdrlen <= MAX_PACKET_SIZE_1518) {
1018 ifp->if_mtu = ifr->ifr_mtu;
1019 nve_stop(sc);
1020 nve_init_locked(sc);
1021 } else
1022 error = EINVAL;
1023 NVE_UNLOCK(sc);
1024 break;
1025
1026 case SIOCSIFFLAGS:
1027 /* Setup interface flags */
1028 NVE_LOCK(sc);
1029 if (ifp->if_flags & IFF_UP) {
1030 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1031 nve_init_locked(sc);
1032 NVE_UNLOCK(sc);
1033 break;
1034 }
1035 } else {
1036 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1037 nve_stop(sc);
1038 NVE_UNLOCK(sc);
1039 break;
1040 }
1041 }
1042 /* Handle IFF_PROMISC and IFF_ALLMULTI flags. */
1043 nve_setmulti(sc);
1044 NVE_UNLOCK(sc);
1045 break;
1046
1047 case SIOCADDMULTI:
1048 case SIOCDELMULTI:
1049 /* Setup multicast filter */
1050 NVE_LOCK(sc);
1051 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1052 nve_setmulti(sc);
1053 }
1054 NVE_UNLOCK(sc);
1055 break;
1056
1057 case SIOCGIFMEDIA:
1058 case SIOCSIFMEDIA:
1059 /* Get/Set interface media parameters */
1060 mii = device_get_softc(sc->miibus);
1061 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1062 break;
1063
1064 default:
1065 /* Everything else we forward to generic ether ioctl */
1066 error = ether_ioctl(ifp, command, data);
1067 break;
1068 }
1069
1070 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - exit\n");
1071
1072 return (error);
1073 }
1074
1075 /* Interrupt service routine */
1076 static void
1077 nve_intr(void *arg)
1078 {
1079 struct nve_softc *sc = arg;
1080 struct ifnet *ifp = sc->ifp;
1081
1082 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - entry\n");
1083
1084 NVE_LOCK(sc);
1085 if (!ifp->if_flags & IFF_UP) {
1086 nve_stop(sc);
1087 NVE_UNLOCK(sc);
1088 return;
1089 }
1090 /* Handle interrupt event */
1091 if (sc->hwapi->pfnQueryInterrupt(sc->hwapi->pADCX)) {
1092 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
1093 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
1094 }
1095 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1096 nve_ifstart_locked(ifp);
1097
1098 /* If no pending packets we don't need a timeout */
1099 if (sc->pending_txs == 0)
1100 sc->ifp->if_timer = 0;
1101 NVE_UNLOCK(sc);
1102
1103 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - exit\n");
1104
1105 return;
1106 }
1107
1108 /* Setup multicast filters */
1109 static void
1110 nve_setmulti(struct nve_softc *sc)
1111 {
1112 struct ifnet *ifp;
1113 struct ifmultiaddr *ifma;
1114 PACKET_FILTER hwfilter;
1115 int i;
1116 u_int8_t andaddr[6], oraddr[6];
1117
1118 NVE_LOCK_ASSERT(sc);
1119
1120 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - entry\n");
1121
1122 ifp = sc->ifp;
1123
1124 /* Initialize filter */
1125 hwfilter.ulFilterFlags = 0;
1126 for (i = 0; i < 6; i++) {
1127 hwfilter.acMulticastAddress[i] = 0;
1128 hwfilter.acMulticastMask[i] = 0;
1129 }
1130
1131 if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) {
1132 /* Accept all packets */
1133 hwfilter.ulFilterFlags |= ACCEPT_ALL_PACKETS;
1134 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter);
1135 return;
1136 }
1137 /* Setup multicast filter */
1138 IF_ADDR_LOCK(ifp);
1139 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1140 u_char *addrp;
1141
1142 if (ifma->ifma_addr->sa_family != AF_LINK)
1143 continue;
1144
1145 addrp = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
1146 for (i = 0; i < 6; i++) {
1147 u_int8_t mcaddr = addrp[i];
1148 andaddr[i] &= mcaddr;
1149 oraddr[i] |= mcaddr;
1150 }
1151 }
1152 IF_ADDR_UNLOCK(ifp);
1153 for (i = 0; i < 6; i++) {
1154 hwfilter.acMulticastAddress[i] = andaddr[i] & oraddr[i];
1155 hwfilter.acMulticastMask[i] = andaddr[i] | (~oraddr[i]);
1156 }
1157
1158 /* Send filter to NVIDIA API */
1159 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter);
1160
1161 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - exit\n");
1162
1163 return;
1164 }
1165
1166 /* Change the current media/mediaopts */
1167 static int
1168 nve_ifmedia_upd(struct ifnet *ifp)
1169 {
1170 struct nve_softc *sc = ifp->if_softc;
1171
1172 NVE_LOCK(sc);
1173 nve_ifmedia_upd_locked(ifp);
1174 NVE_UNLOCK(sc);
1175 return (0);
1176 }
1177
1178 static void
1179 nve_ifmedia_upd_locked(struct ifnet *ifp)
1180 {
1181 struct nve_softc *sc = ifp->if_softc;
1182 struct mii_data *mii;
1183
1184 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_upd\n");
1185
1186 NVE_LOCK_ASSERT(sc);
1187 mii = device_get_softc(sc->miibus);
1188
1189 if (mii->mii_instance) {
1190 struct mii_softc *miisc;
1191 for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL;
1192 miisc = LIST_NEXT(miisc, mii_list)) {
1193 mii_phy_reset(miisc);
1194 }
1195 }
1196 mii_mediachg(mii);
1197 }
1198
1199 /* Update current miibus PHY status of media */
1200 static void
1201 nve_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1202 {
1203 struct nve_softc *sc;
1204 struct mii_data *mii;
1205
1206 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_sts\n");
1207
1208 sc = ifp->if_softc;
1209 NVE_LOCK(sc);
1210 mii = device_get_softc(sc->miibus);
1211 mii_pollstat(mii);
1212 NVE_UNLOCK(sc);
1213
1214 ifmr->ifm_active = mii->mii_media_active;
1215 ifmr->ifm_status = mii->mii_media_status;
1216
1217 return;
1218 }
1219
1220 /* miibus tick timer - maintain link status */
1221 static void
1222 nve_tick(void *xsc)
1223 {
1224 struct nve_softc *sc = xsc;
1225 struct mii_data *mii;
1226 struct ifnet *ifp;
1227
1228 NVE_LOCK_ASSERT(sc);
1229
1230 ifp = sc->ifp;
1231 nve_update_stats(sc);
1232
1233 mii = device_get_softc(sc->miibus);
1234 mii_tick(mii);
1235
1236 if (mii->mii_media_status & IFM_ACTIVE &&
1237 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
1238 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1239 nve_ifstart_locked(ifp);
1240 }
1241 callout_reset(&sc->stat_callout, hz, nve_tick, sc);
1242
1243 return;
1244 }
1245
1246 /* Update ifnet data structure with collected interface stats from API */
1247 static void
1248 nve_update_stats(struct nve_softc *sc)
1249 {
1250 struct ifnet *ifp = sc->ifp;
1251 ADAPTER_STATS stats;
1252
1253 NVE_LOCK_ASSERT(sc);
1254
1255 if (sc->hwapi) {
1256 sc->hwapi->pfnGetStatistics(sc->hwapi->pADCX, &stats);
1257
1258 ifp->if_ipackets = stats.ulSuccessfulReceptions;
1259 ifp->if_ierrors = stats.ulMissedFrames +
1260 stats.ulFailedReceptions +
1261 stats.ulCRCErrors +
1262 stats.ulFramingErrors +
1263 stats.ulOverFlowErrors;
1264
1265 ifp->if_opackets = stats.ulSuccessfulTransmissions;
1266 ifp->if_oerrors = sc->tx_errors +
1267 stats.ulFailedTransmissions +
1268 stats.ulRetryErrors +
1269 stats.ulUnderflowErrors +
1270 stats.ulLossOfCarrierErrors +
1271 stats.ulLateCollisionErrors;
1272
1273 ifp->if_collisions = stats.ulLateCollisionErrors;
1274 }
1275
1276 return;
1277 }
1278
1279 /* miibus Read PHY register wrapper - calls Nvidia API entry point */
1280 static int
1281 nve_miibus_readreg(device_t dev, int phy, int reg)
1282 {
1283 struct nve_softc *sc = device_get_softc(dev);
1284 ULONG data;
1285
1286 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - entry\n");
1287
1288 ADAPTER_ReadPhy(sc->hwapi->pADCX, phy, reg, &data);
1289
1290 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - exit\n");
1291
1292 return (data);
1293 }
1294
1295 /* miibus Write PHY register wrapper - calls Nvidia API entry point */
1296 static void
1297 nve_miibus_writereg(device_t dev, int phy, int reg, int data)
1298 {
1299 struct nve_softc *sc = device_get_softc(dev);
1300
1301 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - entry\n");
1302
1303 ADAPTER_WritePhy(sc->hwapi->pADCX, phy, reg, (ulong)data);
1304
1305 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - exit\n");
1306
1307 return;
1308 }
1309
1310 /* Watchdog timer to prevent PHY lockups */
1311 static void
1312 nve_watchdog(struct ifnet *ifp)
1313 {
1314 struct nve_softc *sc = ifp->if_softc;
1315 int pending_txs_start;
1316
1317 NVE_LOCK(sc);
1318
1319 /*
1320 * The nvidia driver blob defers tx completion notifications.
1321 * Thus, sometimes the watchdog timer will go off when the
1322 * tx engine is fine, but the tx completions are just deferred.
1323 * Try kicking the driver blob to clear out any pending tx
1324 * completions. If that clears up any of the pending tx
1325 * operations, then just return without printing the warning
1326 * message or resetting the adapter, as we can then conclude
1327 * the chip hasn't actually crashed (it's still sending packets).
1328 */
1329 pending_txs_start = sc->pending_txs;
1330 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
1331 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
1332 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
1333 if (sc->pending_txs < pending_txs_start) {
1334 NVE_UNLOCK(sc);
1335 return;
1336 }
1337
1338 device_printf(sc->dev, "device timeout (%d)\n", sc->pending_txs);
1339
1340 sc->tx_errors++;
1341
1342 nve_stop(sc);
1343 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1344 nve_init_locked(sc);
1345
1346 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1347 nve_ifstart_locked(ifp);
1348 NVE_UNLOCK(sc);
1349
1350 return;
1351 }
1352
1353 /* --- Start of NVOSAPI interface --- */
1354
1355 /* Allocate DMA enabled general use memory for API */
1356 static NV_SINT32
1357 nve_osalloc(PNV_VOID ctx, PMEMORY_BLOCK mem)
1358 {
1359 struct nve_softc *sc;
1360 bus_addr_t mem_physical;
1361
1362 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc - %d\n", mem->uiLength);
1363
1364 sc = (struct nve_softc *)ctx;
1365
1366 mem->pLogical = (PVOID)contigmalloc(mem->uiLength, M_DEVBUF,
1367 M_NOWAIT | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0);
1368
1369 if (!mem->pLogical) {
1370 device_printf(sc->dev, "memory allocation failed\n");
1371 return (0);
1372 }
1373 memset(mem->pLogical, 0, (ulong)mem->uiLength);
1374 mem_physical = vtophys(mem->pLogical);
1375 mem->pPhysical = (PVOID)mem_physical;
1376
1377 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc 0x%x/0x%x - %d\n",
1378 (uint)mem->pLogical, (uint)mem->pPhysical, (uint)mem->uiLength);
1379
1380 return (1);
1381 }
1382
1383 /* Free allocated memory */
1384 static NV_SINT32
1385 nve_osfree(PNV_VOID ctx, PMEMORY_BLOCK mem)
1386 {
1387 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfree - 0x%x - %d\n",
1388 (uint)mem->pLogical, (uint) mem->uiLength);
1389
1390 contigfree(mem->pLogical, PAGE_SIZE, M_DEVBUF);
1391 return (1);
1392 }
1393
1394 /* Copied directly from nvnet.c */
1395 static NV_SINT32
1396 nve_osallocex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex)
1397 {
1398 MEMORY_BLOCK mem_block;
1399
1400 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocex\n");
1401
1402 mem_block_ex->pLogical = NULL;
1403 mem_block_ex->uiLengthOrig = mem_block_ex->uiLength;
1404
1405 if ((mem_block_ex->AllocFlags & ALLOC_MEMORY_ALIGNED) &&
1406 (mem_block_ex->AlignmentSize > 1)) {
1407 DEBUGOUT(NVE_DEBUG_API, " aligning on %d\n",
1408 mem_block_ex->AlignmentSize);
1409 mem_block_ex->uiLengthOrig += mem_block_ex->AlignmentSize;
1410 }
1411 mem_block.uiLength = mem_block_ex->uiLengthOrig;
1412
1413 if (nve_osalloc(ctx, &mem_block) == 0) {
1414 return (0);
1415 }
1416 mem_block_ex->pLogicalOrig = mem_block.pLogical;
1417 mem_block_ex->pPhysicalOrigLow = (unsigned long)mem_block.pPhysical;
1418 mem_block_ex->pPhysicalOrigHigh = 0;
1419
1420 mem_block_ex->pPhysical = mem_block.pPhysical;
1421 mem_block_ex->pLogical = mem_block.pLogical;
1422
1423 if (mem_block_ex->uiLength != mem_block_ex->uiLengthOrig) {
1424 unsigned int offset;
1425 offset = mem_block_ex->pPhysicalOrigLow &
1426 (mem_block_ex->AlignmentSize - 1);
1427
1428 if (offset) {
1429 mem_block_ex->pPhysical =
1430 (PVOID)((ulong)mem_block_ex->pPhysical +
1431 mem_block_ex->AlignmentSize - offset);
1432 mem_block_ex->pLogical =
1433 (PVOID)((ulong)mem_block_ex->pLogical +
1434 mem_block_ex->AlignmentSize - offset);
1435 } /* if (offset) */
1436 } /* if (mem_block_ex->uiLength != *mem_block_ex->uiLengthOrig) */
1437 return (1);
1438 }
1439
1440 /* Copied directly from nvnet.c */
1441 static NV_SINT32
1442 nve_osfreeex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex)
1443 {
1444 MEMORY_BLOCK mem_block;
1445
1446 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreeex\n");
1447
1448 mem_block.pLogical = mem_block_ex->pLogicalOrig;
1449 mem_block.pPhysical = (PVOID)((ulong)mem_block_ex->pPhysicalOrigLow);
1450 mem_block.uiLength = mem_block_ex->uiLengthOrig;
1451
1452 return (nve_osfree(ctx, &mem_block));
1453 }
1454
1455 /* Clear memory region */
1456 static NV_SINT32
1457 nve_osclear(PNV_VOID ctx, PNV_VOID mem, NV_SINT32 length)
1458 {
1459 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osclear\n");
1460 memset(mem, 0, length);
1461 return (1);
1462 }
1463
1464 /* Sleep for a tick */
1465 static NV_SINT32
1466 nve_osdelay(PNV_VOID ctx, NV_UINT32 usec)
1467 {
1468 DELAY(usec);
1469 return (1);
1470 }
1471
1472 /* Allocate memory for rx buffer */
1473 static NV_SINT32
1474 nve_osallocrxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID *id)
1475 {
1476 struct nve_softc *sc = ctx;
1477 struct nve_rx_desc *desc;
1478 struct nve_map_buffer *buf;
1479 int error;
1480
1481 if (device_is_attached(sc->dev))
1482 NVE_LOCK_ASSERT(sc);
1483
1484 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocrxbuf\n");
1485
1486 if (sc->pending_rxs == RX_RING_SIZE) {
1487 device_printf(sc->dev, "rx ring buffer is full\n");
1488 goto fail;
1489 }
1490 desc = sc->rx_desc + sc->cur_rx;
1491 buf = &desc->buf;
1492
1493 if (buf->mbuf == NULL) {
1494 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1495 if (buf->mbuf == NULL) {
1496 device_printf(sc->dev, "failed to allocate memory\n");
1497 goto fail;
1498 }
1499 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES;
1500 m_adj(buf->mbuf, ETHER_ALIGN);
1501
1502 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf,
1503 nve_dmamap_rx_cb, &desc->paddr, 0);
1504 if (error) {
1505 device_printf(sc->dev, "failed to dmamap mbuf\n");
1506 m_freem(buf->mbuf);
1507 buf->mbuf = NULL;
1508 goto fail;
1509 }
1510 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD);
1511 desc->buflength = buf->mbuf->m_len;
1512 desc->vaddr = mtod(buf->mbuf, caddr_t);
1513 }
1514 sc->pending_rxs++;
1515 sc->cur_rx = (sc->cur_rx + 1) % RX_RING_SIZE;
1516
1517 mem->pLogical = (void *)desc->vaddr;
1518 mem->pPhysical = (void *)desc->paddr;
1519 mem->uiLength = desc->buflength;
1520 *id = (void *)desc;
1521
1522 return (1);
1523
1524 fail:
1525 return (0);
1526 }
1527
1528 /* Free the rx buffer */
1529 static NV_SINT32
1530 nve_osfreerxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID id)
1531 {
1532 struct nve_softc *sc = ctx;
1533 struct nve_rx_desc *desc;
1534 struct nve_map_buffer *buf;
1535
1536 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreerxbuf\n");
1537
1538 desc = (struct nve_rx_desc *) id;
1539 buf = &desc->buf;
1540
1541 if (buf->mbuf) {
1542 bus_dmamap_unload(sc->mtag, buf->map);
1543 bus_dmamap_destroy(sc->mtag, buf->map);
1544 m_freem(buf->mbuf);
1545 }
1546 sc->pending_rxs--;
1547 buf->mbuf = NULL;
1548
1549 return (1);
1550 }
1551
1552 /* This gets called by the Nvidia API after our TX packet has been sent */
1553 static NV_SINT32
1554 nve_ospackettx(PNV_VOID ctx, PNV_VOID id, NV_UINT32 success)
1555 {
1556 struct nve_softc *sc = ctx;
1557 struct nve_map_buffer *buf;
1558 struct nve_tx_desc *desc = (struct nve_tx_desc *) id;
1559 struct ifnet *ifp;
1560
1561 NVE_LOCK_ASSERT(sc);
1562
1563 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospackettx\n");
1564
1565 ifp = sc->ifp;
1566 buf = &desc->buf;
1567 sc->pending_txs--;
1568
1569 /* Unload and free mbuf cluster */
1570 if (buf->mbuf == NULL)
1571 goto fail;
1572
1573 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTWRITE);
1574 bus_dmamap_unload(sc->mtag, buf->map);
1575 m_freem(buf->mbuf);
1576 buf->mbuf = NULL;
1577
1578 /* Send more packets if we have them */
1579 if (sc->pending_txs < TX_RING_SIZE)
1580 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1581
1582 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd) && sc->pending_txs < TX_RING_SIZE)
1583 nve_ifstart_locked(ifp);
1584
1585 fail:
1586
1587 return (1);
1588 }
1589
1590 /* This gets called by the Nvidia API when a new packet has been received */
1591 /* XXX What is newbuf used for? XXX */
1592 static NV_SINT32
1593 nve_ospacketrx(PNV_VOID ctx, PNV_VOID data, NV_UINT32 success, NV_UINT8 *newbuf,
1594 NV_UINT8 priority)
1595 {
1596 struct nve_softc *sc = ctx;
1597 struct ifnet *ifp;
1598 struct nve_rx_desc *desc;
1599 struct nve_map_buffer *buf;
1600 ADAPTER_READ_DATA *readdata;
1601 struct mbuf *m;
1602
1603 NVE_LOCK_ASSERT(sc);
1604
1605 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospacketrx\n");
1606
1607 ifp = sc->ifp;
1608
1609 readdata = (ADAPTER_READ_DATA *) data;
1610 desc = readdata->pvID;
1611 buf = &desc->buf;
1612 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1613
1614 if (success) {
1615 /* Sync DMA bounce buffer. */
1616 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1617
1618 /* First mbuf in packet holds the ethernet and packet headers */
1619 buf->mbuf->m_pkthdr.rcvif = ifp;
1620 buf->mbuf->m_pkthdr.len = buf->mbuf->m_len =
1621 readdata->ulTotalLength;
1622
1623 bus_dmamap_unload(sc->mtag, buf->map);
1624
1625 /* Blat the mbuf pointer, kernel will free the mbuf cluster */
1626 m = buf->mbuf;
1627 buf->mbuf = NULL;
1628
1629 /* Give mbuf to OS. */
1630 NVE_UNLOCK(sc);
1631 (*ifp->if_input)(ifp, m);
1632 NVE_LOCK(sc);
1633 if (readdata->ulFilterMatch & ADREADFL_MULTICAST_MATCH)
1634 ifp->if_imcasts++;
1635
1636 } else {
1637 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1638 bus_dmamap_unload(sc->mtag, buf->map);
1639 m_freem(buf->mbuf);
1640 buf->mbuf = NULL;
1641 }
1642
1643 sc->cur_rx = desc - sc->rx_desc;
1644 sc->pending_rxs--;
1645
1646 return (1);
1647 }
1648
1649 /* This gets called by NVIDIA API when the PHY link state changes */
1650 static NV_SINT32
1651 nve_oslinkchg(PNV_VOID ctx, NV_SINT32 enabled)
1652 {
1653
1654 DEBUGOUT(NVE_DEBUG_API, "nve: nve_oslinkchg\n");
1655
1656 return (1);
1657 }
1658
1659 /* Setup a watchdog timer */
1660 static NV_SINT32
1661 nve_osalloctimer(PNV_VOID ctx, PNV_VOID *timer)
1662 {
1663 struct nve_softc *sc = (struct nve_softc *)ctx;
1664
1665 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osalloctimer\n");
1666
1667 callout_init(&sc->ostimer, CALLOUT_MPSAFE);
1668 *timer = &sc->ostimer;
1669
1670 return (1);
1671 }
1672
1673 /* Free the timer */
1674 static NV_SINT32
1675 nve_osfreetimer(PNV_VOID ctx, PNV_VOID timer)
1676 {
1677
1678 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osfreetimer\n");
1679
1680 callout_drain((struct callout *)timer);
1681
1682 return (1);
1683 }
1684
1685 /* Setup timer parameters */
1686 static NV_SINT32
1687 nve_osinittimer(PNV_VOID ctx, PNV_VOID timer, PTIMER_FUNC func, PNV_VOID parameters)
1688 {
1689 struct nve_softc *sc = (struct nve_softc *)ctx;
1690
1691 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osinittimer\n");
1692
1693 sc->ostimer_func = func;
1694 sc->ostimer_params = parameters;
1695
1696 return (1);
1697 }
1698
1699 /* Set the timer to go off */
1700 static NV_SINT32
1701 nve_ossettimer(PNV_VOID ctx, PNV_VOID timer, NV_UINT32 delay)
1702 {
1703 struct nve_softc *sc = ctx;
1704
1705 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ossettimer\n");
1706
1707 callout_reset((struct callout *)timer, delay, sc->ostimer_func,
1708 sc->ostimer_params);
1709
1710 return (1);
1711 }
1712
1713 /* Cancel the timer */
1714 static NV_SINT32
1715 nve_oscanceltimer(PNV_VOID ctx, PNV_VOID timer)
1716 {
1717
1718 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_oscanceltimer\n");
1719
1720 callout_stop((struct callout *)timer);
1721
1722 return (1);
1723 }
1724
1725 static NV_SINT32
1726 nve_ospreprocpkt(PNV_VOID ctx, PNV_VOID readdata, PNV_VOID *id,
1727 NV_UINT8 *newbuffer, NV_UINT8 priority)
1728 {
1729
1730 /* Not implemented */
1731 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n");
1732
1733 return (1);
1734 }
1735
1736 static PNV_VOID
1737 nve_ospreprocpktnopq(PNV_VOID ctx, PNV_VOID readdata)
1738 {
1739
1740 /* Not implemented */
1741 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n");
1742
1743 return (NULL);
1744 }
1745
1746 static NV_SINT32
1747 nve_osindicatepkt(PNV_VOID ctx, PNV_VOID *id, NV_UINT32 pktno)
1748 {
1749
1750 /* Not implemented */
1751 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osindicatepkt\n");
1752
1753 return (1);
1754 }
1755
1756 /* Allocate mutex context (already done in nve_attach) */
1757 static NV_SINT32
1758 nve_oslockalloc(PNV_VOID ctx, NV_SINT32 type, PNV_VOID *pLock)
1759 {
1760 struct nve_softc *sc = (struct nve_softc *)ctx;
1761
1762 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockalloc\n");
1763
1764 *pLock = (void **)sc;
1765
1766 return (1);
1767 }
1768
1769 /* Obtain a spin lock */
1770 static NV_SINT32
1771 nve_oslockacquire(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock)
1772 {
1773
1774 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockacquire\n");
1775
1776 return (1);
1777 }
1778
1779 /* Release lock */
1780 static NV_SINT32
1781 nve_oslockrelease(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock)
1782 {
1783
1784 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockrelease\n");
1785
1786 return (1);
1787 }
1788
1789 /* I have no idea what this is for */
1790 static PNV_VOID
1791 nve_osreturnbufvirt(PNV_VOID ctx, PNV_VOID readdata)
1792 {
1793
1794 /* Not implemented */
1795 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_osreturnbufvirt\n");
1796 panic("nve: nve_osreturnbufvirtual not implemented\n");
1797
1798 return (NULL);
1799 }
1800
1801 /* --- End on NVOSAPI interface --- */
Cache object: 6d1cd6f8f7e2586a2f2b88e3ba0ca9c1
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