FreeBSD/Linux Kernel Cross Reference
sys/dev/nve/if_nve.c
1 /*-
2 * Copyright (c) 2005 by David E. O'Brien <obrien@FreeBSD.org>.
3 * Copyright (c) 2003,2004 by Quinton Dolan <q@onthenet.com.au>.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
16 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $Id: if_nv.c,v 1.19 2004/08/12 14:00:05 q Exp $
28 */
29 /*
30 * NVIDIA nForce MCP Networking Adapter driver
31 *
32 * This is a port of the NVIDIA MCP Linux ethernet driver distributed by NVIDIA
33 * through their web site.
34 *
35 * All mainstream nForce and nForce2 motherboards are supported. This module
36 * is as stable, sometimes more stable, than the linux version. (Recent
37 * Linux stability issues seem to be related to some issues with newer
38 * distributions using GCC 3.x, however this don't appear to effect FreeBSD
39 * 5.x).
40 *
41 * In accordance with the NVIDIA distribution license it is necessary to
42 * link this module against the nvlibnet.o binary object included in the
43 * Linux driver source distribution. The binary component is not modified in
44 * any way and is simply linked against a FreeBSD equivalent of the nvnet.c
45 * linux kernel module "wrapper".
46 *
47 * The Linux driver uses a common code API that is shared between Win32 and
48 * i386 Linux. This abstracts the low level driver functions and uses
49 * callbacks and hooks to access the underlying hardware device. By using
50 * this same API in a FreeBSD kernel module it is possible to support the
51 * hardware without breaching the Linux source distributions licensing
52 * requirements, or obtaining the hardware programming specifications.
53 *
54 * Although not conventional, it works, and given the relatively small
55 * amount of hardware centric code, it's hopefully no more buggy than its
56 * linux counterpart.
57 *
58 * NVIDIA now support the nForce3 AMD64 platform, however I have been
59 * unable to access such a system to verify support. However, the code is
60 * reported to work with little modification when compiled with the AMD64
61 * version of the NVIDIA Linux library. All that should be necessary to make
62 * the driver work is to link it directly into the kernel, instead of as a
63 * module, and apply the docs/amd64.diff patch in this source distribution to
64 * the NVIDIA Linux driver source.
65 *
66 * This driver should work on all versions of FreeBSD since 4.9/5.1 as well
67 * as recent versions of DragonFly.
68 *
69 * Written by Quinton Dolan <q@onthenet.com.au>
70 * Portions based on existing FreeBSD network drivers.
71 * NVIDIA API usage derived from distributed NVIDIA NVNET driver source files.
72 */
73
74 #include <sys/cdefs.h>
75 __FBSDID("$FreeBSD: releng/9.0/sys/dev/nve/if_nve.c 221407 2011-05-03 19:51:29Z marius $");
76
77 #include <sys/param.h>
78 #include <sys/systm.h>
79 #include <sys/sockio.h>
80 #include <sys/mbuf.h>
81 #include <sys/malloc.h>
82 #include <sys/kernel.h>
83 #include <sys/socket.h>
84 #include <sys/sysctl.h>
85 #include <sys/queue.h>
86 #include <sys/module.h>
87
88 #include <net/if.h>
89 #include <net/if_arp.h>
90 #include <net/ethernet.h>
91 #include <net/if_dl.h>
92 #include <net/if_media.h>
93 #include <net/if_types.h>
94 #include <net/bpf.h>
95 #include <net/if_vlan_var.h>
96
97 #include <machine/bus.h>
98 #include <machine/resource.h>
99
100 #include <vm/vm.h> /* for vtophys */
101 #include <vm/pmap.h> /* for vtophys */
102 #include <sys/bus.h>
103 #include <sys/rman.h>
104
105 #include <dev/pci/pcireg.h>
106 #include <dev/pci/pcivar.h>
107 #include <dev/mii/mii.h>
108 #include <dev/mii/miivar.h>
109 #include "miibus_if.h"
110
111 /* Include NVIDIA Linux driver header files */
112 #include <contrib/dev/nve/nvenet_version.h>
113 #define linux
114 #include <contrib/dev/nve/basetype.h>
115 #include <contrib/dev/nve/phy.h>
116 #include "os+%DIKED-nve.h"
117 #include <contrib/dev/nve/drvinfo.h>
118 #include <contrib/dev/nve/adapter.h>
119 #undef linux
120
121 #include <dev/nve/if_nvereg.h>
122
123 MODULE_DEPEND(nve, pci, 1, 1, 1);
124 MODULE_DEPEND(nve, ether, 1, 1, 1);
125 MODULE_DEPEND(nve, miibus, 1, 1, 1);
126
127 static int nve_probe(device_t);
128 static int nve_attach(device_t);
129 static int nve_detach(device_t);
130 static void nve_init(void *);
131 static void nve_init_locked(struct nve_softc *);
132 static void nve_stop(struct nve_softc *);
133 static int nve_shutdown(device_t);
134 static int nve_init_rings(struct nve_softc *);
135 static void nve_free_rings(struct nve_softc *);
136
137 static void nve_ifstart(struct ifnet *);
138 static void nve_ifstart_locked(struct ifnet *);
139 static int nve_ioctl(struct ifnet *, u_long, caddr_t);
140 static void nve_intr(void *);
141 static void nve_tick(void *);
142 static void nve_setmulti(struct nve_softc *);
143 static void nve_watchdog(struct nve_softc *);
144 static void nve_update_stats(struct nve_softc *);
145
146 static int nve_ifmedia_upd(struct ifnet *);
147 static void nve_ifmedia_upd_locked(struct ifnet *);
148 static void nve_ifmedia_sts(struct ifnet *, struct ifmediareq *);
149 static int nve_miibus_readreg(device_t, int, int);
150 static int nve_miibus_writereg(device_t, int, int, int);
151
152 static void nve_dmamap_cb(void *, bus_dma_segment_t *, int, int);
153 static void nve_dmamap_tx_cb(void *, bus_dma_segment_t *, int, bus_size_t, int);
154
155 static NV_SINT32 nve_osalloc(PNV_VOID, PMEMORY_BLOCK);
156 static NV_SINT32 nve_osfree(PNV_VOID, PMEMORY_BLOCK);
157 static NV_SINT32 nve_osallocex(PNV_VOID, PMEMORY_BLOCKEX);
158 static NV_SINT32 nve_osfreeex(PNV_VOID, PMEMORY_BLOCKEX);
159 static NV_SINT32 nve_osclear(PNV_VOID, PNV_VOID, NV_SINT32);
160 static NV_SINT32 nve_osdelay(PNV_VOID, NV_UINT32);
161 static NV_SINT32 nve_osallocrxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID *);
162 static NV_SINT32 nve_osfreerxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID);
163 static NV_SINT32 nve_ospackettx(PNV_VOID, PNV_VOID, NV_UINT32);
164 static NV_SINT32 nve_ospacketrx(PNV_VOID, PNV_VOID, NV_UINT32, NV_UINT8 *, NV_UINT8);
165 static NV_SINT32 nve_oslinkchg(PNV_VOID, NV_SINT32);
166 static NV_SINT32 nve_osalloctimer(PNV_VOID, PNV_VOID *);
167 static NV_SINT32 nve_osfreetimer(PNV_VOID, PNV_VOID);
168 static NV_SINT32 nve_osinittimer(PNV_VOID, PNV_VOID, PTIMER_FUNC, PNV_VOID);
169 static NV_SINT32 nve_ossettimer(PNV_VOID, PNV_VOID, NV_UINT32);
170 static NV_SINT32 nve_oscanceltimer(PNV_VOID, PNV_VOID);
171
172 static NV_SINT32 nve_ospreprocpkt(PNV_VOID, PNV_VOID, PNV_VOID *, NV_UINT8 *, NV_UINT8);
173 static PNV_VOID nve_ospreprocpktnopq(PNV_VOID, PNV_VOID);
174 static NV_SINT32 nve_osindicatepkt(PNV_VOID, PNV_VOID *, NV_UINT32);
175 static NV_SINT32 nve_oslockalloc(PNV_VOID, NV_SINT32, PNV_VOID *);
176 static NV_SINT32 nve_oslockacquire(PNV_VOID, NV_SINT32, PNV_VOID);
177 static NV_SINT32 nve_oslockrelease(PNV_VOID, NV_SINT32, PNV_VOID);
178 static PNV_VOID nve_osreturnbufvirt(PNV_VOID, PNV_VOID);
179
180 static device_method_t nve_methods[] = {
181 /* Device interface */
182 DEVMETHOD(device_probe, nve_probe),
183 DEVMETHOD(device_attach, nve_attach),
184 DEVMETHOD(device_detach, nve_detach),
185 DEVMETHOD(device_shutdown, nve_shutdown),
186
187 /* Bus interface */
188 DEVMETHOD(bus_print_child, bus_generic_print_child),
189 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
190
191 /* MII interface */
192 DEVMETHOD(miibus_readreg, nve_miibus_readreg),
193 DEVMETHOD(miibus_writereg, nve_miibus_writereg),
194
195 {0, 0}
196 };
197
198 static driver_t nve_driver = {
199 "nve",
200 nve_methods,
201 sizeof(struct nve_softc)
202 };
203
204 static devclass_t nve_devclass;
205
206 static int nve_pollinterval = 0;
207 SYSCTL_INT(_hw, OID_AUTO, nve_pollinterval, CTLFLAG_RW,
208 &nve_pollinterval, 0, "delay between interface polls");
209
210 DRIVER_MODULE(nve, pci, nve_driver, nve_devclass, 0, 0);
211 DRIVER_MODULE(miibus, nve, miibus_driver, miibus_devclass, 0, 0);
212
213 static struct nve_type nve_devs[] = {
214 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_LAN,
215 "NVIDIA nForce MCP Networking Adapter"},
216 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_LAN,
217 "NVIDIA nForce2 MCP2 Networking Adapter"},
218 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN1,
219 "NVIDIA nForce2 400 MCP4 Networking Adapter"},
220 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN2,
221 "NVIDIA nForce2 400 MCP5 Networking Adapter"},
222 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN1,
223 "NVIDIA nForce3 MCP3 Networking Adapter"},
224 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_LAN,
225 "NVIDIA nForce3 250 MCP6 Networking Adapter"},
226 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN4,
227 "NVIDIA nForce3 MCP7 Networking Adapter"},
228 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN1,
229 "NVIDIA nForce4 CK804 MCP8 Networking Adapter"},
230 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN2,
231 "NVIDIA nForce4 CK804 MCP9 Networking Adapter"},
232 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN1,
233 "NVIDIA nForce MCP04 Networking Adapter"}, // MCP10
234 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN2,
235 "NVIDIA nForce MCP04 Networking Adapter"}, // MCP11
236 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN1,
237 "NVIDIA nForce 430 MCP12 Networking Adapter"},
238 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN2,
239 "NVIDIA nForce 430 MCP13 Networking Adapter"},
240 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN1,
241 "NVIDIA nForce MCP55 Networking Adapter"},
242 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN2,
243 "NVIDIA nForce MCP55 Networking Adapter"},
244 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN1,
245 "NVIDIA nForce MCP61 Networking Adapter"},
246 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN2,
247 "NVIDIA nForce MCP61 Networking Adapter"},
248 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN3,
249 "NVIDIA nForce MCP61 Networking Adapter"},
250 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN4,
251 "NVIDIA nForce MCP61 Networking Adapter"},
252 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN1,
253 "NVIDIA nForce MCP65 Networking Adapter"},
254 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN2,
255 "NVIDIA nForce MCP65 Networking Adapter"},
256 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN3,
257 "NVIDIA nForce MCP65 Networking Adapter"},
258 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN4,
259 "NVIDIA nForce MCP65 Networking Adapter"},
260 {0, 0, NULL}
261 };
262
263 /* DMA MEM map callback function to get data segment physical address */
264 static void
265 nve_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nsegs, int error)
266 {
267 if (error)
268 return;
269
270 KASSERT(nsegs == 1,
271 ("Too many DMA segments returned when mapping DMA memory"));
272 *(bus_addr_t *)arg = segs->ds_addr;
273 }
274
275 /* DMA RX map callback function to get data segment physical address */
276 static void
277 nve_dmamap_rx_cb(void *arg, bus_dma_segment_t * segs, int nsegs,
278 bus_size_t mapsize, int error)
279 {
280 if (error)
281 return;
282 *(bus_addr_t *)arg = segs->ds_addr;
283 }
284
285 /*
286 * DMA TX buffer callback function to allocate fragment data segment
287 * addresses
288 */
289 static void
290 nve_dmamap_tx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, bus_size_t mapsize, int error)
291 {
292 struct nve_tx_desc *info;
293
294 info = arg;
295 if (error)
296 return;
297 KASSERT(nsegs < NV_MAX_FRAGS,
298 ("Too many DMA segments returned when mapping mbuf"));
299 info->numfrags = nsegs;
300 bcopy(segs, info->frags, nsegs * sizeof(bus_dma_segment_t));
301 }
302
303 /* Probe for supported hardware ID's */
304 static int
305 nve_probe(device_t dev)
306 {
307 struct nve_type *t;
308
309 t = nve_devs;
310 /* Check for matching PCI DEVICE ID's */
311 while (t->name != NULL) {
312 if ((pci_get_vendor(dev) == t->vid_id) &&
313 (pci_get_device(dev) == t->dev_id)) {
314 device_set_desc(dev, t->name);
315 return (BUS_PROBE_LOW_PRIORITY);
316 }
317 t++;
318 }
319
320 return (ENXIO);
321 }
322
323 /* Attach driver and initialise hardware for use */
324 static int
325 nve_attach(device_t dev)
326 {
327 u_char eaddr[ETHER_ADDR_LEN];
328 struct nve_softc *sc;
329 struct ifnet *ifp;
330 OS_API *osapi;
331 ADAPTER_OPEN_PARAMS OpenParams;
332 int error = 0, i, rid;
333
334 if (bootverbose)
335 device_printf(dev, "nvenetlib.o version %s\n", DRIVER_VERSION);
336
337 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - entry\n");
338
339 sc = device_get_softc(dev);
340
341 /* Allocate mutex */
342 mtx_init(&sc->mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
343 MTX_DEF);
344 callout_init_mtx(&sc->stat_callout, &sc->mtx, 0);
345
346 sc->dev = dev;
347
348 /* Preinitialize data structures */
349 bzero(&OpenParams, sizeof(ADAPTER_OPEN_PARAMS));
350
351 /* Enable bus mastering */
352 pci_enable_busmaster(dev);
353
354 /* Allocate memory mapped address space */
355 rid = NV_RID;
356 sc->res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1,
357 RF_ACTIVE);
358
359 if (sc->res == NULL) {
360 device_printf(dev, "couldn't map memory\n");
361 error = ENXIO;
362 goto fail;
363 }
364 sc->sc_st = rman_get_bustag(sc->res);
365 sc->sc_sh = rman_get_bushandle(sc->res);
366
367 /* Allocate interrupt */
368 rid = 0;
369 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
370 RF_SHAREABLE | RF_ACTIVE);
371
372 if (sc->irq == NULL) {
373 device_printf(dev, "couldn't map interrupt\n");
374 error = ENXIO;
375 goto fail;
376 }
377 /* Allocate DMA tags */
378 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
379 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * NV_MAX_FRAGS,
380 NV_MAX_FRAGS, MCLBYTES, 0,
381 busdma_lock_mutex, &Giant,
382 &sc->mtag);
383 if (error) {
384 device_printf(dev, "couldn't allocate dma tag\n");
385 goto fail;
386 }
387 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
388 BUS_SPACE_MAXADDR, NULL, NULL,
389 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 1,
390 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 0,
391 busdma_lock_mutex, &Giant,
392 &sc->rtag);
393 if (error) {
394 device_printf(dev, "couldn't allocate dma tag\n");
395 goto fail;
396 }
397 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
398 BUS_SPACE_MAXADDR, NULL, NULL,
399 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 1,
400 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 0,
401 busdma_lock_mutex, &Giant,
402 &sc->ttag);
403 if (error) {
404 device_printf(dev, "couldn't allocate dma tag\n");
405 goto fail;
406 }
407 /* Allocate DMA safe memory and get the DMA addresses. */
408 error = bus_dmamem_alloc(sc->ttag, (void **)&sc->tx_desc,
409 BUS_DMA_WAITOK, &sc->tmap);
410 if (error) {
411 device_printf(dev, "couldn't allocate dma memory\n");
412 goto fail;
413 }
414 bzero(sc->tx_desc, sizeof(struct nve_tx_desc) * TX_RING_SIZE);
415 error = bus_dmamap_load(sc->ttag, sc->tmap, sc->tx_desc,
416 sizeof(struct nve_tx_desc) * TX_RING_SIZE, nve_dmamap_cb,
417 &sc->tx_addr, 0);
418 if (error) {
419 device_printf(dev, "couldn't map dma memory\n");
420 goto fail;
421 }
422 error = bus_dmamem_alloc(sc->rtag, (void **)&sc->rx_desc,
423 BUS_DMA_WAITOK, &sc->rmap);
424 if (error) {
425 device_printf(dev, "couldn't allocate dma memory\n");
426 goto fail;
427 }
428 bzero(sc->rx_desc, sizeof(struct nve_rx_desc) * RX_RING_SIZE);
429 error = bus_dmamap_load(sc->rtag, sc->rmap, sc->rx_desc,
430 sizeof(struct nve_rx_desc) * RX_RING_SIZE, nve_dmamap_cb,
431 &sc->rx_addr, 0);
432 if (error) {
433 device_printf(dev, "couldn't map dma memory\n");
434 goto fail;
435 }
436 /* Initialize rings. */
437 if (nve_init_rings(sc)) {
438 device_printf(dev, "failed to init rings\n");
439 error = ENXIO;
440 goto fail;
441 }
442 /* Setup NVIDIA API callback routines */
443 osapi = &sc->osapi;
444 osapi->pOSCX = sc;
445 osapi->pfnAllocMemory = nve_osalloc;
446 osapi->pfnFreeMemory = nve_osfree;
447 osapi->pfnAllocMemoryEx = nve_osallocex;
448 osapi->pfnFreeMemoryEx = nve_osfreeex;
449 osapi->pfnClearMemory = nve_osclear;
450 osapi->pfnStallExecution = nve_osdelay;
451 osapi->pfnAllocReceiveBuffer = nve_osallocrxbuf;
452 osapi->pfnFreeReceiveBuffer = nve_osfreerxbuf;
453 osapi->pfnPacketWasSent = nve_ospackettx;
454 osapi->pfnPacketWasReceived = nve_ospacketrx;
455 osapi->pfnLinkStateHasChanged = nve_oslinkchg;
456 osapi->pfnAllocTimer = nve_osalloctimer;
457 osapi->pfnFreeTimer = nve_osfreetimer;
458 osapi->pfnInitializeTimer = nve_osinittimer;
459 osapi->pfnSetTimer = nve_ossettimer;
460 osapi->pfnCancelTimer = nve_oscanceltimer;
461 osapi->pfnPreprocessPacket = nve_ospreprocpkt;
462 osapi->pfnPreprocessPacketNopq = nve_ospreprocpktnopq;
463 osapi->pfnIndicatePackets = nve_osindicatepkt;
464 osapi->pfnLockAlloc = nve_oslockalloc;
465 osapi->pfnLockAcquire = nve_oslockacquire;
466 osapi->pfnLockRelease = nve_oslockrelease;
467 osapi->pfnReturnBufferVirtual = nve_osreturnbufvirt;
468
469 sc->linkup = FALSE;
470 sc->max_frame_size = ETHERMTU + ETHER_HDR_LEN + FCS_LEN;
471
472 /* TODO - We don't support hardware offload yet */
473 sc->hwmode = 1;
474 sc->media = 0;
475
476 /* Set NVIDIA API startup parameters */
477 OpenParams.MaxDpcLoop = 2;
478 OpenParams.MaxRxPkt = RX_RING_SIZE;
479 OpenParams.MaxTxPkt = TX_RING_SIZE;
480 OpenParams.SentPacketStatusSuccess = 1;
481 OpenParams.SentPacketStatusFailure = 0;
482 OpenParams.MaxRxPktToAccumulate = 6;
483 OpenParams.ulPollInterval = nve_pollinterval;
484 OpenParams.SetForcedModeEveryNthRxPacket = 0;
485 OpenParams.SetForcedModeEveryNthTxPacket = 0;
486 OpenParams.RxForcedInterrupt = 0;
487 OpenParams.TxForcedInterrupt = 0;
488 OpenParams.pOSApi = osapi;
489 OpenParams.pvHardwareBaseAddress = rman_get_virtual(sc->res);
490 OpenParams.bASFEnabled = 0;
491 OpenParams.ulDescriptorVersion = sc->hwmode;
492 OpenParams.ulMaxPacketSize = sc->max_frame_size;
493 OpenParams.DeviceId = pci_get_device(dev);
494
495 /* Open NVIDIA Hardware API */
496 error = ADAPTER_Open(&OpenParams, (void **)&(sc->hwapi), &sc->phyaddr);
497 if (error) {
498 device_printf(dev,
499 "failed to open NVIDIA Hardware API: 0x%x\n", error);
500 goto fail;
501 }
502
503 /* TODO - Add support for MODE2 hardware offload */
504
505 bzero(&sc->adapterdata, sizeof(sc->adapterdata));
506
507 sc->adapterdata.ulMediaIF = sc->media;
508 sc->adapterdata.ulModeRegTxReadCompleteEnable = 1;
509 sc->hwapi->pfnSetCommonData(sc->hwapi->pADCX, &sc->adapterdata);
510
511 /* MAC is loaded backwards into h/w reg */
512 sc->hwapi->pfnGetNodeAddress(sc->hwapi->pADCX, sc->original_mac_addr);
513 for (i = 0; i < 6; i++) {
514 eaddr[i] = sc->original_mac_addr[5 - i];
515 }
516 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, eaddr);
517
518 /* Display ethernet address ,... */
519 device_printf(dev, "Ethernet address %6D\n", eaddr, ":");
520
521 /* Allocate interface structures */
522 ifp = sc->ifp = if_alloc(IFT_ETHER);
523 if (ifp == NULL) {
524 device_printf(dev, "can not if_alloc()\n");
525 error = ENOSPC;
526 goto fail;
527 }
528
529 /* Setup interface parameters */
530 ifp->if_softc = sc;
531 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
532 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
533 ifp->if_ioctl = nve_ioctl;
534 ifp->if_start = nve_ifstart;
535 ifp->if_init = nve_init;
536 ifp->if_mtu = ETHERMTU;
537 ifp->if_baudrate = IF_Mbps(100);
538 IFQ_SET_MAXLEN(&ifp->if_snd, TX_RING_SIZE - 1);
539 ifp->if_snd.ifq_drv_maxlen = TX_RING_SIZE - 1;
540 IFQ_SET_READY(&ifp->if_snd);
541 ifp->if_capabilities |= IFCAP_VLAN_MTU;
542 ifp->if_capenable |= IFCAP_VLAN_MTU;
543
544 /* Attach device for MII interface to PHY */
545 DEBUGOUT(NVE_DEBUG_INIT, "nve: do mii_attach\n");
546 error = mii_attach(dev, &sc->miibus, ifp, nve_ifmedia_upd,
547 nve_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0);
548 if (error != 0) {
549 device_printf(dev, "attaching PHYs failed\n");
550 goto fail;
551 }
552
553 /* Attach to OS's managers. */
554 ether_ifattach(ifp, eaddr);
555
556 /* Activate our interrupt handler. - attach last to avoid lock */
557 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
558 NULL, nve_intr, sc, &sc->sc_ih);
559 if (error) {
560 device_printf(dev, "couldn't set up interrupt handler\n");
561 goto fail;
562 }
563 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - exit\n");
564
565 fail:
566 if (error)
567 nve_detach(dev);
568
569 return (error);
570 }
571
572 /* Detach interface for module unload */
573 static int
574 nve_detach(device_t dev)
575 {
576 struct nve_softc *sc = device_get_softc(dev);
577 struct ifnet *ifp;
578
579 KASSERT(mtx_initialized(&sc->mtx), ("mutex not initialized"));
580
581 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - entry\n");
582
583 ifp = sc->ifp;
584
585 if (device_is_attached(dev)) {
586 ether_ifdetach(ifp);
587 NVE_LOCK(sc);
588 nve_stop(sc);
589 NVE_UNLOCK(sc);
590 callout_drain(&sc->stat_callout);
591 }
592
593 if (sc->miibus)
594 device_delete_child(dev, sc->miibus);
595 bus_generic_detach(dev);
596
597 /* Reload unreversed address back into MAC in original state */
598 if (sc->original_mac_addr)
599 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX,
600 sc->original_mac_addr);
601
602 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnClose\n");
603 /* Detach from NVIDIA hardware API */
604 if (sc->hwapi->pfnClose)
605 sc->hwapi->pfnClose(sc->hwapi->pADCX, FALSE);
606 /* Release resources */
607 if (sc->sc_ih)
608 bus_teardown_intr(sc->dev, sc->irq, sc->sc_ih);
609 if (sc->irq)
610 bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq);
611 if (sc->res)
612 bus_release_resource(sc->dev, SYS_RES_MEMORY, NV_RID, sc->res);
613
614 nve_free_rings(sc);
615
616 if (sc->tx_desc) {
617 bus_dmamap_unload(sc->rtag, sc->rmap);
618 bus_dmamem_free(sc->rtag, sc->rx_desc, sc->rmap);
619 bus_dmamap_destroy(sc->rtag, sc->rmap);
620 }
621 if (sc->mtag)
622 bus_dma_tag_destroy(sc->mtag);
623 if (sc->ttag)
624 bus_dma_tag_destroy(sc->ttag);
625 if (sc->rtag)
626 bus_dma_tag_destroy(sc->rtag);
627
628 if (ifp)
629 if_free(ifp);
630 mtx_destroy(&sc->mtx);
631
632 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - exit\n");
633
634 return (0);
635 }
636
637 /* Initialise interface and start it "RUNNING" */
638 static void
639 nve_init(void *xsc)
640 {
641 struct nve_softc *sc = xsc;
642
643 NVE_LOCK(sc);
644 nve_init_locked(sc);
645 NVE_UNLOCK(sc);
646 }
647
648 static void
649 nve_init_locked(struct nve_softc *sc)
650 {
651 struct ifnet *ifp;
652 int error;
653
654 NVE_LOCK_ASSERT(sc);
655 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - entry (%d)\n", sc->linkup);
656
657 ifp = sc->ifp;
658
659 /* Do nothing if already running */
660 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
661 return;
662
663 nve_stop(sc);
664 DEBUGOUT(NVE_DEBUG_INIT, "nve: do pfnInit\n");
665
666 nve_ifmedia_upd_locked(ifp);
667
668 /* Setup Hardware interface and allocate memory structures */
669 error = sc->hwapi->pfnInit(sc->hwapi->pADCX,
670 0, /* force speed */
671 0, /* force full duplex */
672 0, /* force mode */
673 0, /* force async mode */
674 &sc->linkup);
675
676 if (error) {
677 device_printf(sc->dev,
678 "failed to start NVIDIA Hardware interface\n");
679 return;
680 }
681 /* Set the MAC address */
682 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, IF_LLADDR(sc->ifp));
683 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
684 sc->hwapi->pfnStart(sc->hwapi->pADCX);
685
686 /* Setup multicast filter */
687 nve_setmulti(sc);
688
689 /* Update interface parameters */
690 ifp->if_drv_flags |= IFF_DRV_RUNNING;
691 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
692
693 callout_reset(&sc->stat_callout, hz, nve_tick, sc);
694
695 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - exit\n");
696
697 return;
698 }
699
700 /* Stop interface activity ie. not "RUNNING" */
701 static void
702 nve_stop(struct nve_softc *sc)
703 {
704 struct ifnet *ifp;
705
706 NVE_LOCK_ASSERT(sc);
707
708 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - entry\n");
709
710 ifp = sc->ifp;
711 sc->tx_timer = 0;
712
713 /* Cancel tick timer */
714 callout_stop(&sc->stat_callout);
715
716 /* Stop hardware activity */
717 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
718 sc->hwapi->pfnStop(sc->hwapi->pADCX, 0);
719
720 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnDeinit\n");
721 /* Shutdown interface and deallocate memory buffers */
722 if (sc->hwapi->pfnDeinit)
723 sc->hwapi->pfnDeinit(sc->hwapi->pADCX, 0);
724
725 sc->linkup = 0;
726 sc->cur_rx = 0;
727 sc->pending_rxs = 0;
728 sc->pending_txs = 0;
729
730 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
731
732 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - exit\n");
733
734 return;
735 }
736
737 /* Shutdown interface for unload/reboot */
738 static int
739 nve_shutdown(device_t dev)
740 {
741 struct nve_softc *sc;
742
743 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_shutdown\n");
744
745 sc = device_get_softc(dev);
746
747 /* Stop hardware activity */
748 NVE_LOCK(sc);
749 nve_stop(sc);
750 NVE_UNLOCK(sc);
751
752 return (0);
753 }
754
755 /* Allocate TX ring buffers */
756 static int
757 nve_init_rings(struct nve_softc *sc)
758 {
759 int error, i;
760
761 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - entry\n");
762
763 sc->cur_rx = sc->cur_tx = sc->pending_rxs = sc->pending_txs = 0;
764 /* Initialise RX ring */
765 for (i = 0; i < RX_RING_SIZE; i++) {
766 struct nve_rx_desc *desc = sc->rx_desc + i;
767 struct nve_map_buffer *buf = &desc->buf;
768
769 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
770 if (buf->mbuf == NULL) {
771 device_printf(sc->dev, "couldn't allocate mbuf\n");
772 nve_free_rings(sc);
773 return (ENOBUFS);
774 }
775 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES;
776 m_adj(buf->mbuf, ETHER_ALIGN);
777
778 error = bus_dmamap_create(sc->mtag, 0, &buf->map);
779 if (error) {
780 device_printf(sc->dev, "couldn't create dma map\n");
781 nve_free_rings(sc);
782 return (error);
783 }
784 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf,
785 nve_dmamap_rx_cb, &desc->paddr, 0);
786 if (error) {
787 device_printf(sc->dev, "couldn't dma map mbuf\n");
788 nve_free_rings(sc);
789 return (error);
790 }
791 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD);
792
793 desc->buflength = buf->mbuf->m_len;
794 desc->vaddr = mtod(buf->mbuf, caddr_t);
795 }
796 bus_dmamap_sync(sc->rtag, sc->rmap,
797 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
798
799 /* Initialize TX ring */
800 for (i = 0; i < TX_RING_SIZE; i++) {
801 struct nve_tx_desc *desc = sc->tx_desc + i;
802 struct nve_map_buffer *buf = &desc->buf;
803
804 buf->mbuf = NULL;
805
806 error = bus_dmamap_create(sc->mtag, 0, &buf->map);
807 if (error) {
808 device_printf(sc->dev, "couldn't create dma map\n");
809 nve_free_rings(sc);
810 return (error);
811 }
812 }
813 bus_dmamap_sync(sc->ttag, sc->tmap,
814 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
815
816 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - exit\n");
817
818 return (error);
819 }
820
821 /* Free the TX ring buffers */
822 static void
823 nve_free_rings(struct nve_softc *sc)
824 {
825 int i;
826
827 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - entry\n");
828
829 for (i = 0; i < RX_RING_SIZE; i++) {
830 struct nve_rx_desc *desc = sc->rx_desc + i;
831 struct nve_map_buffer *buf = &desc->buf;
832
833 if (buf->mbuf) {
834 bus_dmamap_unload(sc->mtag, buf->map);
835 bus_dmamap_destroy(sc->mtag, buf->map);
836 m_freem(buf->mbuf);
837 }
838 buf->mbuf = NULL;
839 }
840
841 for (i = 0; i < TX_RING_SIZE; i++) {
842 struct nve_tx_desc *desc = sc->tx_desc + i;
843 struct nve_map_buffer *buf = &desc->buf;
844
845 if (buf->mbuf) {
846 bus_dmamap_unload(sc->mtag, buf->map);
847 bus_dmamap_destroy(sc->mtag, buf->map);
848 m_freem(buf->mbuf);
849 }
850 buf->mbuf = NULL;
851 }
852
853 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - exit\n");
854 }
855
856 /* Main loop for sending packets from OS to interface */
857 static void
858 nve_ifstart(struct ifnet *ifp)
859 {
860 struct nve_softc *sc = ifp->if_softc;
861
862 NVE_LOCK(sc);
863 nve_ifstart_locked(ifp);
864 NVE_UNLOCK(sc);
865 }
866
867 static void
868 nve_ifstart_locked(struct ifnet *ifp)
869 {
870 struct nve_softc *sc = ifp->if_softc;
871 struct nve_map_buffer *buf;
872 struct mbuf *m0, *m;
873 struct nve_tx_desc *desc;
874 ADAPTER_WRITE_DATA txdata;
875 int error, i;
876
877 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - entry\n");
878
879 NVE_LOCK_ASSERT(sc);
880
881 /* If link is down/busy or queue is empty do nothing */
882 if (ifp->if_drv_flags & IFF_DRV_OACTIVE ||
883 IFQ_DRV_IS_EMPTY(&ifp->if_snd))
884 return;
885
886 /* Transmit queued packets until sent or TX ring is full */
887 while (sc->pending_txs < TX_RING_SIZE) {
888 desc = sc->tx_desc + sc->cur_tx;
889 buf = &desc->buf;
890
891 /* Get next packet to send. */
892 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0);
893
894 /* If nothing to send, return. */
895 if (m0 == NULL)
896 return;
897
898 /*
899 * On nForce4, the chip doesn't interrupt on transmit,
900 * so try to flush transmitted packets from the queue
901 * if it's getting large (see note in nve_watchdog).
902 */
903 if (sc->pending_txs > TX_RING_SIZE/2) {
904 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
905 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
906 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
907 }
908
909 /* Map MBUF for DMA access */
910 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m0,
911 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT);
912
913 if (error && error != EFBIG) {
914 m_freem(m0);
915 sc->tx_errors++;
916 continue;
917 }
918 /*
919 * Packet has too many fragments - defrag into new mbuf
920 * cluster
921 */
922 if (error) {
923 m = m_defrag(m0, M_DONTWAIT);
924 if (m == NULL) {
925 m_freem(m0);
926 sc->tx_errors++;
927 continue;
928 }
929 m0 = m;
930
931 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m,
932 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT);
933 if (error) {
934 m_freem(m);
935 sc->tx_errors++;
936 continue;
937 }
938 }
939 /* Do sync on DMA bounce buffer */
940 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREWRITE);
941
942 buf->mbuf = m0;
943 txdata.ulNumberOfElements = desc->numfrags;
944 txdata.pvID = (PVOID)desc;
945
946 /* Put fragments into API element list */
947 txdata.ulTotalLength = buf->mbuf->m_len;
948 for (i = 0; i < desc->numfrags; i++) {
949 txdata.sElement[i].ulLength =
950 (ulong)desc->frags[i].ds_len;
951 txdata.sElement[i].pPhysical =
952 (PVOID)desc->frags[i].ds_addr;
953 }
954
955 /* Send packet to Nvidia API for transmission */
956 error = sc->hwapi->pfnWrite(sc->hwapi->pADCX, &txdata);
957
958 switch (error) {
959 case ADAPTERERR_NONE:
960 /* Packet was queued in API TX queue successfully */
961 sc->pending_txs++;
962 sc->cur_tx = (sc->cur_tx + 1) % TX_RING_SIZE;
963 break;
964
965 case ADAPTERERR_TRANSMIT_QUEUE_FULL:
966 /* The API TX queue is full - requeue the packet */
967 device_printf(sc->dev,
968 "nve_ifstart: transmit queue is full\n");
969 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
970 bus_dmamap_unload(sc->mtag, buf->map);
971 IFQ_DRV_PREPEND(&ifp->if_snd, buf->mbuf);
972 buf->mbuf = NULL;
973 return;
974
975 default:
976 /* The API failed to queue/send the packet so dump it */
977 device_printf(sc->dev, "nve_ifstart: transmit error\n");
978 bus_dmamap_unload(sc->mtag, buf->map);
979 m_freem(buf->mbuf);
980 buf->mbuf = NULL;
981 sc->tx_errors++;
982 return;
983 }
984 /* Set watchdog timer. */
985 sc->tx_timer = 8;
986
987 /* Copy packet to BPF tap */
988 BPF_MTAP(ifp, m0);
989 }
990 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
991
992 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - exit\n");
993 }
994
995 /* Handle IOCTL events */
996 static int
997 nve_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
998 {
999 struct nve_softc *sc = ifp->if_softc;
1000 struct ifreq *ifr = (struct ifreq *) data;
1001 struct mii_data *mii;
1002 int error = 0;
1003
1004 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - entry\n");
1005
1006 switch (command) {
1007 case SIOCSIFMTU:
1008 /* Set MTU size */
1009 NVE_LOCK(sc);
1010 if (ifp->if_mtu == ifr->ifr_mtu) {
1011 NVE_UNLOCK(sc);
1012 break;
1013 }
1014 if (ifr->ifr_mtu + ifp->if_hdrlen <= MAX_PACKET_SIZE_1518) {
1015 ifp->if_mtu = ifr->ifr_mtu;
1016 nve_stop(sc);
1017 nve_init_locked(sc);
1018 } else
1019 error = EINVAL;
1020 NVE_UNLOCK(sc);
1021 break;
1022
1023 case SIOCSIFFLAGS:
1024 /* Setup interface flags */
1025 NVE_LOCK(sc);
1026 if (ifp->if_flags & IFF_UP) {
1027 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1028 nve_init_locked(sc);
1029 NVE_UNLOCK(sc);
1030 break;
1031 }
1032 } else {
1033 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1034 nve_stop(sc);
1035 NVE_UNLOCK(sc);
1036 break;
1037 }
1038 }
1039 /* Handle IFF_PROMISC and IFF_ALLMULTI flags. */
1040 nve_setmulti(sc);
1041 NVE_UNLOCK(sc);
1042 break;
1043
1044 case SIOCADDMULTI:
1045 case SIOCDELMULTI:
1046 /* Setup multicast filter */
1047 NVE_LOCK(sc);
1048 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1049 nve_setmulti(sc);
1050 }
1051 NVE_UNLOCK(sc);
1052 break;
1053
1054 case SIOCGIFMEDIA:
1055 case SIOCSIFMEDIA:
1056 /* Get/Set interface media parameters */
1057 mii = device_get_softc(sc->miibus);
1058 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1059 break;
1060
1061 default:
1062 /* Everything else we forward to generic ether ioctl */
1063 error = ether_ioctl(ifp, command, data);
1064 break;
1065 }
1066
1067 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - exit\n");
1068
1069 return (error);
1070 }
1071
1072 /* Interrupt service routine */
1073 static void
1074 nve_intr(void *arg)
1075 {
1076 struct nve_softc *sc = arg;
1077 struct ifnet *ifp = sc->ifp;
1078
1079 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - entry\n");
1080
1081 NVE_LOCK(sc);
1082 if (!ifp->if_flags & IFF_UP) {
1083 nve_stop(sc);
1084 NVE_UNLOCK(sc);
1085 return;
1086 }
1087 /* Handle interrupt event */
1088 if (sc->hwapi->pfnQueryInterrupt(sc->hwapi->pADCX)) {
1089 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
1090 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
1091 }
1092 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1093 nve_ifstart_locked(ifp);
1094
1095 /* If no pending packets we don't need a timeout */
1096 if (sc->pending_txs == 0)
1097 sc->tx_timer = 0;
1098 NVE_UNLOCK(sc);
1099
1100 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - exit\n");
1101
1102 return;
1103 }
1104
1105 /* Setup multicast filters */
1106 static void
1107 nve_setmulti(struct nve_softc *sc)
1108 {
1109 struct ifnet *ifp;
1110 struct ifmultiaddr *ifma;
1111 PACKET_FILTER hwfilter;
1112 int i;
1113 u_int8_t andaddr[6], oraddr[6];
1114
1115 NVE_LOCK_ASSERT(sc);
1116
1117 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - entry\n");
1118
1119 ifp = sc->ifp;
1120
1121 /* Initialize filter */
1122 hwfilter.ulFilterFlags = 0;
1123 for (i = 0; i < 6; i++) {
1124 hwfilter.acMulticastAddress[i] = 0;
1125 hwfilter.acMulticastMask[i] = 0;
1126 }
1127
1128 if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) {
1129 /* Accept all packets */
1130 hwfilter.ulFilterFlags |= ACCEPT_ALL_PACKETS;
1131 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter);
1132 return;
1133 }
1134 /* Setup multicast filter */
1135 if_maddr_rlock(ifp);
1136 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1137 u_char *addrp;
1138
1139 if (ifma->ifma_addr->sa_family != AF_LINK)
1140 continue;
1141
1142 addrp = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
1143 for (i = 0; i < 6; i++) {
1144 u_int8_t mcaddr = addrp[i];
1145 andaddr[i] &= mcaddr;
1146 oraddr[i] |= mcaddr;
1147 }
1148 }
1149 if_maddr_runlock(ifp);
1150 for (i = 0; i < 6; i++) {
1151 hwfilter.acMulticastAddress[i] = andaddr[i] & oraddr[i];
1152 hwfilter.acMulticastMask[i] = andaddr[i] | (~oraddr[i]);
1153 }
1154
1155 /* Send filter to NVIDIA API */
1156 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter);
1157
1158 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - exit\n");
1159
1160 return;
1161 }
1162
1163 /* Change the current media/mediaopts */
1164 static int
1165 nve_ifmedia_upd(struct ifnet *ifp)
1166 {
1167 struct nve_softc *sc = ifp->if_softc;
1168
1169 NVE_LOCK(sc);
1170 nve_ifmedia_upd_locked(ifp);
1171 NVE_UNLOCK(sc);
1172 return (0);
1173 }
1174
1175 static void
1176 nve_ifmedia_upd_locked(struct ifnet *ifp)
1177 {
1178 struct nve_softc *sc = ifp->if_softc;
1179 struct mii_data *mii;
1180 struct mii_softc *miisc;
1181
1182 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_upd\n");
1183
1184 NVE_LOCK_ASSERT(sc);
1185 mii = device_get_softc(sc->miibus);
1186
1187 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
1188 PHY_RESET(miisc);
1189 mii_mediachg(mii);
1190 }
1191
1192 /* Update current miibus PHY status of media */
1193 static void
1194 nve_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1195 {
1196 struct nve_softc *sc;
1197 struct mii_data *mii;
1198
1199 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_sts\n");
1200
1201 sc = ifp->if_softc;
1202 NVE_LOCK(sc);
1203 mii = device_get_softc(sc->miibus);
1204 mii_pollstat(mii);
1205 NVE_UNLOCK(sc);
1206
1207 ifmr->ifm_active = mii->mii_media_active;
1208 ifmr->ifm_status = mii->mii_media_status;
1209
1210 return;
1211 }
1212
1213 /* miibus tick timer - maintain link status */
1214 static void
1215 nve_tick(void *xsc)
1216 {
1217 struct nve_softc *sc = xsc;
1218 struct mii_data *mii;
1219 struct ifnet *ifp;
1220
1221 NVE_LOCK_ASSERT(sc);
1222
1223 ifp = sc->ifp;
1224 nve_update_stats(sc);
1225
1226 mii = device_get_softc(sc->miibus);
1227 mii_tick(mii);
1228
1229 if (mii->mii_media_status & IFM_ACTIVE &&
1230 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
1231 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1232 nve_ifstart_locked(ifp);
1233 }
1234
1235 if (sc->tx_timer > 0 && --sc->tx_timer == 0)
1236 nve_watchdog(sc);
1237 callout_reset(&sc->stat_callout, hz, nve_tick, sc);
1238
1239 return;
1240 }
1241
1242 /* Update ifnet data structure with collected interface stats from API */
1243 static void
1244 nve_update_stats(struct nve_softc *sc)
1245 {
1246 struct ifnet *ifp = sc->ifp;
1247 ADAPTER_STATS stats;
1248
1249 NVE_LOCK_ASSERT(sc);
1250
1251 if (sc->hwapi) {
1252 sc->hwapi->pfnGetStatistics(sc->hwapi->pADCX, &stats);
1253
1254 ifp->if_ipackets = stats.ulSuccessfulReceptions;
1255 ifp->if_ierrors = stats.ulMissedFrames +
1256 stats.ulFailedReceptions +
1257 stats.ulCRCErrors +
1258 stats.ulFramingErrors +
1259 stats.ulOverFlowErrors;
1260
1261 ifp->if_opackets = stats.ulSuccessfulTransmissions;
1262 ifp->if_oerrors = sc->tx_errors +
1263 stats.ulFailedTransmissions +
1264 stats.ulRetryErrors +
1265 stats.ulUnderflowErrors +
1266 stats.ulLossOfCarrierErrors +
1267 stats.ulLateCollisionErrors;
1268
1269 ifp->if_collisions = stats.ulLateCollisionErrors;
1270 }
1271
1272 return;
1273 }
1274
1275 /* miibus Read PHY register wrapper - calls Nvidia API entry point */
1276 static int
1277 nve_miibus_readreg(device_t dev, int phy, int reg)
1278 {
1279 struct nve_softc *sc = device_get_softc(dev);
1280 ULONG data;
1281
1282 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - entry\n");
1283
1284 ADAPTER_ReadPhy(sc->hwapi->pADCX, phy, reg, &data);
1285
1286 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - exit\n");
1287
1288 return (data);
1289 }
1290
1291 /* miibus Write PHY register wrapper - calls Nvidia API entry point */
1292 static int
1293 nve_miibus_writereg(device_t dev, int phy, int reg, int data)
1294 {
1295 struct nve_softc *sc = device_get_softc(dev);
1296
1297 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - entry\n");
1298
1299 ADAPTER_WritePhy(sc->hwapi->pADCX, phy, reg, (ulong)data);
1300
1301 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - exit\n");
1302
1303 return 0;
1304 }
1305
1306 /* Watchdog timer to prevent PHY lockups */
1307 static void
1308 nve_watchdog(struct nve_softc *sc)
1309 {
1310 struct ifnet *ifp;
1311 int pending_txs_start;
1312
1313 NVE_LOCK_ASSERT(sc);
1314 ifp = sc->ifp;
1315
1316 /*
1317 * The nvidia driver blob defers tx completion notifications.
1318 * Thus, sometimes the watchdog timer will go off when the
1319 * tx engine is fine, but the tx completions are just deferred.
1320 * Try kicking the driver blob to clear out any pending tx
1321 * completions. If that clears up any of the pending tx
1322 * operations, then just return without printing the warning
1323 * message or resetting the adapter, as we can then conclude
1324 * the chip hasn't actually crashed (it's still sending packets).
1325 */
1326 pending_txs_start = sc->pending_txs;
1327 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
1328 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
1329 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
1330 if (sc->pending_txs < pending_txs_start)
1331 return;
1332
1333 device_printf(sc->dev, "device timeout (%d)\n", sc->pending_txs);
1334
1335 sc->tx_errors++;
1336
1337 nve_stop(sc);
1338 nve_init_locked(sc);
1339
1340 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1341 nve_ifstart_locked(ifp);
1342 }
1343
1344 /* --- Start of NVOSAPI interface --- */
1345
1346 /* Allocate DMA enabled general use memory for API */
1347 static NV_SINT32
1348 nve_osalloc(PNV_VOID ctx, PMEMORY_BLOCK mem)
1349 {
1350 struct nve_softc *sc;
1351 bus_addr_t mem_physical;
1352
1353 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc - %d\n", mem->uiLength);
1354
1355 sc = (struct nve_softc *)ctx;
1356
1357 mem->pLogical = (PVOID)contigmalloc(mem->uiLength, M_DEVBUF,
1358 M_NOWAIT | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0);
1359
1360 if (!mem->pLogical) {
1361 device_printf(sc->dev, "memory allocation failed\n");
1362 return (0);
1363 }
1364 memset(mem->pLogical, 0, (ulong)mem->uiLength);
1365 mem_physical = vtophys(mem->pLogical);
1366 mem->pPhysical = (PVOID)mem_physical;
1367
1368 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc 0x%x/0x%x - %d\n",
1369 (uint)mem->pLogical, (uint)mem->pPhysical, (uint)mem->uiLength);
1370
1371 return (1);
1372 }
1373
1374 /* Free allocated memory */
1375 static NV_SINT32
1376 nve_osfree(PNV_VOID ctx, PMEMORY_BLOCK mem)
1377 {
1378 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfree - 0x%x - %d\n",
1379 (uint)mem->pLogical, (uint) mem->uiLength);
1380
1381 contigfree(mem->pLogical, PAGE_SIZE, M_DEVBUF);
1382 return (1);
1383 }
1384
1385 /* Copied directly from nvnet.c */
1386 static NV_SINT32
1387 nve_osallocex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex)
1388 {
1389 MEMORY_BLOCK mem_block;
1390
1391 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocex\n");
1392
1393 mem_block_ex->pLogical = NULL;
1394 mem_block_ex->uiLengthOrig = mem_block_ex->uiLength;
1395
1396 if ((mem_block_ex->AllocFlags & ALLOC_MEMORY_ALIGNED) &&
1397 (mem_block_ex->AlignmentSize > 1)) {
1398 DEBUGOUT(NVE_DEBUG_API, " aligning on %d\n",
1399 mem_block_ex->AlignmentSize);
1400 mem_block_ex->uiLengthOrig += mem_block_ex->AlignmentSize;
1401 }
1402 mem_block.uiLength = mem_block_ex->uiLengthOrig;
1403
1404 if (nve_osalloc(ctx, &mem_block) == 0) {
1405 return (0);
1406 }
1407 mem_block_ex->pLogicalOrig = mem_block.pLogical;
1408 mem_block_ex->pPhysicalOrigLow = (unsigned long)mem_block.pPhysical;
1409 mem_block_ex->pPhysicalOrigHigh = 0;
1410
1411 mem_block_ex->pPhysical = mem_block.pPhysical;
1412 mem_block_ex->pLogical = mem_block.pLogical;
1413
1414 if (mem_block_ex->uiLength != mem_block_ex->uiLengthOrig) {
1415 unsigned int offset;
1416 offset = mem_block_ex->pPhysicalOrigLow &
1417 (mem_block_ex->AlignmentSize - 1);
1418
1419 if (offset) {
1420 mem_block_ex->pPhysical =
1421 (PVOID)((ulong)mem_block_ex->pPhysical +
1422 mem_block_ex->AlignmentSize - offset);
1423 mem_block_ex->pLogical =
1424 (PVOID)((ulong)mem_block_ex->pLogical +
1425 mem_block_ex->AlignmentSize - offset);
1426 } /* if (offset) */
1427 } /* if (mem_block_ex->uiLength != *mem_block_ex->uiLengthOrig) */
1428 return (1);
1429 }
1430
1431 /* Copied directly from nvnet.c */
1432 static NV_SINT32
1433 nve_osfreeex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex)
1434 {
1435 MEMORY_BLOCK mem_block;
1436
1437 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreeex\n");
1438
1439 mem_block.pLogical = mem_block_ex->pLogicalOrig;
1440 mem_block.pPhysical = (PVOID)((ulong)mem_block_ex->pPhysicalOrigLow);
1441 mem_block.uiLength = mem_block_ex->uiLengthOrig;
1442
1443 return (nve_osfree(ctx, &mem_block));
1444 }
1445
1446 /* Clear memory region */
1447 static NV_SINT32
1448 nve_osclear(PNV_VOID ctx, PNV_VOID mem, NV_SINT32 length)
1449 {
1450 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osclear\n");
1451 memset(mem, 0, length);
1452 return (1);
1453 }
1454
1455 /* Sleep for a tick */
1456 static NV_SINT32
1457 nve_osdelay(PNV_VOID ctx, NV_UINT32 usec)
1458 {
1459 DELAY(usec);
1460 return (1);
1461 }
1462
1463 /* Allocate memory for rx buffer */
1464 static NV_SINT32
1465 nve_osallocrxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID *id)
1466 {
1467 struct nve_softc *sc = ctx;
1468 struct nve_rx_desc *desc;
1469 struct nve_map_buffer *buf;
1470 int error;
1471
1472 if (device_is_attached(sc->dev))
1473 NVE_LOCK_ASSERT(sc);
1474
1475 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocrxbuf\n");
1476
1477 if (sc->pending_rxs == RX_RING_SIZE) {
1478 device_printf(sc->dev, "rx ring buffer is full\n");
1479 goto fail;
1480 }
1481 desc = sc->rx_desc + sc->cur_rx;
1482 buf = &desc->buf;
1483
1484 if (buf->mbuf == NULL) {
1485 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1486 if (buf->mbuf == NULL) {
1487 device_printf(sc->dev, "failed to allocate memory\n");
1488 goto fail;
1489 }
1490 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES;
1491 m_adj(buf->mbuf, ETHER_ALIGN);
1492
1493 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf,
1494 nve_dmamap_rx_cb, &desc->paddr, 0);
1495 if (error) {
1496 device_printf(sc->dev, "failed to dmamap mbuf\n");
1497 m_freem(buf->mbuf);
1498 buf->mbuf = NULL;
1499 goto fail;
1500 }
1501 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD);
1502 desc->buflength = buf->mbuf->m_len;
1503 desc->vaddr = mtod(buf->mbuf, caddr_t);
1504 }
1505 sc->pending_rxs++;
1506 sc->cur_rx = (sc->cur_rx + 1) % RX_RING_SIZE;
1507
1508 mem->pLogical = (void *)desc->vaddr;
1509 mem->pPhysical = (void *)desc->paddr;
1510 mem->uiLength = desc->buflength;
1511 *id = (void *)desc;
1512
1513 return (1);
1514
1515 fail:
1516 return (0);
1517 }
1518
1519 /* Free the rx buffer */
1520 static NV_SINT32
1521 nve_osfreerxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID id)
1522 {
1523 struct nve_softc *sc = ctx;
1524 struct nve_rx_desc *desc;
1525 struct nve_map_buffer *buf;
1526
1527 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreerxbuf\n");
1528
1529 desc = (struct nve_rx_desc *) id;
1530 buf = &desc->buf;
1531
1532 if (buf->mbuf) {
1533 bus_dmamap_unload(sc->mtag, buf->map);
1534 bus_dmamap_destroy(sc->mtag, buf->map);
1535 m_freem(buf->mbuf);
1536 }
1537 sc->pending_rxs--;
1538 buf->mbuf = NULL;
1539
1540 return (1);
1541 }
1542
1543 /* This gets called by the Nvidia API after our TX packet has been sent */
1544 static NV_SINT32
1545 nve_ospackettx(PNV_VOID ctx, PNV_VOID id, NV_UINT32 success)
1546 {
1547 struct nve_softc *sc = ctx;
1548 struct nve_map_buffer *buf;
1549 struct nve_tx_desc *desc = (struct nve_tx_desc *) id;
1550 struct ifnet *ifp;
1551
1552 NVE_LOCK_ASSERT(sc);
1553
1554 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospackettx\n");
1555
1556 ifp = sc->ifp;
1557 buf = &desc->buf;
1558 sc->pending_txs--;
1559
1560 /* Unload and free mbuf cluster */
1561 if (buf->mbuf == NULL)
1562 goto fail;
1563
1564 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTWRITE);
1565 bus_dmamap_unload(sc->mtag, buf->map);
1566 m_freem(buf->mbuf);
1567 buf->mbuf = NULL;
1568
1569 /* Send more packets if we have them */
1570 if (sc->pending_txs < TX_RING_SIZE)
1571 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1572
1573 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd) && sc->pending_txs < TX_RING_SIZE)
1574 nve_ifstart_locked(ifp);
1575
1576 fail:
1577
1578 return (1);
1579 }
1580
1581 /* This gets called by the Nvidia API when a new packet has been received */
1582 /* XXX What is newbuf used for? XXX */
1583 static NV_SINT32
1584 nve_ospacketrx(PNV_VOID ctx, PNV_VOID data, NV_UINT32 success, NV_UINT8 *newbuf,
1585 NV_UINT8 priority)
1586 {
1587 struct nve_softc *sc = ctx;
1588 struct ifnet *ifp;
1589 struct nve_rx_desc *desc;
1590 struct nve_map_buffer *buf;
1591 ADAPTER_READ_DATA *readdata;
1592 struct mbuf *m;
1593
1594 NVE_LOCK_ASSERT(sc);
1595
1596 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospacketrx\n");
1597
1598 ifp = sc->ifp;
1599
1600 readdata = (ADAPTER_READ_DATA *) data;
1601 desc = readdata->pvID;
1602 buf = &desc->buf;
1603 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1604
1605 if (success) {
1606 /* Sync DMA bounce buffer. */
1607 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1608
1609 /* First mbuf in packet holds the ethernet and packet headers */
1610 buf->mbuf->m_pkthdr.rcvif = ifp;
1611 buf->mbuf->m_pkthdr.len = buf->mbuf->m_len =
1612 readdata->ulTotalLength;
1613
1614 bus_dmamap_unload(sc->mtag, buf->map);
1615
1616 /* Blat the mbuf pointer, kernel will free the mbuf cluster */
1617 m = buf->mbuf;
1618 buf->mbuf = NULL;
1619
1620 /* Give mbuf to OS. */
1621 NVE_UNLOCK(sc);
1622 (*ifp->if_input)(ifp, m);
1623 NVE_LOCK(sc);
1624 if (readdata->ulFilterMatch & ADREADFL_MULTICAST_MATCH)
1625 ifp->if_imcasts++;
1626
1627 } else {
1628 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1629 bus_dmamap_unload(sc->mtag, buf->map);
1630 m_freem(buf->mbuf);
1631 buf->mbuf = NULL;
1632 }
1633
1634 sc->cur_rx = desc - sc->rx_desc;
1635 sc->pending_rxs--;
1636
1637 return (1);
1638 }
1639
1640 /* This gets called by NVIDIA API when the PHY link state changes */
1641 static NV_SINT32
1642 nve_oslinkchg(PNV_VOID ctx, NV_SINT32 enabled)
1643 {
1644
1645 DEBUGOUT(NVE_DEBUG_API, "nve: nve_oslinkchg\n");
1646
1647 return (1);
1648 }
1649
1650 /* Setup a watchdog timer */
1651 static NV_SINT32
1652 nve_osalloctimer(PNV_VOID ctx, PNV_VOID *timer)
1653 {
1654 struct nve_softc *sc = (struct nve_softc *)ctx;
1655
1656 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osalloctimer\n");
1657
1658 callout_init(&sc->ostimer, CALLOUT_MPSAFE);
1659 *timer = &sc->ostimer;
1660
1661 return (1);
1662 }
1663
1664 /* Free the timer */
1665 static NV_SINT32
1666 nve_osfreetimer(PNV_VOID ctx, PNV_VOID timer)
1667 {
1668
1669 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osfreetimer\n");
1670
1671 callout_drain((struct callout *)timer);
1672
1673 return (1);
1674 }
1675
1676 /* Setup timer parameters */
1677 static NV_SINT32
1678 nve_osinittimer(PNV_VOID ctx, PNV_VOID timer, PTIMER_FUNC func, PNV_VOID parameters)
1679 {
1680 struct nve_softc *sc = (struct nve_softc *)ctx;
1681
1682 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osinittimer\n");
1683
1684 sc->ostimer_func = func;
1685 sc->ostimer_params = parameters;
1686
1687 return (1);
1688 }
1689
1690 /* Set the timer to go off */
1691 static NV_SINT32
1692 nve_ossettimer(PNV_VOID ctx, PNV_VOID timer, NV_UINT32 delay)
1693 {
1694 struct nve_softc *sc = ctx;
1695
1696 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ossettimer\n");
1697
1698 callout_reset((struct callout *)timer, delay, sc->ostimer_func,
1699 sc->ostimer_params);
1700
1701 return (1);
1702 }
1703
1704 /* Cancel the timer */
1705 static NV_SINT32
1706 nve_oscanceltimer(PNV_VOID ctx, PNV_VOID timer)
1707 {
1708
1709 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_oscanceltimer\n");
1710
1711 callout_stop((struct callout *)timer);
1712
1713 return (1);
1714 }
1715
1716 static NV_SINT32
1717 nve_ospreprocpkt(PNV_VOID ctx, PNV_VOID readdata, PNV_VOID *id,
1718 NV_UINT8 *newbuffer, NV_UINT8 priority)
1719 {
1720
1721 /* Not implemented */
1722 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n");
1723
1724 return (1);
1725 }
1726
1727 static PNV_VOID
1728 nve_ospreprocpktnopq(PNV_VOID ctx, PNV_VOID readdata)
1729 {
1730
1731 /* Not implemented */
1732 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n");
1733
1734 return (NULL);
1735 }
1736
1737 static NV_SINT32
1738 nve_osindicatepkt(PNV_VOID ctx, PNV_VOID *id, NV_UINT32 pktno)
1739 {
1740
1741 /* Not implemented */
1742 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osindicatepkt\n");
1743
1744 return (1);
1745 }
1746
1747 /* Allocate mutex context (already done in nve_attach) */
1748 static NV_SINT32
1749 nve_oslockalloc(PNV_VOID ctx, NV_SINT32 type, PNV_VOID *pLock)
1750 {
1751 struct nve_softc *sc = (struct nve_softc *)ctx;
1752
1753 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockalloc\n");
1754
1755 *pLock = (void **)sc;
1756
1757 return (1);
1758 }
1759
1760 /* Obtain a spin lock */
1761 static NV_SINT32
1762 nve_oslockacquire(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock)
1763 {
1764
1765 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockacquire\n");
1766
1767 return (1);
1768 }
1769
1770 /* Release lock */
1771 static NV_SINT32
1772 nve_oslockrelease(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock)
1773 {
1774
1775 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockrelease\n");
1776
1777 return (1);
1778 }
1779
1780 /* I have no idea what this is for */
1781 static PNV_VOID
1782 nve_osreturnbufvirt(PNV_VOID ctx, PNV_VOID readdata)
1783 {
1784
1785 /* Not implemented */
1786 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_osreturnbufvirt\n");
1787 panic("nve: nve_osreturnbufvirtual not implemented\n");
1788
1789 return (NULL);
1790 }
1791
1792 /* --- End on NVOSAPI interface --- */
Cache object: 606c1284ff99a28432502d84326a0001
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