Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/pci/btvmei.c
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1 /* $NetBSD: btvmei.c,v 1.12 2003/01/31 00:07:40 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1999 5 * Matthias Drochner. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: btvmei.c,v 1.12 2003/01/31 00:07:40 thorpej Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/proc.h> 39 #include <sys/malloc.h> 40 41 #include <machine/bus.h> 42 #include <sys/extent.h> 43 44 #include <dev/pci/pcireg.h> 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pcidevs.h> 47 48 #include <dev/vme/vmereg.h> 49 #include <dev/vme/vmevar.h> 50 51 #include <dev/pci/btvmeireg.h> 52 #include <dev/pci/btvmeivar.h> 53 54 static int b3_617_match __P((struct device *, struct cfdata *, void *)); 55 static void b3_617_attach __P((struct device *, struct device *, void *)); 56 #ifdef notyet 57 static int b3_617_detach __P((struct device *)); 58 #endif 59 void b3_617_slaveconfig __P((struct device *, struct vme_attach_args *)); 60 61 static void b3_617_vmeintr __P((struct b3_617_softc *, unsigned char)); 62 63 /* 64 * mapping ressources, needed for deallocation 65 */ 66 struct b3_617_vmeresc { 67 bus_space_handle_t handle; 68 bus_size_t len; 69 int firstpage, maplen; 70 }; 71 72 CFATTACH_DECL(btvmei, sizeof(struct b3_617_softc), 73 b3_617_match, b3_617_attach, NULL, NULL); 74 75 static int 76 b3_617_match(parent, match, aux) 77 struct device *parent; 78 struct cfdata *match; 79 void *aux; 80 { 81 struct pci_attach_args *pa = aux; 82 83 if ((PCI_VENDOR(pa->pa_id) != PCI_VENDOR_BIT3) 84 || (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_BIT3_PCIVME617)) 85 return (0); 86 return (1); 87 } 88 89 static void 90 b3_617_attach(parent, self, aux) 91 struct device *parent, *self; 92 void *aux; 93 { 94 struct b3_617_softc *sc = (struct b3_617_softc*)self; 95 struct pci_attach_args *pa = aux; 96 pci_chipset_tag_t pc = pa->pa_pc; 97 98 int rev; 99 100 pci_intr_handle_t ih; 101 const char *intrstr; 102 struct vmebus_attach_args vaa; 103 104 aprint_naive(": VME bus adapter\n"); 105 106 sc->sc_pc = pc; 107 sc->sc_dmat = pa->pa_dmat; 108 109 rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG)); 110 aprint_normal(": BIT3 PCI-VME 617 rev %d\n", rev); 111 112 /* 113 * Map CSR and mapping table spaces. 114 * Don't map VME window; parts are mapped as needed to 115 * save kernel virtual memory space 116 */ 117 if (pci_mapreg_map(pa, 0x14, 118 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 119 0, &sc->csrt, &sc->csrh, NULL, NULL) && 120 pci_mapreg_map(pa, 0x10, 121 PCI_MAPREG_TYPE_IO, 122 0, &sc->csrt, &sc->csrh, NULL, NULL)) { 123 aprint_error("%s: can't map CSR space\n", self->dv_xname); 124 return; 125 } 126 127 if (pci_mapreg_map(pa, 0x18, 128 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 129 0, &sc->mapt, &sc->maph, NULL, NULL)) { 130 aprint_error("%s: can't map map space\n", self->dv_xname); 131 return; 132 } 133 134 if (pci_mapreg_info(pc, pa->pa_tag, 0x1c, 135 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 136 &sc->vmepbase, 0, 0)) { 137 aprint_error("%s: can't get VME range\n", self->dv_xname); 138 return; 139 } 140 sc->sc_vmet = pa->pa_memt; /* XXX needed for VME mappings */ 141 142 /* Map and establish the interrupt. */ 143 if (pci_intr_map(pa, &ih)) { 144 aprint_error("%s: couldn't map interrupt\n", 145 sc->sc_dev.dv_xname); 146 return; 147 } 148 intrstr = pci_intr_string(pc, ih); 149 /* 150 * Use a low interrupt level (the lowest?). 151 * We will raise before calling a subdevice's handler. 152 */ 153 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, b3_617_intr, sc); 154 if (sc->sc_ih == NULL) { 155 aprint_error("%s: couldn't establish interrupt", 156 sc->sc_dev.dv_xname); 157 if (intrstr != NULL) 158 aprint_normal(" at %s", intrstr); 159 aprint_normal("\n"); 160 return; 161 } 162 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 163 164 if (b3_617_init(sc)) 165 return; 166 167 /* 168 * set up all the tags for use by VME devices 169 */ 170 sc->sc_vct.cookie = self; 171 sc->sc_vct.vct_probe = b3_617_vme_probe; 172 sc->sc_vct.vct_map = b3_617_map_vme; 173 sc->sc_vct.vct_unmap = b3_617_unmap_vme; 174 sc->sc_vct.vct_int_map = b3_617_map_vmeint; 175 sc->sc_vct.vct_int_establish = b3_617_establish_vmeint; 176 sc->sc_vct.vct_int_disestablish = b3_617_disestablish_vmeint; 177 sc->sc_vct.vct_dmamap_create = b3_617_dmamap_create; 178 sc->sc_vct.vct_dmamap_destroy = b3_617_dmamap_destroy; 179 sc->sc_vct.vct_dmamem_alloc = b3_617_dmamem_alloc; 180 sc->sc_vct.vct_dmamem_free = b3_617_dmamem_free; 181 182 vaa.va_vct = &(sc->sc_vct); 183 vaa.va_bdt = pa->pa_dmat; 184 vaa.va_slaveconfig = b3_617_slaveconfig; 185 186 sc->csrwindow.offset = -1; 187 sc->dmawindow24.offset = -1; 188 sc->dmawindow32.offset = -1; 189 config_found(self, &vaa, 0); 190 } 191 192 #ifdef notyet 193 static int 194 b3_617_detach(dev) 195 struct device *dev; 196 { 197 struct b3_617_softc *sc = (struct b3_617_softc *)dev; 198 199 b3_617_halt(sc); 200 201 if (sc->sc_ih) 202 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 203 204 bus_space_unmap(sc->sc_bc, sc->csrbase, 32); 205 bus_space_unmap(sc->sc_bc, sc->mapbase, 64*1024); 206 207 return(0); 208 } 209 #endif 210 211 void 212 b3_617_slaveconfig(dev, va) 213 struct device *dev; 214 struct vme_attach_args *va; 215 { 216 struct b3_617_softc *sc = (struct b3_617_softc *)dev; 217 vme_chipset_tag_t vmect; 218 int i, res; 219 char *name = 0; /* XXX gcc! */ 220 221 vmect = &sc->sc_vct; 222 if (!va) 223 goto freeit; 224 225 #ifdef DIAGNOSTIC 226 if (vmect != va->va_vct) 227 panic("pcivme_slaveconfig: chipset tag?"); 228 #endif 229 230 for (i = 0; i < va->numcfranges; i++) { 231 res = vme_space_alloc(vmect, va->r[i].offset, 232 va->r[i].size, va->r[i].am); 233 if (res) 234 panic("%s: can't alloc slave window %x/%x/%x", 235 dev->dv_xname, va->r[i].offset, 236 va->r[i].size, va->r[i].am); 237 238 switch (va->r[i].am & VME_AM_ADRSIZEMASK) { 239 /* structure assignments! */ 240 case VME_AM_A16: 241 sc->csrwindow = va->r[i]; 242 name = "VME CSR"; 243 break; 244 case VME_AM_A24: 245 sc->dmawindow24 = va->r[i]; 246 name = "A24 DMA"; 247 break; 248 case VME_AM_A32: 249 sc->dmawindow32 = va->r[i]; 250 name = "A32 DMA"; 251 break; 252 } 253 printf("%s: %s window: %x-%x\n", dev->dv_xname, 254 name, va->r[i].offset, 255 va->r[i].offset + va->r[i].size - 1); 256 } 257 return; 258 259 freeit: 260 if (sc->csrwindow.offset != -1) 261 vme_space_free(vmect, sc->csrwindow.offset, 262 sc->csrwindow.size, sc->csrwindow.am); 263 if (sc->dmawindow32.offset != -1) 264 vme_space_free(vmect, sc->dmawindow32.offset, 265 sc->dmawindow32.size, sc->dmawindow32.am); 266 if (sc->dmawindow24.offset != -1) 267 vme_space_free(vmect, sc->dmawindow24.offset, 268 sc->dmawindow24.size, sc->dmawindow24.am); 269 } 270 271 int 272 b3_617_reset(sc) 273 struct b3_617_softc *sc; 274 { 275 unsigned char status; 276 277 /* reset sequence, ch 5.2 */ 278 status = read_csr_byte(sc, LOC_STATUS); 279 if (status & LSR_NO_CONNECT) { 280 printf("%s: not connected\n", sc->sc_dev.dv_xname); 281 return (-1); 282 } 283 status = read_csr_byte(sc, REM_STATUS); /* discard */ 284 write_csr_byte(sc, LOC_CMD1, LC1_CLR_ERROR); 285 status = read_csr_byte(sc, LOC_STATUS); 286 if (status & LSR_CERROR_MASK) { 287 char sbuf[sizeof(BIT3_LSR_BITS) + 64]; 288 289 bitmask_snprintf(status, BIT3_LSR_BITS, sbuf, sizeof(sbuf)); 290 printf("%s: interface error, lsr=%s\n", sc->sc_dev.dv_xname, 291 sbuf); 292 return (-1); 293 } 294 return (0); 295 } 296 297 int 298 b3_617_init(sc) 299 struct b3_617_softc *sc; 300 { 301 unsigned int i; 302 303 if (b3_617_reset(sc)) 304 return (-1); 305 306 /* all maps invalid */ 307 for (i = MR_PCI_VME; i < MR_PCI_VME + MR_PCI_VME_SIZE; i += 4) 308 write_mapmem(sc, i, MR_RAM_INVALID); 309 for (i = MR_VME_PCI; i < MR_VME_PCI + MR_VME_PCI_SIZE; i += 4) 310 write_mapmem(sc, i, MR_RAM_INVALID); 311 for (i = MR_DMA_PCI; i < MR_DMA_PCI + MR_DMA_PCI_SIZE; i += 4) 312 write_mapmem(sc, i, MR_RAM_INVALID); 313 314 /* 315 * set up scatter page allocation control 316 */ 317 sc->vmeext = extent_create("pcivme", MR_PCI_VME, 318 MR_PCI_VME + MR_PCI_VME_SIZE - 1, M_DEVBUF, 319 sc->vmemap, sizeof(sc->vmemap), 320 EX_NOCOALESCE); 321 #if 0 322 sc->pciext = extent_create("vmepci", MR_VME_PCI, 323 MR_VME_PCI + MR_VME_PCI_SIZE - 1, M_DEVBUF, 324 sc->pcimap, sizeof(sc->pcimap), 325 EX_NOCOALESCE); 326 sc->dmaext = extent_create("dmapci", MR_DMA_PCI, 327 MR_DMA_PCI + MR_DMA_PCI_SIZE - 1, M_DEVBUF, 328 sc->dmamap, sizeof(sc->dmamap), 329 EX_NOCOALESCE); 330 #endif 331 332 /* 333 * init int handler queue, 334 * enable interrupts if PCI interrupt available 335 */ 336 TAILQ_INIT(&(sc->intrhdls)); 337 sc->strayintrs = 0; 338 339 if (sc->sc_ih) 340 write_csr_byte(sc, LOC_INT_CTRL, LIC_INT_ENABLE); 341 /* no error ints */ 342 write_csr_byte(sc, REM_CMD2, 0); /* enables VME IRQ */ 343 344 return (0); 345 } 346 347 #ifdef notyet /* for detach */ 348 void 349 b3_617_halt(sc) 350 struct b3_617_softc *sc; 351 { 352 /* 353 * because detach code checks for existence of children, 354 * all ressources (mappings, VME IRQs, DMA requests) 355 * should be deallocated at this point 356 */ 357 358 /* disable IRQ */ 359 write_csr_byte(sc, LOC_INT_CTRL, 0); 360 } 361 #endif 362 363 static void 364 b3_617_vmeintr(sc, lstat) 365 struct b3_617_softc *sc; 366 unsigned char lstat; 367 { 368 int level; 369 370 for (level = 7; level >= 1; level--) { 371 unsigned char vector; 372 struct b3_617_vmeintrhand *ih; 373 int found; 374 375 if (!(lstat & (1 << level))) 376 continue; 377 378 write_csr_byte(sc, REM_CMD1, level); 379 vector = read_csr_byte(sc, REM_IACK); 380 381 found = 0; 382 383 for (ih = sc->intrhdls.tqh_first; ih; 384 ih = ih->ih_next.tqe_next) { 385 if ((ih->ih_level == level) && 386 ((ih->ih_vector == -1) || 387 (ih->ih_vector == vector))) { 388 int s, res; 389 /* 390 * We should raise the interrupt level 391 * to ih->ih_prior here. How to do this 392 * machine-independantly? 393 * To be safe, raise to the maximum. 394 */ 395 s = splhigh(); 396 found |= (res = (*(ih->ih_fun))(ih->ih_arg)); 397 splx(s); 398 if (res) 399 ih->ih_count++; 400 if (res == 1) 401 break; 402 } 403 } 404 if (!found) 405 sc->strayintrs++; 406 } 407 } 408 409 #define sc ((struct b3_617_softc*)vsc) 410 411 int 412 b3_617_map_vme(vsc, vmeaddr, len, am, datasizes, swap, tag, handle, resc) 413 void *vsc; 414 vme_addr_t vmeaddr; 415 vme_size_t len; 416 vme_am_t am; 417 vme_datasize_t datasizes; 418 vme_swap_t swap; 419 bus_space_tag_t *tag; 420 bus_space_handle_t *handle; 421 vme_mapresc_t *resc; 422 { 423 vme_addr_t vmebase, vmeend, va; 424 unsigned long maplen, first, i; 425 u_int32_t mapreg; 426 bus_addr_t pcibase; 427 int res; 428 struct b3_617_vmeresc *r; 429 430 /* first mapped address */ 431 vmebase = vmeaddr & ~(VME_PAGESIZE - 1); 432 /* base of last mapped page */ 433 vmeend = (vmeaddr + len - 1) & ~(VME_PAGESIZE - 1); 434 /* bytes in scatter table required */ 435 maplen = ((vmeend - vmebase) / VME_PAGESIZE + 1) * 4; 436 437 if (extent_alloc(sc->vmeext, maplen, 4, 0, EX_FAST, &first)) 438 return (ENOMEM); 439 440 /* 441 * set up adapter mapping registers 442 */ 443 mapreg = (am << MR_AMOD_SHIFT) | MR_FC_RRAM | swap; 444 445 for (i = first, va = vmebase; 446 i < first + maplen; 447 i += 4, va += VME_PAGESIZE) { 448 write_mapmem(sc, i, mapreg | va); 449 #ifdef BIT3DEBUG 450 printf("mapreg@%lx=%x\n", i, read_mapmem(sc, i)); 451 #endif 452 } 453 454 #ifdef DIAGNOSTIC 455 if (va != vmeend + VME_PAGESIZE) 456 panic("b3_617_map_pci_vme: botch"); 457 #endif 458 /* 459 * map needed range in PCI space 460 */ 461 pcibase = sc->vmepbase + (first - MR_PCI_VME) / 4 * VME_PAGESIZE 462 + (vmeaddr & (VME_PAGESIZE - 1)); 463 464 if ((res = bus_space_map(sc->sc_vmet, pcibase, len, 0, handle))) { 465 for (i = first; i < first + maplen; i += 4) 466 write_mapmem(sc, i, MR_RAM_INVALID); 467 extent_free(sc->vmeext, first, maplen, 0); 468 return (res); 469 } 470 471 *tag = sc->sc_vmet; 472 473 /* 474 * save all data needed for later unmapping 475 */ 476 r = malloc(sizeof(*r), M_DEVBUF, M_NOWAIT); /* XXX check! */ 477 r->handle = *handle; 478 r->len = len; 479 r->firstpage = first; 480 r->maplen = maplen; 481 *resc = r; 482 return (0); 483 } 484 485 void 486 b3_617_unmap_vme(vsc, resc) 487 void *vsc; 488 vme_mapresc_t resc; 489 { 490 unsigned long i; 491 struct b3_617_vmeresc *r = resc; 492 493 /* unmap PCI window */ 494 bus_space_unmap(sc->sc_vmet, r->handle, r->len); 495 496 for (i = r->firstpage; i < r->firstpage + r->maplen; i += 4) 497 write_mapmem(sc, i, MR_RAM_INVALID); 498 499 extent_free(sc->vmeext, r->firstpage, r->maplen, 0); 500 501 free(r, M_DEVBUF); 502 } 503 504 int 505 b3_617_vme_probe(vsc, addr, len, am, datasize, callback, cbarg) 506 void *vsc; 507 vme_addr_t addr; 508 vme_size_t len; 509 vme_am_t am; 510 vme_datasize_t datasize; 511 int (*callback) __P((void *, bus_space_tag_t, bus_space_handle_t)); 512 void *cbarg; 513 { 514 bus_space_tag_t tag; 515 bus_space_handle_t handle; 516 vme_mapresc_t resc; 517 int res, i; 518 volatile u_int32_t dummy; 519 int status; 520 521 res = b3_617_map_vme(vsc, addr, len, am, 0, 0, 522 &tag, &handle, &resc); 523 if (res) 524 return (res); 525 526 if (read_csr_byte(sc, LOC_STATUS) & LSR_ERROR_MASK) { 527 printf("b3_617_vme_badaddr: error bit not clean - resetting\n"); 528 write_csr_byte(sc, LOC_CMD1, LC1_CLR_ERROR); 529 } 530 531 if (callback) 532 res = (*callback)(cbarg, tag, handle); 533 else { 534 for (i = 0; i < len;) { 535 switch (datasize) { 536 case VME_D8: 537 dummy = bus_space_read_1(tag, handle, i); 538 i++; 539 break; 540 case VME_D16: 541 dummy = bus_space_read_2(tag, handle, i); 542 i += 2; 543 break; 544 case VME_D32: 545 dummy = bus_space_read_4(tag, handle, i); 546 i += 4; 547 break; 548 default: 549 panic("b3_617_vme_probe: invalid datasize %x", 550 datasize); 551 } 552 } 553 } 554 555 if ((status = read_csr_byte(sc, LOC_STATUS)) & LSR_ERROR_MASK) { 556 #ifdef BIT3DEBUG 557 printf("b3_617_vme_badaddr: caught error %x\n", status); 558 #endif 559 write_csr_byte(sc, LOC_CMD1, LC1_CLR_ERROR); 560 res = EIO; 561 } 562 563 b3_617_unmap_vme(vsc, resc); 564 return (res); 565 } 566 567 int 568 b3_617_map_vmeint(vsc, level, vector, handlep) 569 void *vsc; 570 int level, vector; 571 vme_intr_handle_t *handlep; 572 { 573 if (!sc->sc_ih) { 574 printf("%s: b3_617_map_vmeint: no IRQ\n", 575 sc->sc_dev.dv_xname); 576 return (ENXIO); 577 } 578 /* 579 * We should check whether the interface can pass this interrupt 580 * level at all, but we don't know much about the jumper setting. 581 */ 582 *handlep = (void *)(long)((level << 8) | vector); /* XXX */ 583 return (0); 584 } 585 586 void * 587 b3_617_establish_vmeint(vsc, handle, prior, func, arg) 588 void *vsc; 589 vme_intr_handle_t handle; 590 int prior; 591 int (*func) __P((void *)); 592 void *arg; 593 { 594 struct b3_617_vmeintrhand *ih; 595 long lv; 596 int s; 597 598 /* no point in sleeping unless someone can free memory. */ 599 ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK); 600 if (ih == NULL) 601 panic("b3_617_map_vmeint: can't malloc handler info"); 602 603 lv = (long)handle; /* XXX */ 604 605 ih->ih_fun = func; 606 ih->ih_arg = arg; 607 ih->ih_level = lv >> 8; 608 ih->ih_vector = lv & 0xff; 609 ih->ih_prior = prior; 610 ih->ih_count = 0; 611 612 s = splhigh(); 613 TAILQ_INSERT_TAIL(&(sc->intrhdls), ih, ih_next); 614 splx(s); 615 616 return (ih); 617 } 618 619 void 620 b3_617_disestablish_vmeint(vsc, cookie) 621 void *vsc; 622 void *cookie; 623 { 624 struct b3_617_vmeintrhand *ih = cookie; 625 int s; 626 627 if (!ih) { 628 printf("b3_617_unmap_vmeint: NULL arg\n"); 629 return; 630 } 631 632 s = splhigh(); 633 TAILQ_REMOVE(&(sc->intrhdls), ih, ih_next); 634 splx(s); 635 636 free(ih, M_DEVBUF); 637 } 638 639 int 640 b3_617_intr(vsc) 641 void *vsc; 642 { 643 int handled = 0; 644 645 /* follows ch. 5.5.5 (reordered for speed) */ 646 while (read_csr_byte(sc, LOC_INT_CTRL) & LIC_INT_PENDING) { 647 unsigned char lstat; 648 649 handled = 1; 650 651 /* no error interrupts! */ 652 653 lstat = read_csr_byte(sc, LDMA_CMD); 654 if ((lstat & LDC_DMA_DONE) && (lstat & LDC_DMA_INT_ENABLE)) { 655 /* DMA done indicator flag */ 656 write_csr_byte(sc, LDMA_CMD, lstat & (~LDC_DMA_DONE)); 657 #if 0 658 b3_617_cntlrdma_done(sc); 659 #endif 660 continue; 661 } 662 663 lstat = read_csr_byte(sc, LOC_INT_STATUS); 664 if (lstat & LIS_CINT_MASK) { 665 /* VME backplane interrupt, ch. 5.5.3 */ 666 b3_617_vmeintr(sc, lstat); 667 } 668 669 /* for now, ignore "mailbox interrupts" */ 670 671 lstat = read_csr_byte(sc, LOC_STATUS); 672 if (lstat & LSR_PR_STATUS) { 673 /* PR interrupt received from REMOTE */ 674 write_csr_byte(sc, LOC_CMD1, LC1_CLR_PR_INT); 675 continue; 676 } 677 678 lstat = read_csr_byte(sc, REM_STATUS); 679 if (lstat & RSR_PT_STATUS) { 680 /* PT interrupt is set */ 681 write_csr_byte(sc, REM_CMD1, RC1_CLR_PT_INT); 682 continue; 683 } 684 } 685 return (handled); 686 } 687 688 int 689 b3_617_dmamap_create(vsc, len, am, datasize, swap, 690 nsegs, segsz, bound, 691 flags, mapp) 692 void *vsc; 693 vme_size_t len; 694 vme_am_t am; 695 vme_datasize_t datasize; 696 vme_swap_t swap; 697 int nsegs; 698 vme_size_t segsz; 699 vme_addr_t bound; 700 int flags; 701 bus_dmamap_t *mapp; 702 { 703 return (EINVAL); 704 } 705 706 void 707 b3_617_dmamap_destroy(vsc, map) 708 void *vsc; 709 bus_dmamap_t map; 710 { 711 } 712 713 int 714 b3_617_dmamem_alloc(vsc, len, am, datasizes, swap, 715 segs, nsegs, rsegs, flags) 716 void *vsc; 717 vme_size_t len; 718 vme_am_t am; 719 vme_datasize_t datasizes; 720 vme_swap_t swap; 721 bus_dma_segment_t *segs; 722 int nsegs; 723 int *rsegs; 724 int flags; 725 { 726 return (EINVAL); 727 } 728 729 void 730 b3_617_dmamem_free(vsc, segs, nsegs) 731 void *vsc; 732 bus_dma_segment_t *segs; 733 int nsegs; 734 { 735 } 736 737 #undef sc
Cache object: 010e3a703a8c45b6e4569313e94e28ae
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