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sys/dev/pci/if_lmcvar.h
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1 /* $NetBSD: if_lmcvar.h,v 1.11 2002/10/01 01:39:38 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997-1999 LAN Media Corporation (LMC) 5 * All rights reserved. www.lanmedia.com 6 * 7 * This code is written by Michael Graff <graff@vix.com> for LMC. 8 * The code is derived from permitted modifications to software created 9 * by Matt Thomas (matt@3am-software.com). 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above 17 * copyright notice, this list of conditions and the following disclaimer 18 * in the documentation and/or other materials provided with the 19 * distribution. 20 * 3. All marketing or advertising materials mentioning features or 21 * use of this software must display the following acknowledgement: 22 * This product includes software developed by LAN Media Corporation 23 * and its contributors. 24 * 4. Neither the name of LAN Media Corporation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY LAN MEDIA CORPORATION AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 38 * THE POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /*- 42 * Copyright (c) 1994-1997 Matt Thomas (matt@3am-software.com) 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. The name of the author may not be used to endorse or promote products 51 * derived from this software without specific prior written permission 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 57 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 58 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 62 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #if !defined(_DEVAR_H) 66 #define _DEVAR_H 67 68 #define LMC_MTU 1500 69 #define PPP_HEADER_LEN 4 70 #define BIG_PACKET 71 #define LMC_DATA_PER_DESC 2032 72 73 #if NetBSD >= 199803 74 #define LMC_BUS_DMA 1 75 /* #define LMC_BUS_DMA_NORX 1 */ 76 /* #define LMC_BUS_DMA_NOTX 1 */ 77 #endif 78 79 /* 80 * Intel CPUs should use I/O mapped access. XXXMLG Is this true on NetBSD 81 * too? 82 */ 83 #if defined(__i386__) 84 #define LMC_IOMAPPED 85 #endif 86 87 /* 88 * This turns on all sort of debugging stuff and make the 89 * driver much larger. 90 */ 91 #if 0 92 #define LMC_DEBUG 93 typedef enum { 94 LMC_21040_GENERIC, /* Generic 21040 (works with most any board) */ 95 LMC_21140_ISV, /* Digital Semicondutor 21140 ISV SROM Format */ 96 LMC_21142_ISV, /* Digital Semicondutor 21142 ISV SROM Format */ 97 LMC_21143_ISV, /* Digital Semicondutor 21143 ISV SROM Format */ 98 LMC_21140_DEC_EB, /* Digital Semicondutor 21140 Evaluation Board */ 99 LMC_21140_MII, /* 21140[A] with MII */ 100 LMC_21140_DEC_DE500, /* Digital DE500-?? 10/100 */ 101 LMC_21140_SMC_9332, /* SMC 9332 */ 102 LMC_21140_COGENT_EM100, /* Cogent EM100 100 only */ 103 LMC_21140_ZNYX_ZX34X, /* ZNYX ZX342 10/100 */ 104 LMC_21140_ASANTE, /* AsanteFast 10/100 */ 105 LMC_21140_EN1207, /* Accton EN2107 10/100 BNC */ 106 LMC_21041_GENERIC /* Generic 21041 card */ 107 } lmc_board_t; 108 109 typedef enum { 110 LMC_MEDIAPOLL_TIMER, /* 100ms timer fired */ 111 LMC_MEDIAPOLL_FASTTIMER, /* <100ms timer fired */ 112 LMC_MEDIAPOLL_LINKFAIL, /* called from interrupt routine */ 113 LMC_MEDIAPOLL_LINKPASS, /* called from interrupt routine */ 114 LMC_MEDIAPOLL_START, /* start a media probe (called from reset) */ 115 LMC_MEDIAPOLL_TXPROBE_OK, /* txprobe succeeded */ 116 LMC_MEDIAPOLL_TXPROBE_FAILED, /* txprobe failed */ 117 LMC_MEDIAPOLL_MAX 118 } lmc_mediapoll_event_t; 119 #define DP(x) printf x 120 #else 121 #define DP(x) 122 #endif 123 124 /* 125 * the dec chip has its own idea of what a receive error is, but we don't 126 * want to use it, as it will get the crc error wrong when 16-bit 127 * crcs are used. So, we only care about certain conditions. 128 */ 129 #ifndef TULIP_DSTS_RxMIIERR 130 #define TULIP_DSTS_RxMIIERR 0x00000008 131 #endif 132 #define LMC_DSTS_ERRSUM (TULIP_DSTS_RxMIIERR) 133 134 /* 135 * This is the PCI configuration support. 136 */ 137 #define PCI_CFID 0x00 /* Configuration ID */ 138 #define PCI_CFCS 0x04 /* Configurtion Command/Status */ 139 #define PCI_CFRV 0x08 /* Configuration Revision */ 140 #define PCI_CFLT 0x0c /* Configuration Latency Timer */ 141 #define PCI_CBIO 0x10 /* Configuration Base IO Address */ 142 #define PCI_CBMA 0x14 /* Configuration Base Memory Address */ 143 #define PCI_SSID 0x2c /* subsystem config register */ 144 #define PCI_CFIT 0x3c /* Configuration Interrupt */ 145 #define PCI_CFDA 0x40 /* Configuration Driver Area */ 146 147 #define LMC_HZ 10 148 149 #ifndef TULIP_GP_PINSET 150 #define TULIP_GP_PINSET 0x00000100L 151 #endif 152 #ifndef TULIP_BUSMODE_READMULTIPLE 153 #define TULIP_BUSMODE_READMULTIPLE 0x00200000L 154 #endif 155 156 #if defined(__NetBSD__) 157 158 #include "rnd.h" 159 #if NRND > 0 160 #include <sys/rnd.h> 161 #endif 162 163 #endif /* NetBSD */ 164 165 #if defined(__NetBSD__) 166 #define LMC_CSR_READ(sc, csr) \ 167 bus_space_read_4((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr) 168 #define LMC_CSR_WRITE(sc, csr, val) \ 169 bus_space_write_4((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr, (val)) 170 171 #define LMC_CSR_READBYTE(sc, csr) \ 172 bus_space_read_1((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr) 173 #define LMC_CSR_WRITEBYTE(sc, csr, val) \ 174 bus_space_write_1((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr, (val)) 175 #endif /* __NetBSD__ */ 176 177 #define LMC_PCI_CSRSIZE 8 178 #define LMC_PCI_CSROFFSET 0 179 180 #if !defined(__NetBSD__) 181 /* 182 * macros to read and write CSRs. Note that the "0 +" in 183 * READ_CSR is to prevent the macro from being an lvalue 184 * and WRITE_CSR shouldn't be assigned from. 185 */ 186 #define LMC_CSR_READ(sc, csr) (0 + *(sc)->lmc_csrs.csr) 187 #define LMC_CSR_WRITE(sc, csr, val) ((void)(*(sc)->lmc_csrs.csr = (val))) 188 #endif /* __NetBSD__ */ 189 190 /* 191 * This structure contains "pointers" for the registers on 192 * the various 21x4x chips. CSR0 through CSR8 are common 193 * to all chips. After that, it gets messy... 194 */ 195 typedef struct { 196 lmc_csrptr_t csr_busmode; /* CSR0 */ 197 lmc_csrptr_t csr_txpoll; /* CSR1 */ 198 lmc_csrptr_t csr_rxpoll; /* CSR2 */ 199 lmc_csrptr_t csr_rxlist; /* CSR3 */ 200 lmc_csrptr_t csr_txlist; /* CSR4 */ 201 lmc_csrptr_t csr_status; /* CSR5 */ 202 lmc_csrptr_t csr_command; /* CSR6 */ 203 lmc_csrptr_t csr_intr; /* CSR7 */ 204 lmc_csrptr_t csr_missed_frames; /* CSR8 */ 205 lmc_csrptr_t csr_9; /* CSR9 */ 206 lmc_csrptr_t csr_10; /* CSR10 */ 207 lmc_csrptr_t csr_11; /* CSR11 */ 208 lmc_csrptr_t csr_12; /* CSR12 */ 209 lmc_csrptr_t csr_13; /* CSR13 */ 210 lmc_csrptr_t csr_14; /* CSR14 */ 211 lmc_csrptr_t csr_15; /* CSR15 */ 212 } lmc_regfile_t; 213 214 #define csr_enetrom csr_9 /* 21040 */ 215 #define csr_reserved csr_10 /* 21040 */ 216 #define csr_full_duplex csr_11 /* 21040 */ 217 #define csr_bootrom csr_10 /* 21041/21140A/?? */ 218 #define csr_gp csr_12 /* 21140* */ 219 #define csr_watchdog csr_15 /* 21140* */ 220 #define csr_gp_timer csr_11 /* 21041/21140* */ 221 #define csr_srom_mii csr_9 /* 21041/21140* */ 222 #define csr_sia_status csr_12 /* 2104x */ 223 #define csr_sia_connectivity csr_13 /* 2104x */ 224 #define csr_sia_tx_rx csr_14 /* 2104x */ 225 #define csr_sia_general csr_15 /* 2104x */ 226 227 /* 228 * While 21x4x allows chaining of its descriptors, this driver 229 * doesn't take advantage of it. We keep the descriptors in a 230 * traditional FIFO ring. 231 */ 232 struct lmc_ringinfo { 233 lmc_desc_t *ri_first; /* first entry in ring */ 234 lmc_desc_t *ri_last; /* one after last entry */ 235 lmc_desc_t *ri_nextin; /* next to processed by host */ 236 lmc_desc_t *ri_nextout; /* next to processed by adapter */ 237 int ri_max; 238 int ri_free; 239 }; 240 241 /* 242 * The 21040 has a stupid restriction in that the receive 243 * buffers must be longword aligned. But since Ethernet 244 * headers are not a multiple of longwords in size this forces 245 * the data to non-longword aligned. Since IP requires the 246 * data to be longword aligned, we need to copy it after it has 247 * been DMA'ed in our memory. 248 * 249 * Since we have to copy it anyways, we might as well as allocate 250 * dedicated receive space for the input. This allows to use a 251 * small receive buffer size and more ring entries to be able to 252 * better keep with a flood of tiny Ethernet packets. 253 * 254 * The receive space MUST ALWAYS be a multiple of the page size. 255 * And the number of receive descriptors multiplied by the size 256 * of the receive buffers must equal the recevive space. This 257 * is so that we can manipulate the page tables so that even if a 258 * packet wraps around the end of the receive space, we can 259 * treat it as virtually contiguous. 260 * 261 * The above used to be true (the stupid restriction is still true) 262 * but we gone to directly DMA'ing into MBUFs (unless it's on an 263 * architecture which can't handle unaligned accesses) because with 264 * 100Mb/s cards the copying is just too much of a hit. 265 */ 266 267 #define LMC_RXDESCS 48 268 #define LMC_TXDESCS 128 269 #define LMC_RXQ_TARGET 32 270 #if LMC_RXQ_TARGET >= LMC_RXDESCS 271 #error LMC_RXQ_TARGET must be less than LMC_RXDESCS 272 #endif 273 274 #define LMC_RX_BUFLEN ((MCLBYTES < 2048 ? MCLBYTES : 2048) - 16) 275 276 #define LMC_LINK_UP 1 277 #define LMC_LINK_DOWN 0 278 279 typedef enum { 280 LMC_21140, LMC_21140A, 281 LMC_CHIPID_UNKNOWN 282 } lmc_chipid_t; 283 284 #define LMC_BIT(b) (1L << ((int)(b))) 285 286 typedef struct { 287 /* 288 * Transmit Statistics 289 */ 290 u_int32_t dot3StatsSingleCollisionFrames; 291 u_int32_t dot3StatsMultipleCollisionFrames; 292 u_int32_t dot3StatsSQETestErrors; 293 u_int32_t dot3StatsDeferredTransmissions; 294 u_int32_t dot3StatsLateCollisions; 295 u_int32_t dot3StatsExcessiveCollisions; 296 u_int32_t dot3StatsCarrierSenseErrors; 297 u_int32_t dot3StatsInternalMacTransmitErrors; 298 u_int32_t dot3StatsInternalTransmitUnderflows; /* not in rfc1650! */ 299 u_int32_t dot3StatsInternalTransmitBabbles; /* not in rfc1650! */ 300 /* 301 * Receive Statistics 302 */ 303 u_int32_t dot3StatsMissedFrames; /* not in rfc1650! */ 304 u_int32_t dot3StatsAlignmentErrors; 305 u_int32_t dot3StatsFCSErrors; 306 u_int32_t dot3StatsFrameTooLongs; 307 u_int32_t dot3StatsInternalMacReceiveErrors; 308 } lmc_dot3_stats_t; 309 310 /* 311 * Now to important stuff. This is softc structure (where does softc 312 * come from??? No idea) for the tulip device. 313 * 314 */ 315 struct lmc___softc { 316 #if defined(__bsdi__) 317 struct device lmc_dev; /* base device */ 318 struct isadev lmc_id; /* ISA device */ 319 struct intrhand lmc_ih; /* intrrupt vectoring */ 320 struct atshutdown lmc_ats; /* shutdown hook */ 321 struct p2pcom lmc_p2pcom; /* point-to-point common stuff */ 322 323 #define lmc_if lmc_p2pcom.p2p_if /* network-visible interface */ 324 #endif /* __bsdi__ */ 325 326 #if defined(__NetBSD__) 327 struct device lmc_dev; /* base device */ 328 void *lmc_ih; /* intrrupt vectoring */ 329 void *lmc_ats; /* shutdown hook */ 330 bus_space_tag_t lmc_bustag; 331 bus_space_handle_t lmc_bushandle; /* CSR region handle */ 332 pci_chipset_tag_t lmc_pc; 333 #endif 334 335 #if defined(__NetBSD__) || defined(__FreeBSD__) 336 struct sppp lmc_sppp; 337 #define lmc_if lmc_sppp.pp_if 338 #endif 339 340 u_int8_t lmc_enaddr[6]; /* yes, a small hack... */ 341 lmc_regfile_t lmc_csrs; 342 volatile u_int32_t lmc_txtick; 343 volatile u_int32_t lmc_rxtick; 344 u_int32_t lmc_flags; 345 346 u_int32_t lmc_features; /* static bits indicating features of chip */ 347 u_int32_t lmc_intrmask; /* our copy of csr_intr */ 348 u_int32_t lmc_cmdmode; /* our copy of csr_cmdmode */ 349 u_int32_t lmc_last_system_error : 3; /* last system error (only value is LMC_SYSTEMERROR is also set) */ 350 u_int32_t lmc_system_errors; /* number of system errors encountered */ 351 u_int32_t lmc_statusbits; /* status bits from CSR5 that may need to be printed */ 352 353 u_int8_t lmc_revinfo; /* revision of chip */ 354 u_int8_t lmc_cardtype; /* LMC_CARDTYPE_HSSI or ..._DS3 */ 355 u_int32_t lmc_gpio_io; /* state of in/out settings */ 356 u_int32_t lmc_gpio; /* state of outputs */ 357 u_int8_t lmc_gp; 358 359 lmc_chipid_t lmc_chipid; /* type of chip we are using */ 360 u_int32_t lmc_miireg16; 361 struct ifqueue lmc_txq; 362 struct ifqueue lmc_rxq; 363 lmc_dot3_stats_t lmc_dot3stats; 364 lmc_ringinfo_t lmc_rxinfo; 365 lmc_ringinfo_t lmc_txinfo; 366 u_int8_t lmc_rombuf[128]; 367 lmc_media_t *lmc_media; 368 lmc_ctl_t ictl; 369 370 #if defined(LMC_BUS_DMA) 371 bus_dma_tag_t lmc_dmatag; /* bus DMA tag */ 372 #if !defined(LMC_BUS_DMA_NOTX) 373 bus_dmamap_t lmc_setupmap; 374 bus_dmamap_t lmc_txdescmap; 375 bus_dmamap_t lmc_txmaps[LMC_TXDESCS]; 376 unsigned lmc_txmaps_free; 377 #endif 378 #if !defined(LMC_BUS_DMA_NORX) 379 bus_dmamap_t lmc_rxdescmap; 380 bus_dmamap_t lmc_rxmaps[LMC_RXDESCS]; 381 unsigned lmc_rxmaps_free; 382 #endif 383 #endif 384 385 386 #if defined(__NetBSD__) 387 struct device *lmc_pci_busno; /* needed for multiport boards */ 388 #else 389 u_int8_t lmc_pci_busno; /* needed for multiport boards */ 390 #endif 391 u_int8_t lmc_pci_devno; /* needed for multiport boards */ 392 #if defined(__FreeBSD__) || defined(__NetBSD__) 393 lmc_desc_t *lmc_rxdescs; 394 lmc_desc_t *lmc_txdescs; 395 #else 396 lmc_desc_t lmc_rxdescs[LMC_RXDESCS]; 397 lmc_desc_t lmc_txdescs[LMC_TXDESCS]; 398 #endif 399 #if defined(__NetBSD__) && NRND > 0 400 rndsource_element_t lmc_rndsource; 401 #endif 402 403 u_int32_t lmc_crcSize; 404 u_int32_t tx_clockState; 405 char lmc_yel, lmc_blue, lmc_red; /* for T1 and DS3 */ 406 char lmc_timing; /* for HSSI and SSI */ 407 u_int16_t t1_alarm1_status; 408 u_int16_t t1_alarm2_status; 409 #if defined(LMC_DEBUG) 410 /* 411 * Debugging/Statistical information 412 */ 413 struct { 414 lmc_media_t dbg_last_media; 415 u_int32_t dbg_intrs; 416 u_int32_t dbg_media_probes; 417 u_int32_t dbg_txprobe_nocarr; 418 u_int32_t dbg_txprobe_exccoll; 419 u_int32_t dbg_link_downed; 420 u_int32_t dbg_link_suspected; 421 u_int32_t dbg_link_intrs; 422 u_int32_t dbg_link_pollintrs; 423 u_int32_t dbg_link_failures; 424 u_int32_t dbg_nway_starts; 425 u_int32_t dbg_nway_failures; 426 u_int16_t dbg_phyregs[32][4]; 427 u_int32_t dbg_rxlowbufs; 428 u_int32_t dbg_rxintrs; 429 u_int32_t dbg_last_rxintrs; 430 u_int32_t dbg_high_rxintrs_hz; 431 u_int32_t dbg_no_txmaps; 432 u_int32_t dbg_txput_finishes[8]; 433 u_int32_t dbg_txprobes_ok; 434 u_int32_t dbg_txprobes_failed; 435 u_int32_t dbg_events[LMC_MEDIAPOLL_MAX]; 436 u_int32_t dbg_rxpktsperintr[LMC_RXDESCS]; 437 } lmc_dbg; 438 #endif 439 440 }; 441 442 /* 443 * lmc_flags 444 */ 445 #define LMC_IFUP 0x00000001 446 #define LMC_00000002 0x00000002 447 #define LMC_00000004 0x00000004 448 #define LMC_00000008 0x00000008 449 #define LMC_00000010 0x00000010 450 #define LMC_MODEMOK 0x00000020 451 #define LMC_00000040 0x00000040 452 #define LMC_00000080 0x00000080 453 #define LMC_RXACT 0x00000100 454 #define LMC_INRESET 0x00000200 455 #define LMC_NEEDRESET 0x00000400 456 #define LMC_00000800 0x00000800 457 #define LMC_00001000 0x00001000 458 #define LMC_00002000 0x00002000 459 #define LMC_WANTTXSTART 0x00004000 460 #define LMC_NEWTXTHRESH 0x00008000 461 #define LMC_NOAUTOSENSE 0x00010000 462 #define LMC_PRINTLINKUP 0x00020000 463 #define LMC_LINKUP 0x00040000 464 #define LMC_RXBUFSLOW 0x00080000 465 #define LMC_NOMESSAGES 0x00100000 466 #define LMC_SYSTEMERROR 0x00200000 467 #define LMC_TIMEOUTPENDING 0x00400000 468 #define LMC_00800000 0x00800000 469 #define LMC_01000000 0x01000000 470 #define LMC_02000000 0x02000000 471 #define LMC_RXIGNORE 0x04000000 472 #define LMC_08000000 0x08000000 473 #define LMC_10000000 0x10000000 474 #define LMC_20000000 0x20000000 475 #define LMC_40000000 0x40000000 476 #define LMC_80000000 0x80000000 477 478 /* 479 * lmc_features 480 */ 481 #define LMC_HAVE_GPR 0x00000001 /* have gp register (140[A]) */ 482 #define LMC_HAVE_RXBADOVRFLW 0x00000002 /* RX corrupts on overflow */ 483 #define LMC_HAVE_POWERMGMT 0x00000004 /* Snooze/sleep modes */ 484 #define LMC_HAVE_MII 0x00000008 /* Some medium on MII */ 485 #define LMC_HAVE_SIANWAY 0x00000010 /* SIA does NWAY */ 486 #define LMC_HAVE_DUALSENSE 0x00000020 /* SIA senses both AUI & TP */ 487 #define LMC_HAVE_SIAGP 0x00000040 /* SIA has a GP port */ 488 #define LMC_HAVE_BROKEN_HASH 0x00000080 /* Broken Multicast Hash */ 489 #define LMC_HAVE_ISVSROM 0x00000100 /* uses ISV SROM Format */ 490 #define LMC_HAVE_BASEROM 0x00000200 /* Board ROM can be cloned */ 491 #define LMC_HAVE_SLAVEDROM 0x00000400 /* Board ROM cloned */ 492 #define LMC_HAVE_SLAVEDINTR 0x00000800 /* Board slaved interrupt */ 493 #define LMC_HAVE_SHAREDINTR 0x00001000 /* Board shares interrupts */ 494 #define LMC_HAVE_OKROM 0x00002000 /* ROM was recognized */ 495 #define LMC_HAVE_NOMEDIA 0x00004000 /* did not detect any media */ 496 #define LMC_HAVE_STOREFWD 0x00008000 /* have CMD_STOREFWD */ 497 #define LMC_HAVE_SIA100 0x00010000 /* has LS100 in SIA status */ 498 499 static const char * const lmc_system_errors[] __attribute__((__unused__)) = { 500 "parity error", 501 "master abort", 502 "target abort", 503 "reserved #3", 504 "reserved #4", 505 "reserved #5", 506 "reserved #6", 507 "reserved #7", 508 }; 509 510 #if 0 511 static const char * const lmc_status_bits[] = { 512 NULL, 513 "transmit process stopped", 514 NULL, 515 "transmit jabber timeout", 516 517 NULL, 518 "transmit underflow", 519 NULL, 520 "receive underflow", 521 522 "receive process stopped", 523 "receive watchdog timeout", 524 NULL, 525 NULL, 526 527 "link failure", 528 NULL, 529 NULL, 530 }; 531 #endif 532 533 /* 534 * This driver supports a maximum of 32 tulip boards. 535 * This should be enough for the forseeable future. 536 */ 537 #define LMC_MAX_DEVICES 32 538 539 #if defined(LMC_BUS_DMA) && !defined(LMC_BUS_DMA_NORX) 540 #define LMC_RXDESC_PRESYNC(sc, di, s) \ 541 bus_dmamap_sync((sc)->lmc_dmatag, (sc)->lmc_rxdescmap, \ 542 (caddr_t) di - (caddr_t) (sc)->lmc_rxdescs, \ 543 (s), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE) 544 #define LMC_RXDESC_POSTSYNC(sc, di, s) \ 545 bus_dmamap_sync((sc)->lmc_dmatag, (sc)->lmc_rxdescmap, \ 546 (caddr_t) di - (caddr_t) (sc)->lmc_rxdescs, \ 547 (s), BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE) 548 #define LMC_RXMAP_PRESYNC(sc, map) \ 549 bus_dmamap_sync((sc)->lmc_dmatag, (map), 0, (map)->dm_mapsize, \ 550 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE) 551 #define LMC_RXMAP_POSTSYNC(sc, map) \ 552 bus_dmamap_sync((sc)->lmc_dmatag, (map), 0, (map)->dm_mapsize, \ 553 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE) 554 #define LMC_RXMAP_CREATE(sc, mapp) \ 555 bus_dmamap_create((sc)->lmc_dmatag, LMC_RX_BUFLEN, 2, \ 556 LMC_DATA_PER_DESC, 0, \ 557 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, (mapp)) 558 #else 559 #define LMC_RXDESC_PRESYNC(sc, di, s) do { } while (0) 560 #define LMC_RXDESC_POSTSYNC(sc, di, s) do { } while (0) 561 #define LMC_RXMAP_PRESYNC(sc, map) do { } while (0) 562 #define LMC_RXMAP_POSTSYNC(sc, map) do { } while (0) 563 #define LMC_RXMAP_CREATE(sc, mapp) do { } while (0) 564 #endif 565 566 #if defined(LMC_BUS_DMA) && !defined(LMC_BUS_DMA_NOTX) 567 #define LMC_TXDESC_PRESYNC(sc, di, s) \ 568 bus_dmamap_sync((sc)->lmc_dmatag, (sc)->lmc_txdescmap, \ 569 (caddr_t) di - (caddr_t) (sc)->lmc_txdescs, \ 570 (s), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE) 571 #define LMC_TXDESC_POSTSYNC(sc, di, s) \ 572 bus_dmamap_sync((sc)->lmc_dmatag, (sc)->lmc_txdescmap, \ 573 (caddr_t) di - (caddr_t) (sc)->lmc_txdescs, \ 574 (s), BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE) 575 #define LMC_TXMAP_PRESYNC(sc, map) \ 576 bus_dmamap_sync((sc)->lmc_dmatag, (map), 0, (map)->dm_mapsize, \ 577 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE) 578 #define LMC_TXMAP_POSTSYNC(sc, map) \ 579 bus_dmamap_sync((sc)->lmc_dmatag, (map), 0, (map)->dm_mapsize, \ 580 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE) 581 #define LMC_TXMAP_CREATE(sc, mapp) \ 582 bus_dmamap_create((sc)->lmc_dmatag, LMC_DATA_PER_DESC, \ 583 LMC_MAX_TXSEG, LMC_DATA_PER_DESC, \ 584 0, BUS_DMA_NOWAIT, (mapp)) 585 #else 586 #define LMC_TXDESC_PRESYNC(sc, di, s) do { } while (0) 587 #define LMC_TXDESC_POSTSYNC(sc, di, s) do { } while (0) 588 #define LMC_TXMAP_PRESYNC(sc, map) do { } while (0) 589 #define LMC_TXMAP_POSTSYNC(sc, map) do { } while (0) 590 #define LMC_TXMAP_CREATE(sc, mapp) do { } while (0) 591 #endif 592 593 594 #if defined(__FreeBSD__) 595 #define ifnet_ret_t void 596 typedef int ioctl_cmd_t; 597 static lmc_softc_t *tulips[LMC_MAX_DEVICES]; 598 #if BSD >= 199506 599 #define LMC_IFP_TO_SOFTC(ifp) ((lmc_softc_t *)((ifp)->if_softc)) 600 #if NBPFILTER > 0 601 #define LMC_BPF_MTAP(sc, m) bpf_mtap(&(sc)->lmc_sppp.pp_if, m) 602 #define LMC_BPF_TAP(sc, p, l) bpf_tap(&(sc)->lmc_sppp.pp_if, p, l) 603 #define LMC_BPF_ATTACH(sc) bpfattach(&(sc)->lmc_sppp.pp_if, DLT_PPP, PPP_HEADER_LEN) 604 #endif 605 #define LMC_VOID_INTRFUNC 606 #define IFF_NOTRAILERS 0 607 #define CLBYTES PAGE_SIZE 608 #define LMC_EADDR_FMT "%6D" 609 #define LMC_EADDR_ARGS(addr) addr, ":" 610 #else 611 extern int bootverbose; 612 #define LMC_IFP_TO_SOFTC(ifp) (LMC_UNIT_TO_SOFTC((ifp)->if_unit)) 613 #include <sys/devconf.h> 614 #define LMC_DEVCONF 615 #endif 616 #define LMC_UNIT_TO_SOFTC(unit) (tulips[unit]) 617 #define LMC_BURSTSIZE(unit) pci_max_burst_len 618 #define loudprintf if (bootverbose) printf 619 #endif 620 621 #if defined(__bsdi__) 622 #define ifnet_ret_t int 623 typedef u_long ioctl_cmd_t; 624 extern struct cfdriver lmccd; 625 #define LMC_UNIT_TO_SOFTC(unit) ((lmc_softc_t *)lmccd.cd_devs[unit]) 626 #define LMC_IFP_TO_SOFTC(ifp) (LMC_UNIT_TO_SOFTC((ifp)->if_unit)) 627 #define loudprintf aprint_verbose 628 #define MCNT(x) (sizeof(x) / sizeof(struct ifmedia_entry)) 629 #define lmc_unit lmc_dev.dv_unit 630 #define lmc_name lmc_p2pcom.p2p_if.if_name 631 #define LMC_BPF_MTAP(sc, m) 632 #define LMC_BPF_TAP(sc, p, l) 633 #define LMC_BPF_ATTACH(sc) 634 #endif /* __bsdi__ */ 635 636 #if defined(__NetBSD__) 637 #define ifnet_ret_t void 638 typedef u_long ioctl_cmd_t; 639 extern struct cfdriver de_cd; 640 #define LMC_UNIT_TO_SOFTC(unit) ((lmc_softc_t *) de_cd.cd_devs[unit]) 641 #define LMC_IFP_TO_SOFTC(ifp) ((lmc_softc_t *)((ifp)->if_softc)) 642 #define lmc_unit lmc_dev.dv_unit 643 #define lmc_xname lmc_if.if_xname 644 #define LMC_RAISESPL() splnet() 645 #define LMC_RAISESOFTSPL() splsoftnet() 646 #define LMC_RESTORESPL(s) splx(s) 647 #define lmc_enaddr lmc_enaddr 648 #define loudprintf printf 649 #define LMC_PRINTF_FMT "%s" 650 #define LMC_PRINTF_ARGS sc->lmc_xname 651 #if !defined(LMC_BUS_DMA) || defined(LMC_BUS_DMA_NORX) || defined(LMC_BUS_DMA_NOTX) 652 #if defined(__alpha__) 653 /* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */ 654 #define LMC_KVATOPHYS(sc, va) alpha_XXX_dmamap((vaddr_t)(va)) 655 #endif 656 #endif 657 #endif /* __NetBSD__ */ 658 659 #ifndef LMC_PRINTF_FMT 660 #define LMC_PRINTF_FMT "%s%d" 661 #endif 662 #ifndef LMC_PRINTF_ARGS 663 #define LMC_PRINTF_ARGS sc->lmc_name, sc->lmc_unit 664 #endif 665 666 #ifndef LMC_BURSTSIZE 667 #define LMC_BURSTSIZE(unit) 3 668 #endif 669 670 #ifndef lmc_unit 671 #define lmc_unit lmc_sppp.pp_if.if_unit 672 #endif 673 674 #ifndef lmc_name 675 #define lmc_name lmc_sppp.pp_if.if_name 676 #endif 677 678 #if !defined(lmc_bpf) 679 #if defined(__NetBSD__) || defined(__FreeBSD__) 680 #define lmc_bpf lmc_sppp.pp_if.if_bpf 681 #endif 682 #if defined(__bsdi__) 683 #define lmc_bpf lmc_if.if_bpf 684 #endif 685 #endif 686 687 #if !defined(LMC_KVATOPHYS) && (!defined(LMC_BUS_DMA) || defined(LMC_BUS_DMA_NORX) || defined(LMC_BUS_DMA_NOTX)) 688 #define LMC_KVATOPHYS(sc, va) vtophys((vaddr_t)(va)) 689 #endif 690 691 #ifndef LMC_RAISESPL 692 #define LMC_RAISESPL() splimp() 693 #endif 694 #ifndef LMC_RAISESOFTSPL 695 #define LMC_RAISESOFTSPL() splnet() 696 #endif 697 #ifndef TULUP_RESTORESPL 698 #define LMC_RESTORESPL(s) splx(s) 699 #endif 700 701 /* 702 * While I think FreeBSD's 2.2 change to the bpf is a nice simplification, 703 * it does add yet more conditional code to this driver. Sigh. 704 */ 705 #if !defined(LMC_BPF_MTAP) && NBPFILTER > 0 706 #define LMC_BPF_MTAP(sc, m) bpf_mtap((sc)->lmc_bpf, m) 707 #define LMC_BPF_TAP(sc, p, l) bpf_tap((sc)->lmc_bpf, p, l) 708 #define LMC_BPF_ATTACH(sc) bpfattach(&(sc)->lmc_sppp.pp_if, DLT_HDLC, PPP_HEADER_LEN) 709 #endif 710 711 /* 712 * However, this change to FreeBSD I am much less enamored with. 713 */ 714 #if !defined(LMC_EADDR_FMT) 715 #define LMC_EADDR_FMT "%s" 716 #define LMC_EADDR_ARGS(addr) ether_sprintf(addr) 717 #endif 718 719 #define LMC_CRC32_POLY 0xEDB88320UL /* CRC-32 Poly -- Little Endian */ 720 #define LMC_MAX_TXSEG 30 721 722 #define LMC_ADDREQUAL(a1, a2) \ 723 (((u_int16_t *)a1)[0] == ((u_int16_t *)a2)[0] \ 724 && ((u_int16_t *)a1)[1] == ((u_int16_t *)a2)[1] \ 725 && ((u_int16_t *)a1)[2] == ((u_int16_t *)a2)[2]) 726 #define LMC_ADDRBRDCST(a1) \ 727 (((u_int16_t *)a1)[0] == 0xFFFFU \ 728 && ((u_int16_t *)a1)[1] == 0xFFFFU \ 729 && ((u_int16_t *)a1)[2] == 0xFFFFU) 730 731 typedef int lmc_spl_t; 732 733 #endif /* !defined(_DEVAR_H) */
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