FreeBSD/Linux Kernel Cross Reference
sys/dev/pci/njs_pci.c
1 /* $NetBSD: njs_pci.c,v 1.2.2.3 2004/08/30 09:54:17 tron Exp $ */
2
3 /*-
4 * Copyright (c) 2004 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by ITOH Yasufumi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: njs_pci.c,v 1.2.2.3 2004/08/30 09:54:17 tron Exp $");
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/device.h>
46
47 #include <machine/bus.h>
48 #include <machine/intr.h>
49
50 #include <dev/scsipi/scsi_all.h>
51 #include <dev/scsipi/scsipi_all.h>
52 #include <dev/scsipi/scsiconf.h>
53
54 #include <dev/pci/pcivar.h>
55 #include <dev/pci/pcidevs.h>
56
57 #include <dev/ic/ninjascsi32reg.h>
58 #include <dev/ic/ninjascsi32var.h>
59
60 #define NJSC32_PCI_BASEADDR_IO PCI_MAPREG_START
61 #define NJSC32_PCI_BASEADDR_MEM (PCI_MAPREG_START + 4)
62
63 struct njsc32_pci_softc {
64 struct njsc32_softc sc_njsc32;
65
66 pci_chipset_tag_t sc_pc;
67
68 bus_space_handle_t sc_regmaph;
69 bus_size_t sc_regmap_size;
70 };
71
72 static int njs_pci_match(struct device *, struct cfdata *, void *);
73 static void njs_pci_attach(struct device *, struct device *, void *);
74 static int njs_pci_detach(struct device *, int);
75
76 CFATTACH_DECL(njs_pci, sizeof(struct njsc32_pci_softc),
77 njs_pci_match, njs_pci_attach, njs_pci_detach, NULL);
78
79 static const struct njsc32_pci_product {
80 pci_vendor_id_t p_vendor;
81 pci_product_id_t p_product;
82 njsc32_model_t p_model;
83 int p_clk; /* one of NJSC32_CLK_* */
84 } njsc32_pci_products[] = {
85 { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_IODATA,
86 NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M },
87 { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_LOGITEC,
88 NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M },
89 { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_LOGITEC2,
90 NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M },
91 { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_BUFFALO,
92 NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M },
93
94 { 0, 0,
95 NJSC32_MODEL_INVALID, 0 },
96 };
97
98 static const struct njsc32_pci_product *
99 njs_pci_lookup(const struct pci_attach_args *pa)
100 {
101 const struct njsc32_pci_product *p;
102
103 for (p = njsc32_pci_products;
104 p->p_model != NJSC32_MODEL_INVALID; p++) {
105 if (PCI_VENDOR(pa->pa_id) == p->p_vendor &&
106 PCI_PRODUCT(pa->pa_id) == p->p_product)
107 return p;
108 }
109
110 return NULL;
111 }
112
113 static int
114 njs_pci_match(struct device *parent, struct cfdata *match, void *aux)
115 {
116 struct pci_attach_args *pa = aux;
117
118 if (njs_pci_lookup(pa))
119 return 1;
120
121 return 0;
122 }
123
124 static void
125 njs_pci_attach(struct device *parent, struct device *self, void *aux)
126 {
127 struct pci_attach_args *pa = aux;
128 struct njsc32_pci_softc *psc = (void *) self;
129 struct njsc32_softc *sc = &psc->sc_njsc32;
130 const struct njsc32_pci_product *prod;
131 pci_intr_handle_t ih;
132 pci_chipset_tag_t pc = pa->pa_pc;
133 pcireg_t reg;
134 const char *str_intr, *str_at;
135
136 aprint_naive(": SCSI controller\n");
137 if ((prod = njs_pci_lookup(pa)) == NULL)
138 panic("njs_pci_attach");
139
140 aprint_normal(": Workbit NinjaSCSI-32 SCSI adapter\n");
141 sc->sc_model = prod->p_model;
142 sc->sc_clk = prod->p_clk;
143
144 psc->sc_pc = pc;
145
146 /* enable device and DMA */
147 reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
148 reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
149 PCI_COMMAND_MASTER_ENABLE;
150 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
151
152 /*
153 * Map registers.
154 * Try memory map first, and then try I/O.
155 */
156 if (pci_mapreg_map(pa, NJSC32_PCI_BASEADDR_MEM,
157 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
158 &sc->sc_regt, &psc->sc_regmaph, NULL, &psc->sc_regmap_size) == 0) {
159 if (bus_space_subregion(sc->sc_regt, psc->sc_regmaph,
160 NJSC32_MEMOFFSET_REG, NJSC32_REGSIZE, &sc->sc_regh) != 0) {
161 /* failed -- undo map and try I/O */
162 bus_space_unmap(sc->sc_regt, psc->sc_regmaph,
163 psc->sc_regmap_size);
164 goto try_io;
165 }
166 #ifdef NJSC32_DEBUG
167 printf("%s: memory space mapped\n", sc->sc_dev.dv_xname);
168 #endif
169 sc->sc_flags = NJSC32_MEM_MAPPED;
170 } else {
171 try_io:
172 if (pci_mapreg_map(pa, NJSC32_PCI_BASEADDR_IO,
173 PCI_MAPREG_TYPE_IO, 0, &sc->sc_regt, &sc->sc_regh,
174 NULL, &psc->sc_regmap_size) == 0) {
175 #ifdef NJSC32_DEBUG
176 printf("%s: io space mapped\n", sc->sc_dev.dv_xname);
177 #endif
178 sc->sc_flags = NJSC32_IO_MAPPED;
179 } else {
180 aprint_error("%s: unable to map device registers\n",
181 sc->sc_dev.dv_xname);
182 return;
183 }
184 }
185
186 sc->sc_dmat = pa->pa_dmat;
187
188 /* map interrupt */
189 if (pci_intr_map(pa, &ih)) {
190 aprint_error("%s: couldn't map interrupt\n",
191 sc->sc_dev.dv_xname);
192 return;
193 }
194
195 str_intr = pci_intr_string(pa->pa_pc, ih);
196 str_at = " at ";
197 if (str_intr == NULL)
198 str_at = str_intr = "";
199
200 /* setup interrupt handler */
201 if ((sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, njsc32_intr, sc))
202 == NULL) {
203 printf("%s: unable to establish interrupt%s%s\n",
204 sc->sc_dev.dv_xname, str_at, str_intr);
205 return;
206 }
207 printf("%s: interrupting%s%s\n",
208 sc->sc_dev.dv_xname, str_at, str_intr);
209
210 /* attach */
211 njsc32_attach(sc);
212 }
213
214 static int
215 njs_pci_detach(struct device *self, int flags)
216 {
217 struct njsc32_pci_softc *psc = (void *) self;
218 struct njsc32_softc *sc = &psc->sc_njsc32;
219 int rv;
220
221 rv = njsc32_detach(sc, flags);
222 if (rv)
223 return rv;
224
225 if (sc->sc_ih)
226 pci_intr_disestablish(psc->sc_pc, sc->sc_ih);
227
228 if (sc->sc_flags & NJSC32_IO_MAPPED)
229 bus_space_unmap(sc->sc_regt, sc->sc_regh, psc->sc_regmap_size);
230 if (sc->sc_flags & NJSC32_MEM_MAPPED)
231 bus_space_unmap(sc->sc_regt, psc->sc_regmaph,
232 psc->sc_regmap_size);
233
234 return 0;
235 }
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