The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/pci/pci_usrreq.c

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    1 /*      $NetBSD: pci_usrreq.c,v 1.8 2003/06/29 22:30:27 fvdl Exp $      */
    2 
    3 /*
    4  * Copyright 2001 Wasabi Systems, Inc.
    5  * All rights reserved.
    6  *
    7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed for the NetBSD Project by
   20  *      Wasabi Systems, Inc.
   21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
   22  *    or promote products derived from this software without specific prior
   23  *    written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
   29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   35  * POSSIBILITY OF SUCH DAMAGE.
   36  */
   37 
   38 /*
   39  * User -> kernel interface for PCI bus access.
   40  */
   41 
   42 #include <sys/cdefs.h>
   43 __KERNEL_RCSID(0, "$NetBSD: pci_usrreq.c,v 1.8 2003/06/29 22:30:27 fvdl Exp $");
   44 
   45 #include <sys/param.h>
   46 #include <sys/conf.h>
   47 #include <sys/device.h>
   48 #include <sys/ioctl.h>
   49 #include <sys/proc.h>
   50 #include <sys/systm.h>
   51 #include <sys/errno.h>
   52 #include <sys/fcntl.h>
   53 
   54 #include <dev/pci/pcireg.h>
   55 #include <dev/pci/pcivar.h>
   56 #include <dev/pci/pciio.h>
   57 
   58 dev_type_open(pciopen);
   59 dev_type_ioctl(pciioctl);
   60 dev_type_mmap(pcimmap);
   61 
   62 const struct cdevsw pci_cdevsw = {
   63         pciopen, nullclose, noread, nowrite, pciioctl,
   64         nostop, notty, nopoll, pcimmap, nokqfilter,
   65 };
   66 
   67 int
   68 pciopen(dev_t dev, int flags, int mode, struct proc *p)
   69 {
   70         struct pci_softc *sc;
   71         int unit;
   72 
   73         unit = minor(dev);
   74         sc = device_lookup(&pci_cd, unit);
   75         if (sc == NULL)
   76                 return (ENXIO);
   77 
   78         return (0);
   79 }
   80 
   81 int
   82 pciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
   83 {
   84         struct pci_softc *sc = device_lookup(&pci_cd, minor(dev));
   85         struct pciio_bdf_cfgreg *bdfr = (void *) data;
   86         struct pciio_businfo *binfo = (void *) data;
   87         pcitag_t tag;
   88 
   89         switch (cmd) {
   90         case PCI_IOC_BDF_CFGREAD:
   91         case PCI_IOC_BDF_CFGWRITE:
   92                 if (bdfr->bus > 255 || bdfr->device >= sc->sc_maxndevs ||
   93                     bdfr->function > 7)
   94                         return (EINVAL);
   95                 tag = pci_make_tag(sc->sc_pc, bdfr->bus, bdfr->device,
   96                     bdfr->function);
   97                 if (cmd == PCI_IOC_BDF_CFGREAD)
   98                         bdfr->cfgreg.val = pci_conf_read(sc->sc_pc, tag,
   99                             bdfr->cfgreg.reg);
  100                 else {
  101                         if ((flag & FWRITE) == 0)
  102                                 return (EBADF);
  103                         pci_conf_write(sc->sc_pc, tag, bdfr->cfgreg.reg,
  104                             bdfr->cfgreg.val);
  105                 }
  106                 break;
  107 
  108         case PCI_IOC_BUSINFO:
  109                 binfo->busno = sc->sc_bus;
  110                 binfo->maxdevs = sc->sc_maxndevs;
  111                 break;
  112 
  113         default:
  114                 return (ENOTTY);
  115         }
  116 
  117         return (0);
  118 }
  119 
  120 paddr_t
  121 pcimmap(dev_t dev, off_t offset, int prot)
  122 {
  123 #if 0
  124         struct pci_softc *sc = device_lookup(&pci_cd, minor(dev));
  125 
  126         /*
  127          * Since we allow mapping of the entire bus, we
  128          * take the offset to be the address on the bus,
  129          * and pass 0 as the offset into that range.
  130          *
  131          * XXX Need a way to deal with linear/prefetchable/etc.
  132          */
  133         return (bus_space_mmap(sc->sc_memt, offset, 0, prot, 0));
  134 #else
  135         /* XXX Consider this further. */
  136         return (-1);
  137 #endif
  138 }
  139 
  140 /*
  141  * pci_devioctl:
  142  *
  143  *      PCI ioctls that can be performed on devices directly.
  144  */
  145 int
  146 pci_devioctl(pci_chipset_tag_t pc, pcitag_t tag, u_long cmd, caddr_t data,
  147     int flag, struct proc *p)
  148 {
  149         struct pciio_cfgreg *r = (void *) data;
  150 
  151         switch (cmd) {
  152         case PCI_IOC_CFGREAD:
  153         case PCI_IOC_CFGWRITE:
  154                 if (cmd == PCI_IOC_CFGREAD)
  155                         r->val = pci_conf_read(pc, tag, r->reg);
  156                 else {
  157                         if ((flag & FWRITE) == 0)
  158                                 return (EBADF);
  159                         pci_conf_write(pc, tag, r->reg, r->val);
  160                 }
  161                 break;
  162 
  163         default:
  164                 return (EPASSTHROUGH);
  165         }
  166 
  167         return (0);
  168 }

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