The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/pci/pcib_if.m

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    1 #-
    2 # Copyright (c) 2000 Doug Rabson
    3 # All rights reserved.
    4 #
    5 # Redistribution and use in source and binary forms, with or without
    6 # modification, are permitted provided that the following conditions
    7 # are met:
    8 # 1. Redistributions of source code must retain the above copyright
    9 #    notice, this list of conditions and the following disclaimer.
   10 # 2. Redistributions in binary form must reproduce the above copyright
   11 #    notice, this list of conditions and the following disclaimer in the
   12 #    documentation and/or other materials provided with the distribution.
   13 #
   14 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15 # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16 # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17 # ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18 # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19 # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20 # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21 # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22 # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23 # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24 # SUCH DAMAGE.
   25 #
   26 # $FreeBSD: releng/11.2/sys/dev/pci/pcib_if.m 299929 2016-05-16 09:15:50Z andrew $
   27 #
   28 
   29 #include <sys/bus.h>
   30 #include <sys/rman.h>
   31 #include <dev/pci/pcivar.h>
   32 #include <dev/pci/pcib_private.h>
   33 
   34 INTERFACE pcib;
   35 
   36 CODE {
   37         static int
   38         null_route_interrupt(device_t pcib, device_t dev, int pin)
   39         {
   40                 return (PCI_INVALID_IRQ);
   41         }
   42 
   43         static int
   44         pcib_null_ari_enabled(device_t pcib)
   45         {
   46 
   47                 return (0);
   48         }
   49 };
   50 
   51 HEADER {
   52         #include "pci_if.h"
   53 };
   54 
   55 #
   56 # Return the number of slots on the attached PCI bus.
   57 #
   58 METHOD int maxslots {
   59         device_t        dev;
   60 };
   61 
   62 #
   63 #
   64 # Return the number of functions on the attached PCI bus.
   65 #
   66 METHOD int maxfuncs {
   67         device_t        dev;
   68 } DEFAULT pcib_maxfuncs;
   69 
   70 #
   71 # Read configuration space on the PCI bus. The bus, slot and func
   72 # arguments determine the device which is being read and the reg
   73 # argument is a byte offset into configuration space for that
   74 # device. The width argument (which should be 1, 2 or 4) specifies how
   75 # many byte of configuration space to read from that offset.
   76 #
   77 METHOD u_int32_t read_config {
   78         device_t        dev;
   79         u_int           bus;
   80         u_int           slot;
   81         u_int           func;
   82         u_int           reg;
   83         int             width;
   84 };
   85 
   86 #
   87 # Write configuration space on the PCI bus. The bus, slot and func
   88 # arguments determine the device which is being written and the reg
   89 # argument is a byte offset into configuration space for that
   90 # device. The value field is written to the configuration space, with
   91 # the number of bytes written depending on the width argument.
   92 #
   93 METHOD void write_config {
   94         device_t        dev;
   95         u_int           bus;
   96         u_int           slot;
   97         u_int           func;
   98         u_int           reg;
   99         u_int32_t       value;
  100         int             width;
  101 };
  102 
  103 #
  104 # Route an interrupt.  Returns a value suitable for stuffing into
  105 # a device's interrupt register.
  106 #
  107 METHOD int route_interrupt {
  108         device_t        pcib;
  109         device_t        dev;
  110         int             pin;
  111 } DEFAULT null_route_interrupt;
  112 
  113 #
  114 # Allocate 'count' MSI messsages mapped onto 'count' IRQs.  'irq' points
  115 # to an array of at least 'count' ints.  The max number of messages this
  116 # device supports is included so that the MD code can take that into
  117 # account when assigning resources so that the proper number of low bits
  118 # are clear in the resulting message data value.
  119 #
  120 METHOD int alloc_msi {
  121         device_t        pcib;
  122         device_t        dev;
  123         int             count;
  124         int             maxcount;
  125         int             *irqs;
  126 };
  127 
  128 #
  129 # Release 'count' MSI messages mapped onto 'count' IRQs stored in the
  130 # array pointed to by 'irqs'.
  131 #
  132 METHOD int release_msi {
  133         device_t        pcib;
  134         device_t        dev;
  135         int             count;
  136         int             *irqs;
  137 };
  138 
  139 #
  140 # Allocate a single MSI-X message mapped onto '*irq'.
  141 #
  142 METHOD int alloc_msix {
  143         device_t        pcib;
  144         device_t        dev;
  145         int             *irq;
  146 };
  147 
  148 #
  149 # Release a single MSI-X message mapped onto 'irq'.
  150 #
  151 METHOD int release_msix {
  152         device_t        pcib;
  153         device_t        dev;
  154         int             irq;
  155 };
  156 
  157 #
  158 # Determine the MSI/MSI-X message address and data for 'irq'.  The address
  159 # is returned in '*addr', and the data in '*data'.
  160 #
  161 METHOD int map_msi {
  162         device_t        pcib;
  163         device_t        dev;
  164         int             irq;
  165         uint64_t        *addr;
  166         uint32_t        *data;
  167 };
  168 
  169 #
  170 # Return the device power state to be used during a system sleep state
  171 # transition such as suspend and resume.
  172 #
  173 METHOD int power_for_sleep {
  174         device_t        pcib;
  175         device_t        dev;
  176         int             *pstate;
  177 };
  178 
  179 #
  180 # Return the PCI Routing Identifier (RID) for the device.
  181 #
  182 METHOD int get_id {
  183         device_t        pcib;
  184         device_t        dev;
  185         enum pci_id_type type;
  186         uintptr_t       *id;
  187 } DEFAULT pcib_get_id;
  188 
  189 #
  190 # Enable Alternative RID Interpretation if both the downstream port (pcib)
  191 # and the endpoint device (dev) both support it.
  192 #
  193 METHOD int try_enable_ari {
  194         device_t        pcib;
  195         device_t        dev;
  196 };
  197 
  198 #
  199 # Return non-zero if PCI ARI is enabled, or zero otherwise
  200 #
  201 METHOD int ari_enabled {
  202         device_t        pcib;
  203 } DEFAULT pcib_null_ari_enabled;
  204 
  205 #
  206 # Decode a PCI Routing Identifier (RID) into PCI bus/slot/function
  207 #
  208 METHOD void decode_rid {
  209         device_t        pcib;
  210         uint16_t        rid;
  211         int             *bus;
  212         int             *slot;
  213         int             *func;
  214 } DEFAULT pcib_decode_rid;

Cache object: 57198cf6a3b9c24b79dba4175265e014


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