Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/pcmcia/esp_pcmcia.c
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1 /* $NetBSD: esp_pcmcia.c,v 1.16 2003/12/28 06:50:42 itohy Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: esp_pcmcia.c,v 1.16 2003/12/28 06:50:42 itohy Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <sys/buf.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr.h> 49 50 #include <dev/scsipi/scsi_all.h> 51 #include <dev/scsipi/scsipi_all.h> 52 #include <dev/scsipi/scsiconf.h> 53 54 #include <dev/pcmcia/pcmciareg.h> 55 #include <dev/pcmcia/pcmciavar.h> 56 #include <dev/pcmcia/pcmciadevs.h> 57 58 #include <dev/ic/ncr53c9xreg.h> 59 #include <dev/ic/ncr53c9xvar.h> 60 61 struct esp_pcmcia_softc { 62 struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ 63 64 int sc_active; /* Pseudo-DMA state vars */ 65 int sc_tc; 66 int sc_datain; 67 size_t sc_dmasize; 68 size_t sc_dmatrans; 69 char **sc_dmaaddr; 70 size_t *sc_pdmalen; 71 72 /* PCMCIA-specific goo. */ 73 struct pcmcia_io_handle sc_pcioh; /* PCMCIA i/o space info */ 74 int sc_io_window; /* our i/o window */ 75 struct pcmcia_function *sc_pf; /* our PCMCIA function */ 76 void *sc_ih; /* interrupt handler */ 77 #ifdef ESP_PCMCIA_POLL 78 struct callout sc_poll_ch; 79 #endif 80 int sc_flags; 81 #define ESP_PCMCIA_ATTACHED 1 /* attach completed */ 82 #define ESP_PCMCIA_ATTACHING 2 /* attach in progress */ 83 }; 84 85 int esp_pcmcia_match __P((struct device *, struct cfdata *, void *)); 86 void esp_pcmcia_attach __P((struct device *, struct device *, void *)); 87 void esp_pcmcia_init __P((struct esp_pcmcia_softc *)); 88 int esp_pcmcia_detach __P((struct device *, int)); 89 int esp_pcmcia_enable __P((struct device *, int)); 90 91 CFATTACH_DECL(esp_pcmcia, sizeof(struct esp_pcmcia_softc), 92 esp_pcmcia_match, esp_pcmcia_attach, esp_pcmcia_detach, NULL); 93 94 /* 95 * Functions and the switch for the MI code. 96 */ 97 #ifdef ESP_PCMCIA_POLL 98 void esp_pcmcia_poll __P((void *)); 99 #endif 100 u_char esp_pcmcia_read_reg __P((struct ncr53c9x_softc *, int)); 101 void esp_pcmcia_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 102 int esp_pcmcia_dma_isintr __P((struct ncr53c9x_softc *)); 103 void esp_pcmcia_dma_reset __P((struct ncr53c9x_softc *)); 104 int esp_pcmcia_dma_intr __P((struct ncr53c9x_softc *)); 105 int esp_pcmcia_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 106 size_t *, int, size_t *)); 107 void esp_pcmcia_dma_go __P((struct ncr53c9x_softc *)); 108 void esp_pcmcia_dma_stop __P((struct ncr53c9x_softc *)); 109 int esp_pcmcia_dma_isactive __P((struct ncr53c9x_softc *)); 110 111 static const struct esp_pcmcia_product * 112 esp_pcmcia_lookup __P((struct pcmcia_attach_args *)); 113 114 struct ncr53c9x_glue esp_pcmcia_glue = { 115 esp_pcmcia_read_reg, 116 esp_pcmcia_write_reg, 117 esp_pcmcia_dma_isintr, 118 esp_pcmcia_dma_reset, 119 esp_pcmcia_dma_intr, 120 esp_pcmcia_dma_setup, 121 esp_pcmcia_dma_go, 122 esp_pcmcia_dma_stop, 123 esp_pcmcia_dma_isactive, 124 NULL, /* gl_clear_latched_intr */ 125 }; 126 127 const struct esp_pcmcia_product { 128 const char *epp_name; /* product name */ 129 u_int32_t epp_vendor; /* vendor ID */ 130 u_int32_t epp_product; /* product ID */ 131 const char *epp_cisinfo[4]; /* CIS information */ 132 } esp_pcmcia_products[] = { 133 { PCMCIA_STR_PANASONIC_KXLC002, PCMCIA_VENDOR_PANASONIC, 134 PCMCIA_PRODUCT_PANASONIC_KXLC002, PCMCIA_CIS_PANASONIC_KXLC002 }, 135 136 { PCMCIA_STR_RATOC_REX_9530, PCMCIA_VENDOR_RATOC, 137 PCMCIA_PRODUCT_RATOC_REX_9530, PCMCIA_CIS_RATOC_REX_9530 }, 138 139 { NULL } 140 }; 141 142 static const struct esp_pcmcia_product * 143 esp_pcmcia_lookup(pa) 144 struct pcmcia_attach_args *pa; 145 { 146 const struct esp_pcmcia_product *epp; 147 148 for (epp = esp_pcmcia_products; epp->epp_name != NULL; epp++) { 149 /* match by CIS information */ 150 if (pa->card->cis1_info[0] != NULL && 151 epp->epp_cisinfo[0] != NULL && 152 strcmp(pa->card->cis1_info[0], epp->epp_cisinfo[0]) == 0 && 153 pa->card->cis1_info[1] != NULL && 154 epp->epp_cisinfo[1] != NULL && 155 strcmp(pa->card->cis1_info[1], epp->epp_cisinfo[1]) == 0) 156 return (epp); 157 158 /* match by vendor/product id */ 159 if (pa->manufacturer != PCMCIA_VENDOR_INVALID && 160 pa->manufacturer == epp->epp_vendor && 161 pa->product != PCMCIA_PRODUCT_INVALID && 162 pa->product == epp->epp_product) 163 return (epp); 164 } 165 166 return (NULL); 167 } 168 169 int 170 esp_pcmcia_match(parent, match, aux) 171 struct device *parent; 172 struct cfdata *match; 173 void *aux; 174 { 175 struct pcmcia_attach_args *pa = aux; 176 177 if (esp_pcmcia_lookup(pa) != NULL) 178 return (1); 179 return (0); 180 } 181 182 void 183 esp_pcmcia_attach(parent, self, aux) 184 struct device *parent, *self; 185 void *aux; 186 { 187 struct esp_pcmcia_softc *esc = (void *)self; 188 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 189 struct pcmcia_attach_args *pa = aux; 190 struct pcmcia_config_entry *cfe; 191 struct pcmcia_function *pf = pa->pf; 192 const struct esp_pcmcia_product *epp; 193 194 esc->sc_pf = pf; 195 196 SIMPLEQ_FOREACH(cfe, &pf->cfe_head, cfe_list) { 197 if (cfe->num_memspace != 0 || 198 cfe->num_iospace != 1) 199 continue; 200 201 if (pcmcia_io_alloc(pa->pf, cfe->iospace[0].start, 202 cfe->iospace[0].length, 0, &esc->sc_pcioh) == 0) 203 break; 204 } 205 206 if (cfe == 0) { 207 printf(": can't alloc i/o space\n"); 208 goto no_config_entry; 209 } 210 211 /* Enable the card. */ 212 pcmcia_function_init(pf, cfe); 213 if (pcmcia_function_enable(pf)) { 214 printf(": function enable failed\n"); 215 goto enable_failed; 216 } 217 218 /* Map in the I/O space */ 219 if (pcmcia_io_map(pa->pf, PCMCIA_WIDTH_AUTO, 0, esc->sc_pcioh.size, 220 &esc->sc_pcioh, &esc->sc_io_window)) { 221 printf(": can't map i/o space\n"); 222 goto iomap_failed; 223 } 224 225 epp = esp_pcmcia_lookup(pa); 226 if (epp == NULL) { 227 printf("\n"); 228 panic("esp_pcmcia_attach: impossible"); 229 } 230 231 printf(": %s", epp->epp_name); 232 233 esp_pcmcia_init(esc); 234 235 /* 236 * Initialize nca board itself. 237 */ 238 esc->sc_flags |= ESP_PCMCIA_ATTACHING; 239 sc->sc_adapter.adapt_minphys = minphys; 240 sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request; 241 sc->sc_adapter.adapt_enable = esp_pcmcia_enable; 242 ncr53c9x_attach(sc); 243 esc->sc_flags &= ~ESP_PCMCIA_ATTACHING; 244 esc->sc_flags |= ESP_PCMCIA_ATTACHED; 245 return; 246 247 iomap_failed: 248 /* Disable the device. */ 249 pcmcia_function_disable(esc->sc_pf); 250 251 enable_failed: 252 /* Unmap our I/O space. */ 253 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 254 255 no_config_entry: 256 return; 257 } 258 259 void 260 esp_pcmcia_init(esc) 261 struct esp_pcmcia_softc *esc; 262 { 263 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 264 bus_space_tag_t iot = esc->sc_pcioh.iot; 265 bus_space_handle_t ioh = esc->sc_pcioh.ioh; 266 267 /* id 7, clock 40M, parity ON, sync OFF, fast ON, slow ON */ 268 269 sc->sc_glue = &esp_pcmcia_glue; 270 271 #ifdef ESP_PCMCIA_POLL 272 callout_init(&esc->sc_poll_ch); 273 #endif 274 275 sc->sc_rev = NCR_VARIANT_ESP406; 276 sc->sc_id = 7; 277 sc->sc_freq = 40; 278 /* try -PARENB -SLOW */ 279 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB | NCRCFG1_SLOW; 280 /* try +FE */ 281 sc->sc_cfg2 = NCRCFG2_SCSI2; 282 /* try -IDM -FSCSI -FCLK */ 283 sc->sc_cfg3 = NCRESPCFG3_CDB | NCRESPCFG3_FCLK | NCRESPCFG3_IDM | 284 NCRESPCFG3_FSCSI; 285 sc->sc_cfg4 = NCRCFG4_ACTNEG; 286 /* try +INTP */ 287 sc->sc_cfg5 = NCRCFG5_CRS1 | NCRCFG5_AADDR | NCRCFG5_PTRINC; 288 sc->sc_minsync = 0; 289 sc->sc_maxxfer = 64 * 1024; 290 291 bus_space_write_1(iot, ioh, NCR_CFG5, sc->sc_cfg5); 292 293 bus_space_write_1(iot, ioh, NCR_PIOI, 0); 294 bus_space_write_1(iot, ioh, NCR_PSTAT, 0); 295 bus_space_write_1(iot, ioh, 0x09, 0x24); 296 297 bus_space_write_1(iot, ioh, NCR_CFG4, sc->sc_cfg4); 298 } 299 300 int 301 esp_pcmcia_detach(self, flags) 302 struct device *self; 303 int flags; 304 { 305 struct esp_pcmcia_softc *esc = (void *)self; 306 int error; 307 308 if ((esc->sc_flags & ESP_PCMCIA_ATTACHED) == 0) { 309 /* Nothing to detach. */ 310 return (0); 311 } 312 313 error = ncr53c9x_detach(&esc->sc_ncr53c9x, flags); 314 if (error) 315 return (error); 316 317 /* Unmap our i/o window and i/o space. */ 318 pcmcia_io_unmap(esc->sc_pf, esc->sc_io_window); 319 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 320 321 return (0); 322 } 323 324 int 325 esp_pcmcia_enable(arg, onoff) 326 struct device *arg; 327 int onoff; 328 { 329 struct esp_pcmcia_softc *esc = (void *) arg; 330 331 if (onoff) { 332 #ifdef ESP_PCMCIA_POLL 333 callout_reset(&esc->sc_poll_ch, 1, esp_pcmcia_poll, esc); 334 #else 335 /* Establish the interrupt handler. */ 336 esc->sc_ih = pcmcia_intr_establish(esc->sc_pf, IPL_BIO, 337 ncr53c9x_intr, &esc->sc_ncr53c9x); 338 if (esc->sc_ih == NULL) { 339 printf("%s: couldn't establish interrupt handler\n", 340 esc->sc_ncr53c9x.sc_dev.dv_xname); 341 return (EIO); 342 } 343 #endif 344 345 /* 346 * If attach is in progress, we know that card power is 347 * enabled and chip will be initialized later. 348 * Otherwise, enable and reset now. 349 */ 350 if ((esc->sc_flags & ESP_PCMCIA_ATTACHING) == 0) { 351 if (pcmcia_function_enable(esc->sc_pf)) { 352 printf("%s: couldn't enable PCMCIA function\n", 353 esc->sc_ncr53c9x.sc_dev.dv_xname); 354 pcmcia_intr_disestablish(esc->sc_pf, 355 esc->sc_ih); 356 return (EIO); 357 } 358 359 /* Initialize only chip. */ 360 ncr53c9x_init(&esc->sc_ncr53c9x, 0); 361 } 362 } else { 363 pcmcia_function_disable(esc->sc_pf); 364 #ifdef ESP_PCMCIA_POLL 365 callout_stop(&esc->sc_poll_ch); 366 #else 367 pcmcia_intr_disestablish(esc->sc_pf, esc->sc_ih); 368 #endif 369 } 370 371 return (0); 372 } 373 374 #ifdef ESP_PCMCIA_POLL 375 void 376 esp_pcmcia_poll(arg) 377 void *arg; 378 { 379 struct esp_pcmcia_softc *esc = arg; 380 381 (void) ncr53c9x_intr(&esc->sc_ncr53c9x); 382 callout_reset(&esc->sc_poll_ch, 1, esp_pcmcia_poll, esc); 383 } 384 #endif 385 386 /* 387 * Glue functions. 388 */ 389 u_char 390 esp_pcmcia_read_reg(sc, reg) 391 struct ncr53c9x_softc *sc; 392 int reg; 393 { 394 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 395 u_char v; 396 397 v = bus_space_read_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg); 398 return v; 399 } 400 401 void 402 esp_pcmcia_write_reg(sc, reg, val) 403 struct ncr53c9x_softc *sc; 404 int reg; 405 u_char val; 406 { 407 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 408 u_char v = val; 409 410 if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) 411 v = NCRCMD_TRANS; 412 bus_space_write_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg, v); 413 } 414 415 int 416 esp_pcmcia_dma_isintr(sc) 417 struct ncr53c9x_softc *sc; 418 { 419 420 return NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT; 421 } 422 423 void 424 esp_pcmcia_dma_reset(sc) 425 struct ncr53c9x_softc *sc; 426 { 427 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 428 429 esc->sc_active = 0; 430 esc->sc_tc = 0; 431 } 432 433 int 434 esp_pcmcia_dma_intr(sc) 435 struct ncr53c9x_softc *sc; 436 { 437 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 438 u_char *p; 439 u_int espphase, espstat, espintr; 440 int cnt; 441 442 if (esc->sc_active == 0) { 443 printf("%s: dma_intr--inactive DMA\n", sc->sc_dev.dv_xname); 444 return -1; 445 } 446 447 if ((sc->sc_espintr & NCRINTR_BS) == 0) { 448 esc->sc_active = 0; 449 return 0; 450 } 451 452 cnt = *esc->sc_pdmalen; 453 if (*esc->sc_pdmalen == 0) { 454 printf("%s: data interrupt, but no count left\n", 455 sc->sc_dev.dv_xname); 456 } 457 458 p = *esc->sc_dmaaddr; 459 espphase = sc->sc_phase; 460 espstat = (u_int) sc->sc_espstat; 461 espintr = (u_int) sc->sc_espintr; 462 do { 463 if (esc->sc_datain) { 464 *p++ = NCR_READ_REG(sc, NCR_FIFO); 465 cnt--; 466 if (espphase == DATA_IN_PHASE) 467 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 468 else 469 esc->sc_active = 0; 470 } else { 471 if (espphase == DATA_OUT_PHASE || 472 espphase == MESSAGE_OUT_PHASE) { 473 NCR_WRITE_REG(sc, NCR_FIFO, *p++); 474 cnt--; 475 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 476 } else 477 esc->sc_active = 0; 478 } 479 480 if (esc->sc_active) { 481 while (!(NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)); 482 espstat = NCR_READ_REG(sc, NCR_STAT); 483 espintr = NCR_READ_REG(sc, NCR_INTR); 484 espphase = (espintr & NCRINTR_DIS) 485 ? /* Disconnected */ BUSFREE_PHASE 486 : espstat & PHASE_MASK; 487 } 488 } while (esc->sc_active && espintr); 489 sc->sc_phase = espphase; 490 sc->sc_espstat = (u_char) espstat; 491 sc->sc_espintr = (u_char) espintr; 492 *esc->sc_dmaaddr = p; 493 *esc->sc_pdmalen = cnt; 494 495 if (*esc->sc_pdmalen == 0) 496 esc->sc_tc = NCRSTAT_TC; 497 sc->sc_espstat |= esc->sc_tc; 498 return 0; 499 } 500 501 int 502 esp_pcmcia_dma_setup(sc, addr, len, datain, dmasize) 503 struct ncr53c9x_softc *sc; 504 caddr_t *addr; 505 size_t *len; 506 int datain; 507 size_t *dmasize; 508 { 509 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 510 511 esc->sc_dmaaddr = addr; 512 esc->sc_pdmalen = len; 513 esc->sc_datain = datain; 514 esc->sc_dmasize = *dmasize; 515 esc->sc_tc = 0; 516 517 return 0; 518 } 519 520 void 521 esp_pcmcia_dma_go(sc) 522 struct ncr53c9x_softc *sc; 523 { 524 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 525 526 esc->sc_active = 1; 527 } 528 529 void 530 esp_pcmcia_dma_stop(sc) 531 struct ncr53c9x_softc *sc; 532 { 533 } 534 535 int 536 esp_pcmcia_dma_isactive(sc) 537 struct ncr53c9x_softc *sc; 538 { 539 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 540 541 return (esc->sc_active); 542 }
Cache object: de3ea5728f0cd5820967161504bbe3bb
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