FreeBSD/Linux Kernel Cross Reference
sys/dev/pdq/if_fea.c
1 /*-
2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the author may not be used to endorse or promote products
11 * derived from this software without specific prior written permission
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * $FreeBSD: releng/9.2/sys/dev/pdq/if_fea.c 201758 2010-01-07 21:01:37Z mbr $
25 */
26
27 /*
28 * DEC PDQ FDDI Controller
29 *
30 * This module support the DEFEA EISA FDDI Controller.
31 */
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/socket.h>
37
38 #include <sys/module.h>
39 #include <sys/bus.h>
40
41 #include <machine/bus.h>
42 #include <machine/resource.h>
43 #include <sys/rman.h>
44
45 #include <net/if.h>
46 #include <net/if_media.h>
47 #include <net/fddi.h>
48
49 #include <dev/eisa/eisaconf.h>
50
51 #include <dev/pdq/pdq_freebsd.h>
52 #include <dev/pdq/pdqreg.h>
53
54 static void pdq_eisa_subprobe (pdq_bus_t, u_int32_t, u_int32_t *, u_int32_t *, u_int32_t *);
55 static void pdq_eisa_devinit (pdq_softc_t *);
56 static const char * pdq_eisa_match (eisa_id_t);
57
58 static int pdq_eisa_probe (device_t);
59 static int pdq_eisa_attach (device_t);
60 static int pdq_eisa_detach (device_t);
61 static int pdq_eisa_shutdown (device_t);
62 static void pdq_eisa_ifintr (void *);
63
64 #define DEFEA_IRQS 0x0000FBA9U
65
66 #define DEFEA_INTRENABLE 0x8 /* level interrupt */
67 #define DEFEA_DECODE_IRQ(n) ((DEFEA_IRQS >> ((n) << 2)) & 0x0f)
68
69 #define EISA_DEVICE_ID_DEC_DEC3001 0x10a33001
70 #define EISA_DEVICE_ID_DEC_DEC3002 0x10a33002
71 #define EISA_DEVICE_ID_DEC_DEC3003 0x10a33003
72 #define EISA_DEVICE_ID_DEC_DEC3004 0x10a33004
73
74 static void
75 pdq_eisa_subprobe(bc, iobase, maddr, msize, irq)
76 pdq_bus_t bc;
77 u_int32_t iobase;
78 u_int32_t *maddr;
79 u_int32_t *msize;
80 u_int32_t *irq;
81 {
82 if (irq != NULL)
83 *irq = DEFEA_DECODE_IRQ(PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_IO_CONFIG_STAT_0) & 3);
84 *maddr = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_0) << 8)
85 | (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_1) << 16);
86 *msize = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_MASK_0) + 4) << 8;
87
88 return;
89 }
90
91 static void
92 pdq_eisa_devinit (sc)
93 pdq_softc_t *sc;
94 {
95 pdq_uint8_t data;
96
97 /*
98 * Do the standard initialization for the DEFEA registers.
99 */
100 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_FUNCTION_CTRL, 0x23);
101 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CMP_1_1, (sc->io_bsh >> 8) & 0xF0);
102 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CMP_0_1, (sc->io_bsh >> 8) & 0xF0);
103 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_SLOT_CTRL, 0x01);
104 data = PDQ_OS_IORD_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF);
105 #if defined(PDQ_IOMAPPED)
106 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF, data & ~1);
107 #else
108 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF, data | 1);
109 #endif
110 data = PDQ_OS_IORD_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CONFIG_STAT_0);
111 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CONFIG_STAT_0, data | DEFEA_INTRENABLE);
112
113 return;
114 }
115
116 static const char *
117 pdq_eisa_match (type)
118 eisa_id_t type;
119 {
120 switch (type) {
121 case EISA_DEVICE_ID_DEC_DEC3001:
122 case EISA_DEVICE_ID_DEC_DEC3002:
123 case EISA_DEVICE_ID_DEC_DEC3003:
124 case EISA_DEVICE_ID_DEC_DEC3004:
125 return ("DEC FDDIcontroller/EISA Adapter");
126 break;
127 default:
128 break;
129 }
130 return (NULL);
131 }
132
133 static int
134 pdq_eisa_probe (dev)
135 device_t dev;
136 {
137 const char *desc;
138 u_int32_t iobase;
139 u_int32_t irq;
140 u_int32_t maddr;
141 u_int32_t msize;
142
143 u_int32_t eisa_id = eisa_get_id(dev);
144
145 desc = pdq_eisa_match(eisa_id);
146 if (!desc) {
147 return (ENXIO);
148 }
149
150 device_set_desc(dev, desc);
151
152 iobase = eisa_get_slot(dev) * EISA_SLOT_SIZE;
153 pdq_eisa_subprobe((pdq_bus_t)SYS_RES_IOPORT, iobase, &maddr, &msize, &irq);
154
155 eisa_add_iospace(dev, iobase, 0x200, RESVADDR_NONE);
156 eisa_add_mspace(dev, maddr, msize, RESVADDR_NONE);
157 eisa_add_intr(dev, irq, EISA_TRIGGER_LEVEL);
158
159 return (0);
160 }
161
162 static void
163 pdq_eisa_ifintr(arg)
164 void * arg;
165 {
166 pdq_softc_t * sc;
167
168 sc = arg;
169
170 PDQ_LOCK(sc);
171 (void) pdq_interrupt(sc->sc_pdq);
172 PDQ_LOCK(sc);
173
174 return;
175 }
176
177 static int
178 pdq_eisa_attach (dev)
179 device_t dev;
180 {
181 pdq_softc_t * sc;
182 int error;
183
184 sc = device_get_softc(dev);
185
186 sc->dev = dev;
187
188 sc->io_rid = 0;
189 sc->io_type = SYS_RES_IOPORT;
190 sc->io = bus_alloc_resource_any(dev, sc->io_type, &sc->io_rid,
191 RF_ACTIVE);
192 if (!sc->io) {
193 device_printf(dev, "Unable to allocate I/O space resource.\n");
194 error = ENXIO;
195 goto bad;
196 }
197 sc->io_bsh = rman_get_bushandle(sc->io);
198 sc->io_bst = rman_get_bustag(sc->io);
199
200 sc->mem_rid = 0;
201 sc->mem_type = SYS_RES_MEMORY;
202 sc->mem = bus_alloc_resource_any(dev, sc->mem_type, &sc->mem_rid,
203 RF_ACTIVE);
204 if (!sc->mem) {
205 device_printf(dev, "Unable to allocate memory resource.\n");
206 error = ENXIO;
207 goto bad;
208 }
209 sc->mem_bsh = rman_get_bushandle(sc->mem);
210 sc->mem_bst = rman_get_bustag(sc->mem);
211
212 sc->irq_rid = 0;
213 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
214 RF_SHAREABLE | RF_ACTIVE);
215 if (!sc->irq) {
216 device_printf(dev, "Unable to allocate interrupt resource.\n");
217 error = ENXIO;
218 goto bad;
219 }
220
221 pdq_eisa_devinit(sc);
222 error = pdq_ifattach(sc, sc->sc_pdq->pdq_hwaddr.lanaddr_bytes,
223 PDQ_DEFEA);
224 if (error)
225 goto bad;
226
227 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
228 NULL, pdq_eisa_ifintr, sc, &sc->irq_ih);
229 if (error) {
230 device_printf(dev, "Failed to setup interrupt handler.\n");
231 pdq_ifdetach(sc);
232 return (error);
233 }
234
235 return (0);
236 bad:
237 pdq_free(dev);
238 return (error);
239 }
240
241 static int
242 pdq_eisa_detach (dev)
243 device_t dev;
244 {
245 pdq_softc_t * sc;
246
247 sc = device_get_softc(dev);
248 pdq_ifdetach(sc);
249
250 return (0);
251 }
252
253 static int
254 pdq_eisa_shutdown(dev)
255 device_t dev;
256 {
257 pdq_softc_t * sc;
258
259 sc = device_get_softc(dev);
260 PDQ_LOCK(sc);
261 pdq_hwreset(sc->sc_pdq);
262 PDQ_UNLOCK(sc);
263
264 return (0);
265 }
266
267 static device_method_t pdq_eisa_methods[] = {
268 DEVMETHOD(device_probe, pdq_eisa_probe),
269 DEVMETHOD(device_attach, pdq_eisa_attach),
270 DEVMETHOD(device_attach, pdq_eisa_detach),
271 DEVMETHOD(device_shutdown, pdq_eisa_shutdown),
272
273 { 0, 0 }
274 };
275
276 static driver_t pdq_eisa_driver = {
277 "fea",
278 pdq_eisa_methods,
279 sizeof(pdq_softc_t),
280 };
281
282 DRIVER_MODULE(fea, eisa, pdq_eisa_driver, pdq_devclass, 0, 0);
283 /* MODULE_DEPEND(fea, eisa, 1, 1, 1); */
284 MODULE_DEPEND(fea, fddi, 1, 1, 1);
Cache object: 19a2757ae381bbdf269d6207a22e6287
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