FreeBSD/Linux Kernel Cross Reference
sys/dev/pdq/if_fpa.c
1 /*-
2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the author may not be used to endorse or promote products
11 * derived from this software without specific prior written permission
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 *
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD: releng/5.4/sys/dev/pdq/if_fpa.c 127135 2004-03-17 17:50:55Z njl $");
29
30 /*
31 * DEC PDQ FDDI Controller; code for BSD derived operating systems
32 *
33 * This module supports the DEC DEFPA PCI FDDI Controller
34 */
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/socket.h>
40
41 #include <sys/module.h>
42 #include <sys/bus.h>
43
44 #include <machine/bus_memio.h>
45 #include <machine/bus_pio.h>
46 #include <machine/bus.h>
47 #include <machine/resource.h>
48 #include <sys/rman.h>
49
50 #include <net/if.h>
51 #include <net/if_arp.h>
52 #include <net/if_media.h>
53 #include <net/fddi.h>
54
55 #include <dev/pci/pcivar.h>
56 #include <dev/pci/pcireg.h>
57
58 #include <dev/pdq/pdq_freebsd.h>
59 #include <dev/pdq/pdqreg.h>
60
61 #define DEC_VENDORID 0x1011
62 #define DEFPA_CHIPID 0x000F
63
64 #define DEFPA_LATENCY 0x88
65
66 #define PCI_CFLT 0x0C /* Configuration Latency */
67 #define PCI_CBMA 0x10 /* Configuration Base Memory Address */
68 #define PCI_CBIO 0x14 /* Configuration Base I/O Address */
69
70 static int pdq_pci_probe (device_t);
71 static int pdq_pci_attach (device_t);
72 static int pdq_pci_detach (device_t);
73 static void pdq_pci_shutdown (device_t);
74 static void pdq_pci_ifintr (void *);
75
76 static void
77 pdq_pci_ifintr(void *arg)
78 {
79 device_t dev;
80 pdq_softc_t *sc;
81
82 dev = (device_t)arg;
83 sc = device_get_softc(dev);
84
85 PDQ_LOCK(sc);
86 (void) pdq_interrupt(sc->sc_pdq);
87 PDQ_UNLOCK(sc);
88
89 return;
90 }
91
92 /*
93 * This is the PCI configuration support.
94 */
95 static int
96 pdq_pci_probe(device_t dev)
97 {
98 if (pci_get_vendor(dev) == DEC_VENDORID &&
99 pci_get_device(dev) == DEFPA_CHIPID) {
100 device_set_desc(dev, "Digital DEFPA PCI FDDI Controller");
101 return (0);
102 }
103
104 return (ENXIO);
105 }
106
107 static int
108 pdq_pci_attach(device_t dev)
109 {
110 pdq_softc_t *sc;
111 struct ifnet *ifp;
112 u_int32_t command;
113 int error;
114
115 sc = device_get_softc(dev);
116 ifp = &sc->arpcom.ac_if;
117
118 sc->dev = dev;
119
120 /*
121 * Map control/status registers.
122 */
123 pci_enable_busmaster(dev);
124
125 command = pci_read_config(dev, PCIR_LATTIMER, 1);
126 if (command < DEFPA_LATENCY) {
127 command = DEFPA_LATENCY;
128 pci_write_config(dev, PCIR_LATTIMER, command, 1);
129 }
130
131 sc->mem_rid = PCI_CBMA;
132 sc->mem_type = SYS_RES_MEMORY;
133 sc->mem = bus_alloc_resource_any(dev, sc->mem_type, &sc->mem_rid,
134 RF_ACTIVE);
135 if (!sc->mem) {
136 device_printf(dev, "Unable to allocate I/O space resource.\n");
137 error = ENXIO;
138 goto bad;
139 }
140 sc->mem_bsh = rman_get_bushandle(sc->mem);
141 sc->mem_bst = rman_get_bustag(sc->mem);
142
143 sc->irq_rid = 0;
144 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
145 RF_SHAREABLE | RF_ACTIVE);
146 if (!sc->irq) {
147 device_printf(dev, "Unable to allocate interrupt resource.\n");
148 error = ENXIO;
149 goto bad;
150 }
151
152 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
153
154 sc->sc_pdq = pdq_initialize(sc->mem_bst, sc->mem_bsh,
155 ifp->if_xname, -1,
156 (void *)sc, PDQ_DEFPA);
157 if (sc->sc_pdq == NULL) {
158 device_printf(dev, "Initialization failed.\n");
159 error = ENXIO;
160 goto bad;
161 }
162
163 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET,
164 pdq_pci_ifintr, dev, &sc->irq_ih);
165 if (error) {
166 device_printf(dev, "Failed to setup interrupt handler.\n");
167 error = ENXIO;
168 goto bad;
169 }
170
171 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes,
172 (caddr_t) sc->arpcom.ac_enaddr, FDDI_ADDR_LEN);
173 pdq_ifattach(sc);
174
175 return (0);
176 bad:
177 pdq_free(dev);
178 return (error);
179 }
180
181 static int
182 pdq_pci_detach (dev)
183 device_t dev;
184 {
185 pdq_softc_t *sc;
186
187 sc = device_get_softc(dev);
188 pdq_ifdetach(sc);
189
190 return (0);
191 }
192
193 static void
194 pdq_pci_shutdown(device_t dev)
195 {
196 pdq_softc_t *sc;
197
198 sc = device_get_softc(dev);
199 pdq_hwreset(sc->sc_pdq);
200
201 return;
202 }
203
204 static device_method_t pdq_pci_methods[] = {
205 /* Device interface */
206 DEVMETHOD(device_probe, pdq_pci_probe),
207 DEVMETHOD(device_attach, pdq_pci_attach),
208 DEVMETHOD(device_detach, pdq_pci_detach),
209 DEVMETHOD(device_shutdown, pdq_pci_shutdown),
210
211 { 0, 0 }
212 };
213
214 static driver_t pdq_pci_driver = {
215 "fpa",
216 pdq_pci_methods,
217 sizeof(pdq_softc_t),
218 };
219
220 DRIVER_MODULE(fpa, pci, pdq_pci_driver, pdq_devclass, 0, 0);
221 MODULE_DEPEND(fpa, pci, 1, 1, 1);
222 MODULE_DEPEND(fpa, fddi, 1, 1, 1);
Cache object: 89e97a3f2d420ef8418b21386b7e207f
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